[PATCH] m32r: Update syscall macros for MMU-less targets
This patch is for updating m32r's MMU-less support. Some legacy MMU-less m32r chips cannot return from a trap handler to the right-hand side 16-bit halfword code of a 32-bit instrucion code pair, because a "trap" instruction specification was expanded in M32R-II ISA. This modification forces "trap" instructions to be placed in word alignment location with a parallel "nop" code. Signed-off-by: Kazuhiro Inaoka <inaoka@linux-m32r.org> Signed-off-by: Hirokazu Takata <takata@linux-m32r.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
This commit is contained in:
parent
9287d95ea1
commit
1b5b776aa5
|
@ -319,7 +319,7 @@ type name(void) \
|
|||
register long __scno __asm__ ("r7") = __NR_##name; \
|
||||
register long __res __asm__("r0"); \
|
||||
__asm__ __volatile__ (\
|
||||
"trap #" SYSCALL_VECTOR \
|
||||
"trap #" SYSCALL_VECTOR "|| nop"\
|
||||
: "=r" (__res) \
|
||||
: "r" (__scno) \
|
||||
: "memory"); \
|
||||
|
@ -332,7 +332,7 @@ type name(type1 arg1) \
|
|||
register long __scno __asm__ ("r7") = __NR_##name; \
|
||||
register long __res __asm__ ("r0") = (long)(arg1); \
|
||||
__asm__ __volatile__ (\
|
||||
"trap #" SYSCALL_VECTOR \
|
||||
"trap #" SYSCALL_VECTOR "|| nop"\
|
||||
: "=r" (__res) \
|
||||
: "r" (__scno), "0" (__res) \
|
||||
: "memory"); \
|
||||
|
@ -346,7 +346,7 @@ register long __scno __asm__ ("r7") = __NR_##name; \
|
|||
register long __arg2 __asm__ ("r1") = (long)(arg2); \
|
||||
register long __res __asm__ ("r0") = (long)(arg1); \
|
||||
__asm__ __volatile__ (\
|
||||
"trap #" SYSCALL_VECTOR \
|
||||
"trap #" SYSCALL_VECTOR "|| nop"\
|
||||
: "=r" (__res) \
|
||||
: "r" (__scno), "0" (__res), "r" (__arg2) \
|
||||
: "memory"); \
|
||||
|
@ -361,7 +361,7 @@ register long __arg3 __asm__ ("r2") = (long)(arg3); \
|
|||
register long __arg2 __asm__ ("r1") = (long)(arg2); \
|
||||
register long __res __asm__ ("r0") = (long)(arg1); \
|
||||
__asm__ __volatile__ (\
|
||||
"trap #" SYSCALL_VECTOR \
|
||||
"trap #" SYSCALL_VECTOR "|| nop"\
|
||||
: "=r" (__res) \
|
||||
: "r" (__scno), "0" (__res), "r" (__arg2), \
|
||||
"r" (__arg3) \
|
||||
|
@ -378,7 +378,7 @@ register long __arg3 __asm__ ("r2") = (long)(arg3); \
|
|||
register long __arg2 __asm__ ("r1") = (long)(arg2); \
|
||||
register long __res __asm__ ("r0") = (long)(arg1); \
|
||||
__asm__ __volatile__ (\
|
||||
"trap #" SYSCALL_VECTOR \
|
||||
"trap #" SYSCALL_VECTOR "|| nop"\
|
||||
: "=r" (__res) \
|
||||
: "r" (__scno), "0" (__res), "r" (__arg2), \
|
||||
"r" (__arg3), "r" (__arg4) \
|
||||
|
@ -397,7 +397,7 @@ register long __arg3 __asm__ ("r2") = (long)(arg3); \
|
|||
register long __arg2 __asm__ ("r1") = (long)(arg2); \
|
||||
register long __res __asm__ ("r0") = (long)(arg1); \
|
||||
__asm__ __volatile__ (\
|
||||
"trap #" SYSCALL_VECTOR \
|
||||
"trap #" SYSCALL_VECTOR "|| nop"\
|
||||
: "=r" (__res) \
|
||||
: "r" (__scno), "0" (__res), "r" (__arg2), \
|
||||
"r" (__arg3), "r" (__arg4), "r" (__arg5) \
|
||||
|
|
Loading…
Reference in New Issue