ASoC: omap: mcbsp, mcpdm, dmic: raw read and write endian fix

All OMAP IP blocks expect LE data, but CPU may operate in BE mode.
Need to use endian neutral functions to read/write h/w registers.
I.e instead of __raw_read[lw] and __raw_write[lw] functions code
need to use read[lw]_relaxed and write[lw]_relaxed functions.
If the first simply reads/writes register, the second will byteswap
it if host operates in BE mode.

Changes are trivial sed like replacement of __raw_xxx functions
with xxx_relaxed variant.

Signed-off-by: Victor Kamensky <victor.kamensky@linaro.org>
Signed-off-by: Taras Kondratiuk <taras.kondratiuk@linaro.org>
Acked-by: Jarkko Nikula <jarkko.nikula@bitmer.com>
Acked-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
This commit is contained in:
Victor Kamensky 2013-11-16 02:01:19 +02:00 committed by Mark Brown
parent 6ce4eac1f6
commit 1b488a481c
3 changed files with 10 additions and 10 deletions

View File

@ -36,10 +36,10 @@ static void omap_mcbsp_write(struct omap_mcbsp *mcbsp, u16 reg, u32 val)
if (mcbsp->pdata->reg_size == 2) { if (mcbsp->pdata->reg_size == 2) {
((u16 *)mcbsp->reg_cache)[reg] = (u16)val; ((u16 *)mcbsp->reg_cache)[reg] = (u16)val;
__raw_writew((u16)val, addr); writew_relaxed((u16)val, addr);
} else { } else {
((u32 *)mcbsp->reg_cache)[reg] = val; ((u32 *)mcbsp->reg_cache)[reg] = val;
__raw_writel(val, addr); writel_relaxed(val, addr);
} }
} }
@ -48,22 +48,22 @@ static int omap_mcbsp_read(struct omap_mcbsp *mcbsp, u16 reg, bool from_cache)
void __iomem *addr = mcbsp->io_base + reg * mcbsp->pdata->reg_step; void __iomem *addr = mcbsp->io_base + reg * mcbsp->pdata->reg_step;
if (mcbsp->pdata->reg_size == 2) { if (mcbsp->pdata->reg_size == 2) {
return !from_cache ? __raw_readw(addr) : return !from_cache ? readw_relaxed(addr) :
((u16 *)mcbsp->reg_cache)[reg]; ((u16 *)mcbsp->reg_cache)[reg];
} else { } else {
return !from_cache ? __raw_readl(addr) : return !from_cache ? readl_relaxed(addr) :
((u32 *)mcbsp->reg_cache)[reg]; ((u32 *)mcbsp->reg_cache)[reg];
} }
} }
static void omap_mcbsp_st_write(struct omap_mcbsp *mcbsp, u16 reg, u32 val) static void omap_mcbsp_st_write(struct omap_mcbsp *mcbsp, u16 reg, u32 val)
{ {
__raw_writel(val, mcbsp->st_data->io_base_st + reg); writel_relaxed(val, mcbsp->st_data->io_base_st + reg);
} }
static int omap_mcbsp_st_read(struct omap_mcbsp *mcbsp, u16 reg) static int omap_mcbsp_st_read(struct omap_mcbsp *mcbsp, u16 reg)
{ {
return __raw_readl(mcbsp->st_data->io_base_st + reg); return readl_relaxed(mcbsp->st_data->io_base_st + reg);
} }
#define MCBSP_READ(mcbsp, reg) \ #define MCBSP_READ(mcbsp, reg) \

View File

@ -61,12 +61,12 @@ struct omap_dmic {
static inline void omap_dmic_write(struct omap_dmic *dmic, u16 reg, u32 val) static inline void omap_dmic_write(struct omap_dmic *dmic, u16 reg, u32 val)
{ {
__raw_writel(val, dmic->io_base + reg); writel_relaxed(val, dmic->io_base + reg);
} }
static inline int omap_dmic_read(struct omap_dmic *dmic, u16 reg) static inline int omap_dmic_read(struct omap_dmic *dmic, u16 reg)
{ {
return __raw_readl(dmic->io_base + reg); return readl_relaxed(dmic->io_base + reg);
} }
static inline void omap_dmic_start(struct omap_dmic *dmic) static inline void omap_dmic_start(struct omap_dmic *dmic)

View File

@ -74,12 +74,12 @@ struct omap_mcpdm {
static inline void omap_mcpdm_write(struct omap_mcpdm *mcpdm, u16 reg, u32 val) static inline void omap_mcpdm_write(struct omap_mcpdm *mcpdm, u16 reg, u32 val)
{ {
__raw_writel(val, mcpdm->io_base + reg); writel_relaxed(val, mcpdm->io_base + reg);
} }
static inline int omap_mcpdm_read(struct omap_mcpdm *mcpdm, u16 reg) static inline int omap_mcpdm_read(struct omap_mcpdm *mcpdm, u16 reg)
{ {
return __raw_readl(mcpdm->io_base + reg); return readl_relaxed(mcpdm->io_base + reg);
} }
#ifdef DEBUG #ifdef DEBUG