arm64: move from arm_generic to arm_arch_timer
The arch_timer driver supports a superset of the functionality of the arm_generic driver, and is not tied to a particular arch. This patch moves arm64 to use the arch_timer driver, gaining additional functionality in doing so, and removes the (now unused) arm_generic driver. Timer-related hooks specific to arm64 are moved into arch/arm64/kernel/time.c. Signed-off-by: Mark Rutland <mark.rutland@arm.com> Acked-by: Catalin Marinas <catalin.marinas@arm.com> Acked-by: Marc Zyngier <marc.zyngier@arm.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
This commit is contained in:
Mark Rutland
parent
1dac0dd71c
commit
1aee5d7a81
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@ -3,6 +3,7 @@ config ARM64
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select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE
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select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE
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select ARCH_WANT_COMPAT_IPC_PARSE_VERSION
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select ARCH_WANT_COMPAT_IPC_PARSE_VERSION
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select ARM_AMBA
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select ARM_AMBA
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select ARM_ARCH_TIMER
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select CLONE_BACKWARDS
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select CLONE_BACKWARDS
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select COMMON_CLK
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select COMMON_CLK
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select GENERIC_CLOCKEVENTS
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select GENERIC_CLOCKEVENTS
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@ -0,0 +1,133 @@
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/*
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* arch/arm64/include/asm/arch_timer.h
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*
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* Copyright (C) 2012 ARM Ltd.
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* Author: Marc Zyngier <marc.zyngier@arm.com>
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef __ASM_ARCH_TIMER_H
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#define __ASM_ARCH_TIMER_H
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#include <asm/barrier.h>
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#include <linux/init.h>
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#include <linux/types.h>
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#include <clocksource/arm_arch_timer.h>
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static inline void arch_timer_reg_write(int access, int reg, u32 val)
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{
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if (access == ARCH_TIMER_PHYS_ACCESS) {
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switch (reg) {
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case ARCH_TIMER_REG_CTRL:
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asm volatile("msr cntp_ctl_el0, %0" : : "r" (val));
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break;
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case ARCH_TIMER_REG_TVAL:
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asm volatile("msr cntp_tval_el0, %0" : : "r" (val));
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break;
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default:
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BUILD_BUG();
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}
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} else if (access == ARCH_TIMER_VIRT_ACCESS) {
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switch (reg) {
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case ARCH_TIMER_REG_CTRL:
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asm volatile("msr cntv_ctl_el0, %0" : : "r" (val));
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break;
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case ARCH_TIMER_REG_TVAL:
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asm volatile("msr cntv_tval_el0, %0" : : "r" (val));
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break;
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default:
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BUILD_BUG();
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}
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} else {
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BUILD_BUG();
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}
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isb();
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}
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static inline u32 arch_timer_reg_read(int access, int reg)
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{
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u32 val;
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if (access == ARCH_TIMER_PHYS_ACCESS) {
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switch (reg) {
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case ARCH_TIMER_REG_CTRL:
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asm volatile("mrs %0, cntp_ctl_el0" : "=r" (val));
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break;
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case ARCH_TIMER_REG_TVAL:
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asm volatile("mrs %0, cntp_tval_el0" : "=r" (val));
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break;
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default:
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BUILD_BUG();
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}
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} else if (access == ARCH_TIMER_VIRT_ACCESS) {
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switch (reg) {
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case ARCH_TIMER_REG_CTRL:
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asm volatile("mrs %0, cntv_ctl_el0" : "=r" (val));
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break;
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case ARCH_TIMER_REG_TVAL:
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asm volatile("mrs %0, cntv_tval_el0" : "=r" (val));
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break;
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default:
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BUILD_BUG();
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}
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} else {
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BUILD_BUG();
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}
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return val;
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}
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static inline u32 arch_timer_get_cntfrq(void)
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{
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u32 val;
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asm volatile("mrs %0, cntfrq_el0" : "=r" (val));
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return val;
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}
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static inline void __cpuinit arch_counter_set_user_access(void)
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{
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u32 cntkctl;
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/* Disable user access to the timers and the physical counter. */
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asm volatile("mrs %0, cntkctl_el1" : "=r" (cntkctl));
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cntkctl &= ~((3 << 8) | (1 << 0));
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/* Enable user access to the virtual counter and frequency. */
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cntkctl |= (1 << 1);
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asm volatile("msr cntkctl_el1, %0" : : "r" (cntkctl));
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}
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static inline u64 arch_counter_get_cntpct(void)
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{
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u64 cval;
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isb();
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asm volatile("mrs %0, cntpct_el0" : "=r" (cval));
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return cval;
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}
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static inline u64 arch_counter_get_cntvct(void)
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{
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u64 cval;
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isb();
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asm volatile("mrs %0, cntvct_el0" : "=r" (cval));
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return cval;
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}
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#endif
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@ -1,102 +0,0 @@
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/*
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* arch/arm64/include/asm/arm_generic.h
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*
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* Copyright (C) 2012 ARM Ltd.
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* Author: Marc Zyngier <marc.zyngier@arm.com>
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef __ASM_ARM_GENERIC_H
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#define __ASM_ARM_GENERIC_H
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#include <linux/clocksource.h>
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#define ARCH_TIMER_CTRL_ENABLE (1 << 0)
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#define ARCH_TIMER_CTRL_IMASK (1 << 1)
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#define ARCH_TIMER_CTRL_ISTATUS (1 << 2)
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#define ARCH_TIMER_REG_CTRL 0
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#define ARCH_TIMER_REG_FREQ 1
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#define ARCH_TIMER_REG_TVAL 2
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static inline void arch_timer_reg_write(int reg, u32 val)
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{
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switch (reg) {
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case ARCH_TIMER_REG_CTRL:
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asm volatile("msr cntp_ctl_el0, %0" : : "r" (val));
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break;
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case ARCH_TIMER_REG_TVAL:
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asm volatile("msr cntp_tval_el0, %0" : : "r" (val));
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break;
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default:
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BUILD_BUG();
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}
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isb();
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}
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static inline u32 arch_timer_reg_read(int reg)
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{
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u32 val;
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switch (reg) {
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case ARCH_TIMER_REG_CTRL:
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asm volatile("mrs %0, cntp_ctl_el0" : "=r" (val));
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break;
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case ARCH_TIMER_REG_FREQ:
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asm volatile("mrs %0, cntfrq_el0" : "=r" (val));
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break;
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case ARCH_TIMER_REG_TVAL:
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asm volatile("mrs %0, cntp_tval_el0" : "=r" (val));
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break;
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default:
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BUILD_BUG();
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}
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return val;
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}
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static inline void __cpuinit arch_counter_enable_user_access(void)
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{
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u32 cntkctl;
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/* Disable user access to the timers and the physical counter. */
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asm volatile("mrs %0, cntkctl_el1" : "=r" (cntkctl));
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cntkctl &= ~((3 << 8) | (1 << 0));
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/* Enable user access to the virtual counter and frequency. */
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cntkctl |= (1 << 1);
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asm volatile("msr cntkctl_el1, %0" : : "r" (cntkctl));
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}
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static inline cycle_t arch_counter_get_cntpct(void)
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{
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cycle_t cval;
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isb();
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asm volatile("mrs %0, cntpct_el0" : "=r" (cval));
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return cval;
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}
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static inline cycle_t arch_counter_get_cntvct(void)
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{
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cycle_t cval;
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isb();
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asm volatile("mrs %0, cntvct_el0" : "=r" (cval));
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return cval;
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}
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#endif
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@ -31,8 +31,9 @@
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#include <linux/syscore_ops.h>
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#include <linux/syscore_ops.h>
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#include <linux/timer.h>
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#include <linux/timer.h>
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#include <linux/irq.h>
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#include <linux/irq.h>
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#include <linux/delay.h>
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#include <clocksource/arm_generic.h>
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#include <clocksource/arm_arch_timer.h>
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#include <asm/thread_info.h>
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#include <asm/thread_info.h>
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#include <asm/stacktrace.h>
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#include <asm/stacktrace.h>
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@ -59,7 +60,31 @@ unsigned long profile_pc(struct pt_regs *regs)
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EXPORT_SYMBOL(profile_pc);
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EXPORT_SYMBOL(profile_pc);
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#endif
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#endif
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static u64 sched_clock_mult __read_mostly;
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unsigned long long notrace sched_clock(void)
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{
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return arch_timer_read_counter() * sched_clock_mult;
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}
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int read_current_timer(unsigned long *timer_value)
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{
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*timer_value = arch_timer_read_counter();
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return 0;
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}
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void __init time_init(void)
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void __init time_init(void)
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{
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{
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arm_generic_timer_init();
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u32 arch_timer_rate;
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if (arch_timer_init())
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panic("Unable to initialise architected timer.\n");
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arch_timer_rate = arch_timer_get_rate();
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/* Cache the sched_clock multiplier to save a divide in the hot path. */
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sched_clock_mult = NSEC_PER_SEC / arch_timer_rate;
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/* Calibrate the delay loop directly */
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lpj_fine = arch_timer_rate / HZ;
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}
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}
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@ -54,10 +54,5 @@ config CLKSRC_DBX500_PRCMU_SCHED_CLOCK
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help
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help
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Use the always on PRCMU Timer as sched_clock
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Use the always on PRCMU Timer as sched_clock
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config CLKSRC_ARM_GENERIC
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def_bool y if ARM64
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help
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This option enables support for the ARM generic timer.
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config ARM_ARCH_TIMER
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config ARM_ARCH_TIMER
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bool
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bool
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@ -17,5 +17,4 @@ obj-$(CONFIG_ARMADA_370_XP_TIMER) += time-armada-370-xp.o
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obj-$(CONFIG_ARCH_BCM2835) += bcm2835_timer.o
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obj-$(CONFIG_ARCH_BCM2835) += bcm2835_timer.o
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obj-$(CONFIG_SUNXI_TIMER) += sunxi_timer.o
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obj-$(CONFIG_SUNXI_TIMER) += sunxi_timer.o
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obj-$(CONFIG_CLKSRC_ARM_GENERIC) += arm_generic.o
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obj-$(CONFIG_ARM_ARCH_TIMER) += arm_arch_timer.o
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obj-$(CONFIG_ARM_ARCH_TIMER) += arm_arch_timer.o
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@ -338,6 +338,7 @@ out:
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static const struct of_device_id arch_timer_of_match[] __initconst = {
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static const struct of_device_id arch_timer_of_match[] __initconst = {
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{ .compatible = "arm,armv7-timer", },
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{ .compatible = "arm,armv7-timer", },
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{ .compatible = "arm,armv8-timer", },
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{},
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{},
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};
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};
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@ -1,232 +0,0 @@
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/*
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* Generic timers support
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*
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* Copyright (C) 2012 ARM Ltd.
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* Author: Marc Zyngier <marc.zyngier@arm.com>
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*
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* This program is free software; you can redistribute it and/or modify
|
|
||||||
* it under the terms of the GNU General Public License version 2 as
|
|
||||||
* published by the Free Software Foundation.
|
|
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*
|
|
||||||
* This program is distributed in the hope that it will be useful,
|
|
||||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
||||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
||||||
* GNU General Public License for more details.
|
|
||||||
*
|
|
||||||
* You should have received a copy of the GNU General Public License
|
|
||||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
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*/
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#include <linux/init.h>
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#include <linux/kernel.h>
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#include <linux/delay.h>
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#include <linux/device.h>
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#include <linux/smp.h>
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#include <linux/cpu.h>
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#include <linux/jiffies.h>
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#include <linux/interrupt.h>
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#include <linux/clockchips.h>
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#include <linux/of_irq.h>
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#include <linux/io.h>
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#include <clocksource/arm_generic.h>
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#include <asm/arm_generic.h>
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static u32 arch_timer_rate;
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static u64 sched_clock_mult __read_mostly;
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static DEFINE_PER_CPU(struct clock_event_device, arch_timer_evt);
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static int arch_timer_ppi;
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static irqreturn_t arch_timer_handle_irq(int irq, void *dev_id)
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{
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struct clock_event_device *evt = dev_id;
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unsigned long ctrl;
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ctrl = arch_timer_reg_read(ARCH_TIMER_REG_CTRL);
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if (ctrl & ARCH_TIMER_CTRL_ISTATUS) {
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ctrl |= ARCH_TIMER_CTRL_IMASK;
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arch_timer_reg_write(ARCH_TIMER_REG_CTRL, ctrl);
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|
||||||
evt->event_handler(evt);
|
|
||||||
return IRQ_HANDLED;
|
|
||||||
}
|
|
||||||
|
|
||||||
return IRQ_NONE;
|
|
||||||
}
|
|
||||||
|
|
||||||
static void arch_timer_stop(void)
|
|
||||||
{
|
|
||||||
unsigned long ctrl;
|
|
||||||
|
|
||||||
ctrl = arch_timer_reg_read(ARCH_TIMER_REG_CTRL);
|
|
||||||
ctrl &= ~ARCH_TIMER_CTRL_ENABLE;
|
|
||||||
arch_timer_reg_write(ARCH_TIMER_REG_CTRL, ctrl);
|
|
||||||
}
|
|
||||||
|
|
||||||
static void arch_timer_set_mode(enum clock_event_mode mode,
|
|
||||||
struct clock_event_device *clk)
|
|
||||||
{
|
|
||||||
switch (mode) {
|
|
||||||
case CLOCK_EVT_MODE_UNUSED:
|
|
||||||
case CLOCK_EVT_MODE_SHUTDOWN:
|
|
||||||
arch_timer_stop();
|
|
||||||
break;
|
|
||||||
default:
|
|
||||||
break;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
static int arch_timer_set_next_event(unsigned long evt,
|
|
||||||
struct clock_event_device *unused)
|
|
||||||
{
|
|
||||||
unsigned long ctrl;
|
|
||||||
|
|
||||||
ctrl = arch_timer_reg_read(ARCH_TIMER_REG_CTRL);
|
|
||||||
ctrl |= ARCH_TIMER_CTRL_ENABLE;
|
|
||||||
ctrl &= ~ARCH_TIMER_CTRL_IMASK;
|
|
||||||
|
|
||||||
arch_timer_reg_write(ARCH_TIMER_REG_TVAL, evt);
|
|
||||||
arch_timer_reg_write(ARCH_TIMER_REG_CTRL, ctrl);
|
|
||||||
|
|
||||||
return 0;
|
|
||||||
}
|
|
||||||
|
|
||||||
static void __cpuinit arch_timer_setup(struct clock_event_device *clk)
|
|
||||||
{
|
|
||||||
/* Let's make sure the timer is off before doing anything else */
|
|
||||||
arch_timer_stop();
|
|
||||||
|
|
||||||
clk->features = CLOCK_EVT_FEAT_ONESHOT | CLOCK_EVT_FEAT_C3STOP;
|
|
||||||
clk->name = "arch_sys_timer";
|
|
||||||
clk->rating = 400;
|
|
||||||
clk->set_mode = arch_timer_set_mode;
|
|
||||||
clk->set_next_event = arch_timer_set_next_event;
|
|
||||||
clk->irq = arch_timer_ppi;
|
|
||||||
clk->cpumask = cpumask_of(smp_processor_id());
|
|
||||||
|
|
||||||
clockevents_config_and_register(clk, arch_timer_rate,
|
|
||||||
0xf, 0x7fffffff);
|
|
||||||
|
|
||||||
enable_percpu_irq(clk->irq, 0);
|
|
||||||
|
|
||||||
/* Ensure the virtual counter is visible to userspace for the vDSO. */
|
|
||||||
arch_counter_enable_user_access();
|
|
||||||
}
|
|
||||||
|
|
||||||
static void __init arch_timer_calibrate(void)
|
|
||||||
{
|
|
||||||
if (arch_timer_rate == 0) {
|
|
||||||
arch_timer_reg_write(ARCH_TIMER_REG_CTRL, 0);
|
|
||||||
arch_timer_rate = arch_timer_reg_read(ARCH_TIMER_REG_FREQ);
|
|
||||||
|
|
||||||
/* Check the timer frequency. */
|
|
||||||
if (arch_timer_rate == 0)
|
|
||||||
panic("Architected timer frequency is set to zero.\n"
|
|
||||||
"You must set this in your .dts file\n");
|
|
||||||
}
|
|
||||||
|
|
||||||
/* Cache the sched_clock multiplier to save a divide in the hot path. */
|
|
||||||
|
|
||||||
sched_clock_mult = DIV_ROUND_CLOSEST(NSEC_PER_SEC, arch_timer_rate);
|
|
||||||
|
|
||||||
pr_info("Architected local timer running at %u.%02uMHz.\n",
|
|
||||||
arch_timer_rate / 1000000, (arch_timer_rate / 10000) % 100);
|
|
||||||
}
|
|
||||||
|
|
||||||
static cycle_t arch_counter_read(struct clocksource *cs)
|
|
||||||
{
|
|
||||||
return arch_counter_get_cntpct();
|
|
||||||
}
|
|
||||||
|
|
||||||
static struct clocksource clocksource_counter = {
|
|
||||||
.name = "arch_sys_counter",
|
|
||||||
.rating = 400,
|
|
||||||
.read = arch_counter_read,
|
|
||||||
.mask = CLOCKSOURCE_MASK(56),
|
|
||||||
.flags = (CLOCK_SOURCE_IS_CONTINUOUS | CLOCK_SOURCE_VALID_FOR_HRES),
|
|
||||||
};
|
|
||||||
|
|
||||||
int read_current_timer(unsigned long *timer_value)
|
|
||||||
{
|
|
||||||
*timer_value = arch_counter_get_cntpct();
|
|
||||||
return 0;
|
|
||||||
}
|
|
||||||
|
|
||||||
unsigned long long notrace sched_clock(void)
|
|
||||||
{
|
|
||||||
return arch_counter_get_cntvct() * sched_clock_mult;
|
|
||||||
}
|
|
||||||
|
|
||||||
static int __cpuinit arch_timer_cpu_notify(struct notifier_block *self,
|
|
||||||
unsigned long action, void *hcpu)
|
|
||||||
{
|
|
||||||
int cpu = (long)hcpu;
|
|
||||||
struct clock_event_device *clk = per_cpu_ptr(&arch_timer_evt, cpu);
|
|
||||||
|
|
||||||
switch(action) {
|
|
||||||
case CPU_STARTING:
|
|
||||||
case CPU_STARTING_FROZEN:
|
|
||||||
arch_timer_setup(clk);
|
|
||||||
break;
|
|
||||||
|
|
||||||
case CPU_DYING:
|
|
||||||
case CPU_DYING_FROZEN:
|
|
||||||
pr_debug("arch_timer_teardown disable IRQ%d cpu #%d\n",
|
|
||||||
clk->irq, cpu);
|
|
||||||
disable_percpu_irq(clk->irq);
|
|
||||||
arch_timer_set_mode(CLOCK_EVT_MODE_UNUSED, clk);
|
|
||||||
break;
|
|
||||||
}
|
|
||||||
|
|
||||||
return NOTIFY_OK;
|
|
||||||
}
|
|
||||||
|
|
||||||
static struct notifier_block __cpuinitdata arch_timer_cpu_nb = {
|
|
||||||
.notifier_call = arch_timer_cpu_notify,
|
|
||||||
};
|
|
||||||
|
|
||||||
static const struct of_device_id arch_timer_of_match[] __initconst = {
|
|
||||||
{ .compatible = "arm,armv8-timer" },
|
|
||||||
{},
|
|
||||||
};
|
|
||||||
|
|
||||||
int __init arm_generic_timer_init(void)
|
|
||||||
{
|
|
||||||
struct device_node *np;
|
|
||||||
int err;
|
|
||||||
u32 freq;
|
|
||||||
|
|
||||||
np = of_find_matching_node(NULL, arch_timer_of_match);
|
|
||||||
if (!np) {
|
|
||||||
pr_err("arch_timer: can't find DT node\n");
|
|
||||||
return -ENODEV;
|
|
||||||
}
|
|
||||||
|
|
||||||
/* Try to determine the frequency from the device tree or CNTFRQ */
|
|
||||||
if (!of_property_read_u32(np, "clock-frequency", &freq))
|
|
||||||
arch_timer_rate = freq;
|
|
||||||
arch_timer_calibrate();
|
|
||||||
|
|
||||||
arch_timer_ppi = irq_of_parse_and_map(np, 0);
|
|
||||||
pr_info("arch_timer: found %s irq %d\n", np->name, arch_timer_ppi);
|
|
||||||
|
|
||||||
err = request_percpu_irq(arch_timer_ppi, arch_timer_handle_irq,
|
|
||||||
np->name, &arch_timer_evt);
|
|
||||||
if (err) {
|
|
||||||
pr_err("arch_timer: can't register interrupt %d (%d)\n",
|
|
||||||
arch_timer_ppi, err);
|
|
||||||
return err;
|
|
||||||
}
|
|
||||||
|
|
||||||
clocksource_register_hz(&clocksource_counter, arch_timer_rate);
|
|
||||||
|
|
||||||
/* Calibrate the delay loop directly */
|
|
||||||
lpj_fine = DIV_ROUND_CLOSEST(arch_timer_rate, HZ);
|
|
||||||
|
|
||||||
/* Immediately configure the timer on the boot CPU */
|
|
||||||
arch_timer_setup(this_cpu_ptr(&arch_timer_evt));
|
|
||||||
|
|
||||||
register_cpu_notifier(&arch_timer_cpu_nb);
|
|
||||||
|
|
||||||
return 0;
|
|
||||||
}
|
|
||||||
|
|
@ -1,21 +0,0 @@
|
||||||
/*
|
|
||||||
* Copyright (C) 2012 ARM Ltd.
|
|
||||||
*
|
|
||||||
* This program is free software; you can redistribute it and/or modify
|
|
||||||
* it under the terms of the GNU General Public License version 2 as
|
|
||||||
* published by the Free Software Foundation.
|
|
||||||
*
|
|
||||||
* This program is distributed in the hope that it will be useful,
|
|
||||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
||||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
||||||
* GNU General Public License for more details.
|
|
||||||
*
|
|
||||||
* You should have received a copy of the GNU General Public License
|
|
||||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
|
||||||
*/
|
|
||||||
#ifndef __CLKSOURCE_ARM_GENERIC_H
|
|
||||||
#define __CLKSOURCE_ARM_GENERIC_H
|
|
||||||
|
|
||||||
extern int arm_generic_timer_init(void);
|
|
||||||
|
|
||||||
#endif
|
|
||||||
Loading…
Reference in New Issue