powerpc: uic: Cleanup flow type handling
The core irq_set_type() function updates the flow type when the chip callback returns 0. So setting the type is bogus. The core also updates IRQ_LEVEL. Use irq_data to get the level type information in the chip functions. Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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@ -57,7 +57,6 @@ struct uic {
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static void uic_unmask_irq(struct irq_data *d)
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{
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struct irq_desc *desc = irq_to_desc(d->irq);
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struct uic *uic = irq_data_get_irq_chip_data(d);
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unsigned int src = uic_irq_to_hw(d->irq);
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unsigned long flags;
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@ -66,7 +65,7 @@ static void uic_unmask_irq(struct irq_data *d)
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sr = 1 << (31-src);
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spin_lock_irqsave(&uic->lock, flags);
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/* ack level-triggered interrupts here */
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if (desc->status & IRQ_LEVEL)
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if (irqd_is_level_type(d))
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mtdcr(uic->dcrbase + UIC_SR, sr);
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er = mfdcr(uic->dcrbase + UIC_ER);
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er |= sr;
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@ -101,7 +100,6 @@ static void uic_ack_irq(struct irq_data *d)
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static void uic_mask_ack_irq(struct irq_data *d)
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{
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struct irq_desc *desc = irq_to_desc(d->irq);
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struct uic *uic = irq_data_get_irq_chip_data(d);
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unsigned int src = uic_irq_to_hw(d->irq);
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unsigned long flags;
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@ -120,7 +118,7 @@ static void uic_mask_ack_irq(struct irq_data *d)
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* level interrupts are ack'ed after the actual
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* isr call in the uic_unmask_irq()
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*/
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if (!(desc->status & IRQ_LEVEL))
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if (!irqd_is_level_type(d))
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mtdcr(uic->dcrbase + UIC_SR, sr);
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spin_unlock_irqrestore(&uic->lock, flags);
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}
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@ -129,7 +127,6 @@ static int uic_set_irq_type(struct irq_data *d, unsigned int flow_type)
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{
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struct uic *uic = irq_data_get_irq_chip_data(d);
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unsigned int src = uic_irq_to_hw(d->irq);
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struct irq_desc *desc = irq_to_desc(d->irq);
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unsigned long flags;
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int trigger, polarity;
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u32 tr, pr, mask;
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@ -166,11 +163,6 @@ static int uic_set_irq_type(struct irq_data *d, unsigned int flow_type)
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mtdcr(uic->dcrbase + UIC_PR, pr);
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mtdcr(uic->dcrbase + UIC_TR, tr);
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desc->status &= ~(IRQ_TYPE_SENSE_MASK | IRQ_LEVEL);
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desc->status |= flow_type & IRQ_TYPE_SENSE_MASK;
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if (!trigger)
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desc->status |= IRQ_LEVEL;
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spin_unlock_irqrestore(&uic->lock, flags);
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return 0;
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@ -221,16 +213,17 @@ static struct irq_host_ops uic_host_ops = {
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void uic_irq_cascade(unsigned int virq, struct irq_desc *desc)
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{
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struct irq_chip *chip = get_irq_desc_chip(desc);
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struct irq_data *idata = irq_desc_get_irq_data(desc);
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struct uic *uic = get_irq_data(virq);
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u32 msr;
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int src;
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int subvirq;
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raw_spin_lock(&desc->lock);
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if (desc->status & IRQ_LEVEL)
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chip->irq_mask(&desc->irq_data);
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if (irqd_is_level_type(idata))
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chip->irq_mask(idata);
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else
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chip->irq_mask_ack(&desc->irq_data);
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chip->irq_mask_ack(idata);
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raw_spin_unlock(&desc->lock);
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msr = mfdcr(uic->dcrbase + UIC_MSR);
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@ -244,10 +237,10 @@ void uic_irq_cascade(unsigned int virq, struct irq_desc *desc)
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uic_irq_ret:
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raw_spin_lock(&desc->lock);
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if (irqd_is_level_type(&desc->irq_data))
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chip->irq_ack(&desc->irq_data);
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if (!(irq_is_disabled(&desc->irq_data) && chip->irq_unmask)
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chip->irq_unmask(&desc->irq_data);
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if (irqd_is_level_type(idata))
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chip->irq_ack(idata);
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if (!irqd_irq_disabled(idata) && chip->irq_unmask)
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chip->irq_unmask(idata);
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raw_spin_unlock(&desc->lock);
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}
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