omap4: clockdomain: Fix the CPUx domain name
The register naming convention for clock domain control inside power domain instance is: OMAPXXXX_<partition>_<power_domain>_<clock_domain>_CDOFFS Both CPU0 and CPU1 use MPU as clock domain name instead of CPU0 and CPU1. Change the name to stick to the convention. The autogen scripts are updated accordingly. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Cc: Paul Walmsley <paul@pwsan.com> Cc: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
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@ -150,7 +150,7 @@ static struct clockdomain mpu0_44xx_clkdm = {
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.pwrdm = { .name = "cpu0_pwrdm" },
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.prcm_partition = OMAP4430_PRCM_MPU_PARTITION,
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.cm_inst = OMAP4430_PRCM_MPU_CPU0_INST,
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.clkdm_offs = OMAP4430_PRCM_MPU_CPU0_MPU_CDOFFS,
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.clkdm_offs = OMAP4430_PRCM_MPU_CPU0_CPU0_CDOFFS,
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.flags = CLKDM_CAN_FORCE_WAKEUP | CLKDM_CAN_HWSUP,
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.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
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};
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@ -160,7 +160,7 @@ static struct clockdomain mpu1_44xx_clkdm = {
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.pwrdm = { .name = "cpu1_pwrdm" },
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.prcm_partition = OMAP4430_PRCM_MPU_PARTITION,
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.cm_inst = OMAP4430_PRCM_MPU_CPU1_INST,
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.clkdm_offs = OMAP4430_PRCM_MPU_CPU1_MPU_CDOFFS,
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.clkdm_offs = OMAP4430_PRCM_MPU_CPU1_CPU1_CDOFFS,
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.flags = CLKDM_CAN_FORCE_WAKEUP | CLKDM_CAN_HWSUP,
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.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
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};
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@ -38,8 +38,8 @@
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#define OMAP4430_PRCM_MPU_CPU1_INST 0x0800
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/* PRCM_MPU clockdomain register offsets (from instance start) */
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#define OMAP4430_PRCM_MPU_CPU0_MPU_CDOFFS 0x0018
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#define OMAP4430_PRCM_MPU_CPU1_MPU_CDOFFS 0x0018
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#define OMAP4430_PRCM_MPU_CPU0_CPU0_CDOFFS 0x0018
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#define OMAP4430_PRCM_MPU_CPU1_CPU1_CDOFFS 0x0018
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/*
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