Blackfin arch: flush/inv the correct range when using write back cache and fix bugs find by dmacopy
- flush/inv the correct range - dmacopy test failed when policy is write_back - invalidate before dma http://blackfin.uclinux.org/gf/project/uclinux-dist/tracker/?action=TrackerItemEdit&tracker_item_id=3367 It's the cache invalidate what is causing the issue. There is no invalidate only instruction it's always: FLUSHINV So when we "invalidate" after the DMA we might (do) overwrite freshly dma'ed data by dirty Cache WB content. Fixed by moving the "invalidate" at the beginning of dma_memcpy. Signed-off-by: Michael Hennerich <michael.hennerich@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
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@ -436,6 +436,10 @@ static void *__dma_memcpy(void *dest, const void *src, size_t size)
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blackfin_dcache_flush_range((unsigned int)src,
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(unsigned int)(src + size));
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if ((unsigned long)dest < memory_end)
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blackfin_dcache_invalidate_range((unsigned int)dest,
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(unsigned int)(dest + size));
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bfin_write_MDMA_D0_IRQ_STATUS(DMA_DONE | DMA_ERR);
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if ((unsigned long)src < (unsigned long)dest)
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@ -543,6 +547,8 @@ static void *__dma_memcpy(void *dest, const void *src, size_t size)
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}
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}
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SSYNC();
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while (!(bfin_read_MDMA_D0_IRQ_STATUS() & DMA_DONE))
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;
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@ -552,9 +558,6 @@ static void *__dma_memcpy(void *dest, const void *src, size_t size)
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bfin_write_MDMA_S0_CONFIG(0);
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bfin_write_MDMA_D0_CONFIG(0);
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if ((unsigned long)dest < memory_end)
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blackfin_dcache_invalidate_range((unsigned int)dest,
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(unsigned int)(dest + size));
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local_irq_restore(flags);
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return dest;
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@ -589,7 +592,8 @@ void dma_outsb(unsigned long addr, const void *buf, unsigned short len)
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local_irq_save(flags);
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blackfin_dcache_flush_range((unsigned int)buf, (unsigned int)(buf) + len);
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blackfin_dcache_flush_range((unsigned int)buf,
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(unsigned int)(buf) + len);
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bfin_write_MDMA_D0_START_ADDR(addr);
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bfin_write_MDMA_D0_X_COUNT(len);
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@ -604,6 +608,8 @@ void dma_outsb(unsigned long addr, const void *buf, unsigned short len)
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bfin_write_MDMA_S0_CONFIG(DMAEN | WDSIZE_8);
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bfin_write_MDMA_D0_CONFIG(WNR | DI_EN | DMAEN | WDSIZE_8);
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SSYNC();
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while (!(bfin_read_MDMA_D0_IRQ_STATUS() & DMA_DONE));
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bfin_write_MDMA_D0_IRQ_STATUS(DMA_DONE | DMA_ERR);
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@ -620,6 +626,9 @@ void dma_insb(unsigned long addr, void *buf, unsigned short len)
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{
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unsigned long flags;
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blackfin_dcache_invalidate_range((unsigned int)buf,
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(unsigned int)(buf) + len);
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local_irq_save(flags);
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bfin_write_MDMA_D0_START_ADDR(buf);
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bfin_write_MDMA_D0_X_COUNT(len);
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@ -634,7 +643,7 @@ void dma_insb(unsigned long addr, void *buf, unsigned short len)
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bfin_write_MDMA_S0_CONFIG(DMAEN | WDSIZE_8);
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bfin_write_MDMA_D0_CONFIG(WNR | DI_EN | DMAEN | WDSIZE_8);
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blackfin_dcache_invalidate_range((unsigned int)buf, (unsigned int)(buf) + len);
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SSYNC();
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while (!(bfin_read_MDMA_D0_IRQ_STATUS() & DMA_DONE));
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@ -653,7 +662,8 @@ void dma_outsw(unsigned long addr, const void *buf, unsigned short len)
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local_irq_save(flags);
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blackfin_dcache_flush_range((unsigned int)buf, (unsigned int)(buf) + len);
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blackfin_dcache_flush_range((unsigned int)buf,
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(unsigned int)(buf) + len * sizeof(short));
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bfin_write_MDMA_D0_START_ADDR(addr);
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bfin_write_MDMA_D0_X_COUNT(len);
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@ -668,6 +678,8 @@ void dma_outsw(unsigned long addr, const void *buf, unsigned short len)
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bfin_write_MDMA_S0_CONFIG(DMAEN | WDSIZE_16);
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bfin_write_MDMA_D0_CONFIG(WNR | DI_EN | DMAEN | WDSIZE_16);
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SSYNC();
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while (!(bfin_read_MDMA_D0_IRQ_STATUS() & DMA_DONE));
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bfin_write_MDMA_D0_IRQ_STATUS(DMA_DONE | DMA_ERR);
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@ -683,6 +695,9 @@ void dma_insw(unsigned long addr, void *buf, unsigned short len)
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{
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unsigned long flags;
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blackfin_dcache_invalidate_range((unsigned int)buf,
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(unsigned int)(buf) + len * sizeof(short));
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local_irq_save(flags);
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bfin_write_MDMA_D0_START_ADDR(buf);
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@ -698,7 +713,7 @@ void dma_insw(unsigned long addr, void *buf, unsigned short len)
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bfin_write_MDMA_S0_CONFIG(DMAEN | WDSIZE_16);
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bfin_write_MDMA_D0_CONFIG(WNR | DI_EN | DMAEN | WDSIZE_16);
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blackfin_dcache_invalidate_range((unsigned int)buf, (unsigned int)(buf) + len);
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SSYNC();
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while (!(bfin_read_MDMA_D0_IRQ_STATUS() & DMA_DONE));
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@ -717,7 +732,8 @@ void dma_outsl(unsigned long addr, const void *buf, unsigned short len)
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local_irq_save(flags);
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blackfin_dcache_flush_range((unsigned int)buf, (unsigned int)(buf) + len);
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blackfin_dcache_flush_range((unsigned int)buf,
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(unsigned int)(buf) + len * sizeof(long));
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bfin_write_MDMA_D0_START_ADDR(addr);
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bfin_write_MDMA_D0_X_COUNT(len);
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@ -732,6 +748,8 @@ void dma_outsl(unsigned long addr, const void *buf, unsigned short len)
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bfin_write_MDMA_S0_CONFIG(DMAEN | WDSIZE_32);
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bfin_write_MDMA_D0_CONFIG(WNR | DI_EN | DMAEN | WDSIZE_32);
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SSYNC();
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while (!(bfin_read_MDMA_D0_IRQ_STATUS() & DMA_DONE));
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bfin_write_MDMA_D0_IRQ_STATUS(DMA_DONE | DMA_ERR);
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@ -747,6 +765,9 @@ void dma_insl(unsigned long addr, void *buf, unsigned short len)
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{
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unsigned long flags;
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blackfin_dcache_invalidate_range((unsigned int)buf,
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(unsigned int)(buf) + len * sizeof(long));
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local_irq_save(flags);
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bfin_write_MDMA_D0_START_ADDR(buf);
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@ -762,7 +783,7 @@ void dma_insl(unsigned long addr, void *buf, unsigned short len)
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bfin_write_MDMA_S0_CONFIG(DMAEN | WDSIZE_32);
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bfin_write_MDMA_D0_CONFIG(WNR | DI_EN | DMAEN | WDSIZE_32);
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blackfin_dcache_invalidate_range((unsigned int)buf, (unsigned int)(buf) + len);
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SSYNC();
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while (!(bfin_read_MDMA_D0_IRQ_STATUS() & DMA_DONE));
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