[MIPS] SEAD: More build fixes.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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@ -30,19 +30,9 @@
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extern asmlinkage void mipsIRQ(void);
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asmlinkage void sead_hw0_irqdispatch(struct pt_regs *regs)
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{
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do_IRQ(SEADINT_UART0, regs);
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}
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asmlinkage void sead_hw1_irqdispatch(struct pt_regs *regs)
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{
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do_IRQ(SEADINT_UART1, regs);
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}
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void __init arch_init_irq(void)
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{
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mips_cpu_irq_init(0);
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mips_cpu_irq_init(MIPSCPU_INT_BASE);
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/* Now safe to set the exception vector. */
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set_except_vector(0, mipsIRQ);
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@ -45,7 +45,7 @@ const char *get_system_type(void)
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return "MIPS SEAD";
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}
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static void __init sead_setup(void)
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void __init plat_setup(void)
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{
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ioport_resource.end = 0x7fffffff;
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@ -69,7 +69,7 @@ static void __init serial_init(void)
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#else
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s.iobase = SEAD_UART0_REGS_BASE+3;
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#endif
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s.irq = SEADINT_UART0;
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s.irq = MIPSCPU_INT_BASE + MIPSCPU_INT_UART0;
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s.uartclk = SEAD_BASE_BAUD * 16;
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s.flags = ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST | ASYNC_AUTO_IRQ;
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s.iotype = 0;
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@ -20,7 +20,14 @@
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#ifndef _MIPS_SEADINT_H
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#define _MIPS_SEADINT_H
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#define SEADINT_UART0 2
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#define SEADINT_UART1 3
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/*
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* Interrupts 0..7 are used for SEAD CPU interrupts
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*/
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#define MIPSCPU_INT_BASE 0
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#define MIPSCPU_INT_UART0 2
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#define MIPSCPU_INT_UART1 3
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#define MIPSCPU_INT_CPUCTR 7
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#endif /* !(_MIPS_SEADINT_H) */
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