ath9k_hw: Updates for AR9485 1.1 chipsets.
Signed-off-by: Vivek Natarajan <vnatarajan@atheros.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
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8354dd3ebc
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1a63e2ce4e
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@ -28,7 +28,67 @@
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*/
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static void ar9003_hw_init_mode_regs(struct ath_hw *ah)
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{
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if (AR_SREV_9485(ah)) {
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if (AR_SREV_9485_11(ah)) {
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/* mac */
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INIT_INI_ARRAY(&ah->iniMac[ATH_INI_PRE], NULL, 0, 0);
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INIT_INI_ARRAY(&ah->iniMac[ATH_INI_CORE],
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ar9485_1_1_mac_core,
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ARRAY_SIZE(ar9485_1_1_mac_core), 2);
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INIT_INI_ARRAY(&ah->iniMac[ATH_INI_POST],
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ar9485_1_1_mac_postamble,
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ARRAY_SIZE(ar9485_1_1_mac_postamble), 5);
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/* bb */
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INIT_INI_ARRAY(&ah->iniBB[ATH_INI_PRE], ar9485_1_1,
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ARRAY_SIZE(ar9485_1_1), 2);
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INIT_INI_ARRAY(&ah->iniBB[ATH_INI_CORE],
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ar9485_1_1_baseband_core,
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ARRAY_SIZE(ar9485_1_1_baseband_core), 2);
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INIT_INI_ARRAY(&ah->iniBB[ATH_INI_POST],
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ar9485_1_1_baseband_postamble,
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ARRAY_SIZE(ar9485_1_1_baseband_postamble), 5);
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/* radio */
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INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_PRE], NULL, 0, 0);
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INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_CORE],
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ar9485_1_1_radio_core,
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ARRAY_SIZE(ar9485_1_1_radio_core), 2);
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INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_POST],
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ar9485_1_1_radio_postamble,
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ARRAY_SIZE(ar9485_1_1_radio_postamble), 2);
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/* soc */
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INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_PRE],
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ar9485_1_1_soc_preamble,
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ARRAY_SIZE(ar9485_1_1_soc_preamble), 2);
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INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_CORE], NULL, 0, 0);
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INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_POST], NULL, 0, 0);
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/* rx/tx gain */
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INIT_INI_ARRAY(&ah->iniModesRxGain,
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ar9485_common_rx_gain_1_1,
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ARRAY_SIZE(ar9485_common_rx_gain_1_1), 2);
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INIT_INI_ARRAY(&ah->iniModesTxGain,
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ar9485_modes_lowest_ob_db_tx_gain_1_1,
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ARRAY_SIZE(ar9485_modes_lowest_ob_db_tx_gain_1_1),
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5);
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/* Load PCIE SERDES settings from INI */
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/* Awake Setting */
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INIT_INI_ARRAY(&ah->iniPcieSerdes,
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ar9485_1_1_pcie_phy_pll_on_clkreq_disable_L1,
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ARRAY_SIZE(ar9485_1_1_pcie_phy_pll_on_clkreq_disable_L1),
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2);
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/* Sleep Setting */
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INIT_INI_ARRAY(&ah->iniPcieSerdesLowPower,
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ar9485_1_1_pcie_phy_pll_on_clkreq_disable_L1,
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ARRAY_SIZE(ar9485_1_1_pcie_phy_pll_on_clkreq_disable_L1),
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2);
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} else if (AR_SREV_9485(ah)) {
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/* mac */
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INIT_INI_ARRAY(&ah->iniMac[ATH_INI_PRE], NULL, 0, 0);
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INIT_INI_ARRAY(&ah->iniMac[ATH_INI_CORE],
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@ -85,8 +145,8 @@ static void ar9003_hw_init_mode_regs(struct ath_hw *ah)
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/* Sleep Setting */
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INIT_INI_ARRAY(&ah->iniPcieSerdesLowPower,
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ar9485_1_0_pcie_phy_pll_on_clkreq_enable_L1,
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ARRAY_SIZE(ar9485_1_0_pcie_phy_pll_on_clkreq_enable_L1),
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ar9485_1_0_pcie_phy_pll_on_clkreq_disable_L1,
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ARRAY_SIZE(ar9485_1_0_pcie_phy_pll_on_clkreq_disable_L1),
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2);
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} else {
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/* mac */
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@ -163,7 +223,12 @@ static void ar9003_tx_gain_table_apply(struct ath_hw *ah)
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switch (ar9003_hw_get_tx_gain_idx(ah)) {
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case 0:
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default:
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if (AR_SREV_9485(ah))
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if (AR_SREV_9485_11(ah))
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INIT_INI_ARRAY(&ah->iniModesTxGain,
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ar9485_modes_lowest_ob_db_tx_gain_1_1,
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ARRAY_SIZE(ar9485_modes_lowest_ob_db_tx_gain_1_1),
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5);
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else if (AR_SREV_9485(ah))
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INIT_INI_ARRAY(&ah->iniModesTxGain,
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ar9485Modes_lowest_ob_db_tx_gain_1_0,
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ARRAY_SIZE(ar9485Modes_lowest_ob_db_tx_gain_1_0),
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@ -175,10 +240,15 @@ static void ar9003_tx_gain_table_apply(struct ath_hw *ah)
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5);
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break;
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case 1:
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if (AR_SREV_9485(ah))
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if (AR_SREV_9485_11(ah))
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INIT_INI_ARRAY(&ah->iniModesTxGain,
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ar9485Modes_high_ob_db_tx_gain_1_1,
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ARRAY_SIZE(ar9485Modes_high_ob_db_tx_gain_1_1),
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5);
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else if (AR_SREV_9485(ah))
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INIT_INI_ARRAY(&ah->iniModesTxGain,
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ar9485Modes_high_ob_db_tx_gain_1_0,
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ARRAY_SIZE(ar9485Modes_lowest_ob_db_tx_gain_1_0),
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ARRAY_SIZE(ar9485Modes_high_ob_db_tx_gain_1_0),
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5);
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else
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INIT_INI_ARRAY(&ah->iniModesTxGain,
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@ -187,10 +257,15 @@ static void ar9003_tx_gain_table_apply(struct ath_hw *ah)
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5);
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break;
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case 2:
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if (AR_SREV_9485(ah))
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if (AR_SREV_9485_11(ah))
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INIT_INI_ARRAY(&ah->iniModesTxGain,
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ar9485Modes_low_ob_db_tx_gain_1_1,
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ARRAY_SIZE(ar9485Modes_low_ob_db_tx_gain_1_1),
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5);
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else if (AR_SREV_9485(ah))
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INIT_INI_ARRAY(&ah->iniModesTxGain,
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ar9485Modes_low_ob_db_tx_gain_1_0,
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ARRAY_SIZE(ar9485Modes_lowest_ob_db_tx_gain_1_0),
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ARRAY_SIZE(ar9485Modes_low_ob_db_tx_gain_1_0),
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5);
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else
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INIT_INI_ARRAY(&ah->iniModesTxGain,
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@ -199,7 +274,12 @@ static void ar9003_tx_gain_table_apply(struct ath_hw *ah)
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5);
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break;
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case 3:
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if (AR_SREV_9485(ah))
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if (AR_SREV_9485_11(ah))
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INIT_INI_ARRAY(&ah->iniModesTxGain,
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ar9485Modes_high_power_tx_gain_1_1,
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ARRAY_SIZE(ar9485Modes_high_power_tx_gain_1_1),
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5);
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else if (AR_SREV_9485(ah))
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INIT_INI_ARRAY(&ah->iniModesTxGain,
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ar9485Modes_high_power_tx_gain_1_0,
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ARRAY_SIZE(ar9485Modes_high_power_tx_gain_1_0),
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@ -218,7 +298,12 @@ static void ar9003_rx_gain_table_apply(struct ath_hw *ah)
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switch (ar9003_hw_get_rx_gain_idx(ah)) {
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case 0:
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default:
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if (AR_SREV_9485(ah))
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if (AR_SREV_9485_11(ah))
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INIT_INI_ARRAY(&ah->iniModesRxGain,
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ar9485_common_rx_gain_1_1,
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ARRAY_SIZE(ar9485_common_rx_gain_1_1),
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2);
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else if (AR_SREV_9485(ah))
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INIT_INI_ARRAY(&ah->iniModesRxGain,
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ar9485Common_rx_gain_1_0,
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ARRAY_SIZE(ar9485Common_rx_gain_1_0),
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@ -230,7 +315,12 @@ static void ar9003_rx_gain_table_apply(struct ath_hw *ah)
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2);
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break;
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case 1:
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if (AR_SREV_9485(ah))
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if (AR_SREV_9485_11(ah))
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INIT_INI_ARRAY(&ah->iniModesRxGain,
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ar9485Common_wo_xlna_rx_gain_1_1,
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ARRAY_SIZE(ar9485Common_wo_xlna_rx_gain_1_1),
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2);
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else if (AR_SREV_9485(ah))
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INIT_INI_ARRAY(&ah->iniModesRxGain,
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ar9485Common_wo_xlna_rx_gain_1_0,
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ARRAY_SIZE(ar9485Common_wo_xlna_rx_gain_1_0),
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File diff suppressed because it is too large
Load Diff
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@ -789,6 +789,7 @@
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#define AR_SREV_REVISION_9300_20 2 /* 2.0 and 2.1 */
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#define AR_SREV_VERSION_9485 0x240
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#define AR_SREV_REVISION_9485_10 0
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#define AR_SREV_REVISION_9485_11 1
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#define AR_SREV_5416(_ah) \
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(((_ah)->hw_version.macVersion == AR_SREV_VERSION_5416_PCI) || \
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@ -866,6 +867,9 @@
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#define AR_SREV_9485_10(_ah) \
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(AR_SREV_9485(_ah) && \
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((_ah)->hw_version.macRev == AR_SREV_REVISION_9485_10))
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#define AR_SREV_9485_11(_ah) \
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(AR_SREV_9485(_ah) && \
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((_ah)->hw_version.macRev == AR_SREV_REVISION_9485_11))
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#define AR_SREV_9285E_20(_ah) \
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(AR_SREV_9285_12_OR_LATER(_ah) && \
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