bgmac: replace some magic values with defines
Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -877,9 +877,9 @@ static void bgmac_chip_reset(struct bgmac *bgmac)
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}
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iost = bcma_aread32(core, BCMA_IOST);
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if ((ci->id == BCMA_CHIP_ID_BCM5357 && ci->pkg == 10) ||
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if ((ci->id == BCMA_CHIP_ID_BCM5357 && ci->pkg == BCMA_PKG_ID_BCM47186) ||
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(ci->id == BCMA_CHIP_ID_BCM4749 && ci->pkg == 10) ||
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(ci->id == BCMA_CHIP_ID_BCM53572 && ci->pkg == 9))
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(ci->id == BCMA_CHIP_ID_BCM53572 && ci->pkg == BCMA_PKG_ID_BCM47188))
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iost &= ~BGMAC_BCMA_IOST_ATTACHED;
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if (iost & BGMAC_BCMA_IOST_ATTACHED) {
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@ -891,12 +891,16 @@ static void bgmac_chip_reset(struct bgmac *bgmac)
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bcma_core_enable(core, flags);
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if (core->id.rev > 2) {
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bgmac_set(bgmac, BCMA_CLKCTLST, 1 << 8);
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bgmac_wait_value(bgmac->core, BCMA_CLKCTLST, 1 << 24, 1 << 24,
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bgmac_set(bgmac, BCMA_CLKCTLST,
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BGMAC_BCMA_CLKCTLST_MISC_PLL_REQ);
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bgmac_wait_value(bgmac->core, BCMA_CLKCTLST,
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BGMAC_BCMA_CLKCTLST_MISC_PLL_ST,
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BGMAC_BCMA_CLKCTLST_MISC_PLL_ST,
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1000);
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}
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if (ci->id == BCMA_CHIP_ID_BCM5357 || ci->id == BCMA_CHIP_ID_BCM4749 ||
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if (ci->id == BCMA_CHIP_ID_BCM5357 ||
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ci->id == BCMA_CHIP_ID_BCM4749 ||
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ci->id == BCMA_CHIP_ID_BCM53572) {
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struct bcma_drv_cc *cc = &bgmac->core->bus->drv_cc;
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u8 et_swtype = 0;
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@ -911,10 +915,11 @@ static void bgmac_chip_reset(struct bgmac *bgmac)
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et_swtype &= 0x0f;
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et_swtype <<= 4;
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sw_type = et_swtype;
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} else if (ci->id == BCMA_CHIP_ID_BCM5357 && ci->pkg == 9) {
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} else if (ci->id == BCMA_CHIP_ID_BCM5357 && ci->pkg == BCMA_PKG_ID_BCM5358) {
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sw_type = BGMAC_CHIPCTL_1_SW_TYPE_EPHYRMII;
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} else if ((ci->id != BCMA_CHIP_ID_BCM53572 && ci->pkg == 10) ||
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(ci->id == BCMA_CHIP_ID_BCM53572 && ci->pkg == 9)) {
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} else if ((ci->id == BCMA_CHIP_ID_BCM5357 && ci->pkg == BCMA_PKG_ID_BCM47186) ||
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(ci->id == BCMA_CHIP_ID_BCM4749 && ci->pkg == 10) ||
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(ci->id == BCMA_CHIP_ID_BCM53572 && ci->pkg == BCMA_PKG_ID_BCM47188)) {
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sw_type = BGMAC_CHIPCTL_1_IF_TYPE_RGMII |
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BGMAC_CHIPCTL_1_SW_TYPE_RGMII;
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}
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@ -95,7 +95,11 @@
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#define BGMAC_RXQ_CTL_MDP_SHIFT 24
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#define BGMAC_GPIO_SELECT 0x194
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#define BGMAC_GPIO_OUTPUT_EN 0x198
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/* For 0x1e0 see BCMA_CLKCTLST */
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/* For 0x1e0 see BCMA_CLKCTLST. Below are BGMAC specific bits */
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#define BGMAC_BCMA_CLKCTLST_MISC_PLL_REQ 0x00000100
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#define BGMAC_BCMA_CLKCTLST_MISC_PLL_ST 0x01000000
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#define BGMAC_HW_WAR 0x1e4
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#define BGMAC_PWR_CTL 0x1e8
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#define BGMAC_DMA_BASE0 0x200 /* Tx and Rx controller */
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