ARM: S5P: Moves initial map for merging S5P64X0
This patch moves some initial maps from plat-s5p to machine, so that can merge mach-s5p6440 and mach-s5p6450. Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This commit is contained in:
parent
13904fba37
commit
19a2c06548
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@ -1,7 +1,7 @@
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/* linux/arch/arm/mach-s5p6440/cpu.c
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*
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* Copyright (c) 2009 Samsung Electronics Co., Ltd.
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* http://www.samsung.com/
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* Copyright (c) 2009-2010 Samsung Electronics Co., Ltd.
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* http://www.samsung.com
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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@ -40,6 +40,32 @@
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#include <plat/s5p6440.h>
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#include <plat/adc-core.h>
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/* Initial IO mappings */
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static struct map_desc s5p6440_iodesc[] __initdata = {
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{
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.virtual = (unsigned long)S5P_VA_GPIO,
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.pfn = __phys_to_pfn(S5P6440_PA_GPIO),
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.length = SZ_4K,
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.type = MT_DEVICE,
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}, {
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.virtual = (unsigned long)VA_VIC0,
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.pfn = __phys_to_pfn(S5P6440_PA_VIC0),
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.length = SZ_16K,
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.type = MT_DEVICE,
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}, {
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.virtual = (unsigned long)VA_VIC1,
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.pfn = __phys_to_pfn(S5P6440_PA_VIC1),
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.length = SZ_16K,
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.type = MT_DEVICE,
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}, {
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.virtual = (unsigned long)S3C_VA_UART,
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.pfn = __phys_to_pfn(S3C_PA_UART),
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.length = SZ_512K,
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.type = MT_DEVICE,
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}
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};
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static void s5p6440_idle(void)
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{
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unsigned long val;
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@ -55,15 +81,18 @@ static void s5p6440_idle(void)
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local_irq_enable();
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}
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/* s5p6440_map_io
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/*
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* s5p6440_map_io
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*
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* register the standard cpu IO areas
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*/
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*/
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void __init s5p6440_map_io(void)
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{
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/* initialize any device information early */
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s3c_adc_setname("s3c64xx-adc");
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iotable_init(s5p6440_iodesc, ARRAY_SIZE(s5p6440_iodesc));
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}
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void __init s5p6440_init_clocks(int xtal)
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@ -24,23 +24,18 @@
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#define S5P_PA_SYSCON S5P6440_PA_SYSCON
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#define S5P6440_PA_GPIO (0xE0308000)
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#define S5P_PA_GPIO S5P6440_PA_GPIO
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#define S5P6440_PA_VIC0 (0xE4000000)
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#define S5P_PA_VIC0 S5P6440_PA_VIC0
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#define S5P6440_PA_VIC1 (0xE4100000)
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#define S5P6440_PA_PDMA 0xE9000000
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#define S5P6440_PA_VIC1 (0xE4100000)
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#define S5P_PA_VIC1 S5P6440_PA_VIC1
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#define S5P6440_PA_TIMER (0xEA000000)
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#define S5P_PA_TIMER S5P6440_PA_TIMER
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#define S5P6440_PA_RTC (0xEA100000)
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#define S5P6440_PA_WDT (0xEA200000)
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#define S5P_PA_WDT S5P6440_PA_WDT
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#define S5P6440_PA_UART (0xEC000000)
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@ -1,7 +1,7 @@
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/* linux/arch/arm/mach-s5p6442/cpu.c
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*
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* Copyright (c) 2010 Samsung Electronics Co., Ltd.
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* http://www.samsung.com/
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* http://www.samsung.com
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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@ -47,11 +47,31 @@ static struct map_desc s5p6442_iodesc[] __initdata = {
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.pfn = __phys_to_pfn(S5P6442_PA_SYSTIMER),
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.length = SZ_16K,
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.type = MT_DEVICE,
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}, {
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.virtual = (unsigned long)S5P_VA_GPIO,
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.pfn = __phys_to_pfn(S5P6442_PA_GPIO),
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.length = SZ_4K,
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.type = MT_DEVICE,
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}, {
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.virtual = (unsigned long)VA_VIC0,
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.pfn = __phys_to_pfn(S5P6442_PA_VIC0),
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.length = SZ_16K,
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.type = MT_DEVICE,
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}, {
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.virtual = (unsigned long)VA_VIC1,
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.pfn = __phys_to_pfn(S5P6442_PA_VIC1),
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.length = SZ_16K,
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.type = MT_DEVICE,
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}, {
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.virtual = (unsigned long)VA_VIC2,
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.pfn = __phys_to_pfn(S5P6442_PA_VIC2),
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.length = SZ_16K,
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.type = MT_DEVICE,
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}, {
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.virtual = (unsigned long)S3C_VA_UART,
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.pfn = __phys_to_pfn(S3C_PA_UART),
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.length = SZ_512K,
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.type = MT_DEVICE,
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}
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};
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@ -63,10 +83,11 @@ static void s5p6442_idle(void)
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local_irq_enable();
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}
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/* s5p6442_map_io
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/*
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* s5p6442_map_io
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*
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* register the standard cpu IO areas
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*/
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*/
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void __init s5p6442_map_io(void)
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{
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@ -23,16 +23,10 @@
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#define S5P_PA_SYSCON S5P6442_PA_SYSCON
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#define S5P6442_PA_GPIO (0xE0200000)
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#define S5P_PA_GPIO S5P6442_PA_GPIO
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#define S5P6442_PA_VIC0 (0xE4000000)
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#define S5P_PA_VIC0 S5P6442_PA_VIC0
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#define S5P6442_PA_VIC1 (0xE4100000)
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#define S5P_PA_VIC1 S5P6442_PA_VIC1
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#define S5P6442_PA_VIC2 (0xE4200000)
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#define S5P_PA_VIC2 S5P6442_PA_VIC2
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#define S5P6442_PA_MDMA 0xE8000000
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#define S5P6442_PA_PDMA 0xE9000000
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@ -1,4 +1,7 @@
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/* linux/arch/arm/mach-s5pc100/cpu.c
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*
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* Copyright (c) 2010 Samsung Electronics Co., Ltd.
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* http://www.samsung.com
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*
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* Copyright 2009 Samsung Electronics Co.
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* Byungho Min <bhmin@samsung.com>
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@ -57,10 +60,30 @@ static struct map_desc s5pc100_iodesc[] __initdata = {
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.length = SZ_16K,
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.type = MT_DEVICE,
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}, {
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.virtual = (unsigned long)VA_VIC2,
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.pfn = __phys_to_pfn(S5P_PA_VIC2),
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.virtual = (unsigned long)S5P_VA_GPIO,
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.pfn = __phys_to_pfn(S5PC100_PA_GPIO),
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.length = SZ_4K,
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.type = MT_DEVICE,
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}, {
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.virtual = (unsigned long)VA_VIC0,
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.pfn = __phys_to_pfn(S5PC100_PA_VIC0),
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.length = SZ_16K,
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.type = MT_DEVICE,
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}, {
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.virtual = (unsigned long)VA_VIC1,
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.pfn = __phys_to_pfn(S5PC100_PA_VIC1),
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.length = SZ_16K,
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.type = MT_DEVICE,
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}, {
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.virtual = (unsigned long)VA_VIC2,
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.pfn = __phys_to_pfn(S5PC100_PA_VIC2),
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.length = SZ_16K,
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.type = MT_DEVICE,
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}, {
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.virtual = (unsigned long)S3C_VA_UART,
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.pfn = __phys_to_pfn(S3C_PA_UART),
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.length = SZ_512K,
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.type = MT_DEVICE,
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}, {
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.virtual = (unsigned long)S5PC100_VA_OTHERS,
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.pfn = __phys_to_pfn(S5PC100_PA_OTHERS),
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@ -44,19 +44,16 @@
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#define S5PC100_PA_OTHERS (0xE0200000)
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#define S5PC100_VA_OTHERS (S3C_VA_SYS + 0x10000)
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#define S5P_PA_GPIO (0xE0300000)
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#define S5PC100_PA_GPIO (0xE0300000)
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#define S5PC1XX_VA_GPIO S3C_ADDR(0x00500000)
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/* Interrupt */
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#define S5PC100_PA_VIC (0xE4000000)
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#define S5PC100_PA_VIC0 (0xE4000000)
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#define S5PC100_PA_VIC1 (0xE4100000)
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#define S5PC100_PA_VIC2 (0xE4200000)
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#define S5PC100_VA_VIC S3C_VA_IRQ
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#define S5PC100_PA_VIC_OFFSET 0x100000
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#define S5PC100_VA_VIC_OFFSET 0x10000
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#define S5PC1XX_PA_VIC(x) (S5PC100_PA_VIC + ((x) * S5PC100_PA_VIC_OFFSET))
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#define S5PC1XX_VA_VIC(x) (S5PC100_VA_VIC + ((x) * S5PC100_VA_VIC_OFFSET))
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#define S5P_PA_VIC0 S5PC1XX_PA_VIC(0)
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#define S5P_PA_VIC1 S5PC1XX_PA_VIC(1)
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#define S5P_PA_VIC2 S5PC1XX_PA_VIC(2)
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#define S5PC100_PA_ONENAND (0xE7100000)
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@ -1,7 +1,7 @@
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/* linux/arch/arm/mach-s5pv210/cpu.c
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*
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* Copyright (c) 2010 Samsung Electronics Co., Ltd.
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* http://www.samsung.com/
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* http://www.samsung.com
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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@ -50,6 +50,21 @@ static struct map_desc s5pv210_iodesc[] __initdata = {
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.pfn = __phys_to_pfn(S5PV210_PA_SYSTIMER),
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.length = SZ_4K,
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.type = MT_DEVICE,
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}, {
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.virtual = (unsigned long)S5P_VA_GPIO,
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.pfn = __phys_to_pfn(S5PV210_PA_GPIO),
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.length = SZ_4K,
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.type = MT_DEVICE,
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}, {
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.virtual = (unsigned long)VA_VIC0,
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.pfn = __phys_to_pfn(S5PV210_PA_VIC0),
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.length = SZ_16K,
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.type = MT_DEVICE,
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}, {
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.virtual = (unsigned long)VA_VIC1,
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.pfn = __phys_to_pfn(S5PV210_PA_VIC1),
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.length = SZ_16K,
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.type = MT_DEVICE,
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}, {
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.virtual = (unsigned long)VA_VIC2,
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.pfn = __phys_to_pfn(S5PV210_PA_VIC2),
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.pfn = __phys_to_pfn(S5PV210_PA_VIC3),
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.length = SZ_16K,
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.type = MT_DEVICE,
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}, {
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.virtual = (unsigned long)S3C_VA_UART,
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.pfn = __phys_to_pfn(S3C_PA_UART),
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.length = SZ_512K,
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.type = MT_DEVICE,
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}, {
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.virtual = (unsigned long)S5P_VA_SROMC,
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.pfn = __phys_to_pfn(S5PV210_PA_SROMC),
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#define S5P_PA_SYSCON S5PV210_PA_SYSCON
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#define S5PV210_PA_GPIO (0xE0200000)
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#define S5P_PA_GPIO S5PV210_PA_GPIO
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/* SPI */
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#define S5PV210_PA_SPI0 0xE1300000
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#define S5PV210_PA_HSMMC(x) (0xEB000000 + ((x) * 0x100000))
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#define S5PV210_PA_VIC0 (0xF2000000)
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#define S5P_PA_VIC0 S5PV210_PA_VIC0
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#define S5PV210_PA_VIC1 (0xF2100000)
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#define S5P_PA_VIC1 S5PV210_PA_VIC1
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#define S5PV210_PA_VIC2 (0xF2200000)
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#define S5P_PA_VIC2 S5PV210_PA_VIC2
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#define S5PV210_PA_VIC3 (0xF2300000)
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#define S5P_PA_VIC3 S5PV210_PA_VIC3
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#define S5PV210_PA_SDRAM (0x20000000)
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#define S5P_PA_SDRAM S5PV210_PA_SDRAM
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/* Initial IO mappings */
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static struct map_desc s5pv310_iodesc[] __initdata = {
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{
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.virtual = (unsigned long)S5P_VA_COREPERI_BASE,
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.pfn = __phys_to_pfn(S5PV310_PA_COREPERI),
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.length = SZ_8K,
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.type = MT_DEVICE,
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}, {
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.virtual = (unsigned long)S5P_VA_COMBINER_BASE,
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.pfn = __phys_to_pfn(S5PV310_PA_COMBINER),
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.length = SZ_4K,
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.type = MT_DEVICE,
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}, {
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.virtual = (unsigned long)S5P_VA_L2CC,
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.pfn = __phys_to_pfn(S5PV310_PA_L2CC),
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.length = SZ_4K,
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.type = MT_DEVICE,
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}, {
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.virtual = (unsigned long)S5P_VA_SYSRAM,
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.pfn = __phys_to_pfn(S5PV310_PA_SYSRAM),
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.length = SZ_4K,
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.pfn = __phys_to_pfn(S5PV310_PA_CMU),
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.length = SZ_128K,
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.type = MT_DEVICE,
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}, {
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.virtual = (unsigned long)S5P_VA_COMBINER_BASE,
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.pfn = __phys_to_pfn(S5PV310_PA_COMBINER),
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.length = SZ_4K,
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.type = MT_DEVICE,
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}, {
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.virtual = (unsigned long)S5P_VA_COREPERI_BASE,
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.pfn = __phys_to_pfn(S5PV310_PA_COREPERI),
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.length = SZ_8K,
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.type = MT_DEVICE,
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}, {
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.virtual = (unsigned long)S5P_VA_L2CC,
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.pfn = __phys_to_pfn(S5PV310_PA_L2CC),
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.length = SZ_4K,
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.type = MT_DEVICE,
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}, {
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.virtual = (unsigned long)S5P_VA_GPIO,
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.pfn = __phys_to_pfn(S5PV310_PA_GPIO),
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.length = SZ_4K,
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.type = MT_DEVICE,
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}, {
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.virtual = (unsigned long)S3C_VA_UART,
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.pfn = __phys_to_pfn(S3C_PA_UART),
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.length = SZ_512K,
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.type = MT_DEVICE,
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},
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};
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@ -88,33 +88,11 @@ static struct map_desc s5p_iodesc[] __initdata = {
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.pfn = __phys_to_pfn(S5P_PA_SYSCON),
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.length = SZ_64K,
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.type = MT_DEVICE,
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}, {
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.virtual = (unsigned long)S3C_VA_UART,
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.pfn = __phys_to_pfn(S3C_PA_UART),
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.length = SZ_512K,
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.type = MT_DEVICE,
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#ifdef CONFIG_ARM_VIC
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}, {
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.virtual = (unsigned long)VA_VIC0,
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.pfn = __phys_to_pfn(S5P_PA_VIC0),
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.length = SZ_16K,
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.type = MT_DEVICE,
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}, {
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.virtual = (unsigned long)VA_VIC1,
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.pfn = __phys_to_pfn(S5P_PA_VIC1),
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.length = SZ_16K,
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.type = MT_DEVICE,
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#endif
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}, {
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.virtual = (unsigned long)S3C_VA_TIMER,
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.pfn = __phys_to_pfn(S5P_PA_TIMER),
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.length = SZ_16K,
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.type = MT_DEVICE,
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}, {
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.virtual = (unsigned long)S5P_VA_GPIO,
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.pfn = __phys_to_pfn(S5P_PA_GPIO),
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.length = SZ_4K,
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.type = MT_DEVICE,
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}, {
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.virtual = (unsigned long)S3C_VA_WATCHDOG,
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.pfn = __phys_to_pfn(S3C_PA_WDT),
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