clk: gate: Add support for specifying parents via DT/pointers
After commit fc0c209c14
("clk: Allow parents to be specified without
string names") we can use DT or direct clk_hw pointers to specify
parents. Create a generic function that shouldn't be used very often to
encode the multitude of ways of registering a gate clk with different
parent information. Then add a bunch of wrapper macros that only pass
down what needs to be passed down to the generic function to support
this with less arguments.
Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Link: https://lkml.kernel.org/r/20190830150923.259497-12-sboyd@kernel.org
This commit is contained in:
parent
9611b3aacc
commit
194efb6e26
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@ -123,26 +123,18 @@ const struct clk_ops clk_gate_ops = {
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};
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EXPORT_SYMBOL_GPL(clk_gate_ops);
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/**
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* clk_hw_register_gate - register a gate clock with the clock framework
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* @dev: device that is registering this clock
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* @name: name of this clock
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* @parent_name: name of this clock's parent
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* @flags: framework-specific flags for this clock
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* @reg: register address to control gating of this clock
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* @bit_idx: which bit in the register controls gating of this clock
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* @clk_gate_flags: gate-specific flags for this clock
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* @lock: shared register lock for this clock
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*/
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struct clk_hw *clk_hw_register_gate(struct device *dev, const char *name,
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const char *parent_name, unsigned long flags,
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struct clk_hw *__clk_hw_register_gate(struct device *dev,
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struct device_node *np, const char *name,
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const char *parent_name, const struct clk_hw *parent_hw,
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const struct clk_parent_data *parent_data,
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unsigned long flags,
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void __iomem *reg, u8 bit_idx,
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u8 clk_gate_flags, spinlock_t *lock)
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{
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struct clk_gate *gate;
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struct clk_hw *hw;
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struct clk_init_data init = {};
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int ret;
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int ret = -EINVAL;
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if (clk_gate_flags & CLK_GATE_HIWORD_MASK) {
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if (bit_idx > 15) {
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@ -160,7 +152,12 @@ struct clk_hw *clk_hw_register_gate(struct device *dev, const char *name,
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init.ops = &clk_gate_ops;
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init.flags = flags;
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init.parent_names = parent_name ? &parent_name : NULL;
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init.num_parents = parent_name ? 1 : 0;
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init.parent_hws = parent_hw ? &parent_hw : NULL;
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init.parent_data = parent_data;
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if (parent_name || parent_hw || parent_data)
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init.num_parents = 1;
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else
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init.num_parents = 0;
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/* struct clk_gate assignments */
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gate->reg = reg;
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@ -170,15 +167,19 @@ struct clk_hw *clk_hw_register_gate(struct device *dev, const char *name,
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gate->hw.init = &init;
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hw = &gate->hw;
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ret = clk_hw_register(dev, hw);
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if (dev || !np)
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ret = clk_hw_register(dev, hw);
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else if (np)
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ret = of_clk_hw_register(np, hw);
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if (ret) {
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kfree(gate);
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hw = ERR_PTR(ret);
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}
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return hw;
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}
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EXPORT_SYMBOL_GPL(clk_hw_register_gate);
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EXPORT_SYMBOL_GPL(__clk_hw_register_gate);
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struct clk *clk_register_gate(struct device *dev, const char *name,
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const char *parent_name, unsigned long flags,
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@ -476,14 +476,67 @@ struct clk_gate {
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#define CLK_GATE_BIG_ENDIAN BIT(2)
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extern const struct clk_ops clk_gate_ops;
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struct clk_hw *__clk_hw_register_gate(struct device *dev,
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struct device_node *np, const char *name,
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const char *parent_name, const struct clk_hw *parent_hw,
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const struct clk_parent_data *parent_data,
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unsigned long flags,
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void __iomem *reg, u8 bit_idx,
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u8 clk_gate_flags, spinlock_t *lock);
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struct clk *clk_register_gate(struct device *dev, const char *name,
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const char *parent_name, unsigned long flags,
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void __iomem *reg, u8 bit_idx,
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u8 clk_gate_flags, spinlock_t *lock);
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struct clk_hw *clk_hw_register_gate(struct device *dev, const char *name,
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const char *parent_name, unsigned long flags,
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void __iomem *reg, u8 bit_idx,
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u8 clk_gate_flags, spinlock_t *lock);
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/**
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* clk_hw_register_gate - register a gate clock with the clock framework
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* @dev: device that is registering this clock
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* @name: name of this clock
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* @parent_name: name of this clock's parent
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* @flags: framework-specific flags for this clock
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* @reg: register address to control gating of this clock
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* @bit_idx: which bit in the register controls gating of this clock
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* @clk_gate_flags: gate-specific flags for this clock
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* @lock: shared register lock for this clock
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*/
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#define clk_hw_register_gate(dev, name, parent_name, flags, reg, bit_idx, \
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clk_gate_flags, lock) \
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__clk_hw_register_gate((dev), NULL, (name), (parent_name), NULL, \
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NULL, (flags), (reg), (bit_idx), \
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(clk_gate_flags), (lock))
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/**
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* clk_hw_register_gate_parent_hw - register a gate clock with the clock
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* framework
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* @dev: device that is registering this clock
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* @name: name of this clock
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* @parent_hw: pointer to parent clk
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* @flags: framework-specific flags for this clock
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* @reg: register address to control gating of this clock
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* @bit_idx: which bit in the register controls gating of this clock
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* @clk_gate_flags: gate-specific flags for this clock
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* @lock: shared register lock for this clock
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*/
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#define clk_hw_register_gate_parent_hw(dev, name, parent_name, flags, reg, \
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bit_idx, clk_gate_flags, lock) \
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__clk_hw_register_gate((dev), NULL, (name), (parent_name), NULL, \
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NULL, (flags), (reg), (bit_idx), \
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(clk_gate_flags), (lock))
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/**
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* clk_hw_register_gate_parent_data - register a gate clock with the clock
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* framework
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* @dev: device that is registering this clock
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* @name: name of this clock
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* @parent_data: parent clk data
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* @flags: framework-specific flags for this clock
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* @reg: register address to control gating of this clock
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* @bit_idx: which bit in the register controls gating of this clock
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* @clk_gate_flags: gate-specific flags for this clock
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* @lock: shared register lock for this clock
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*/
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#define clk_hw_register_gate_parent_data(dev, name, parent_name, flags, reg, \
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bit_idx, clk_gate_flags, lock) \
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__clk_hw_register_gate((dev), NULL, (name), (parent_name), NULL, \
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NULL, (flags), (reg), (bit_idx), \
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(clk_gate_flags), (lock))
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void clk_unregister_gate(struct clk *clk);
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void clk_hw_unregister_gate(struct clk_hw *hw);
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int clk_gate_is_enabled(struct clk_hw *hw);
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