sfc: SFT9001/SFN4111T: Check PHY boot status during board initialisation
During SFN4111T initialisation, check whether the PHY boot status indicates a bad firmware checksum. If so, prepare to reflash rather than continuing with normal initialisation. Remove redundant PHY boot status check from tenxpress_phy_init(). Signed-off-by: Ben Hutchings <bhutchings@solarflare.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -18,6 +18,10 @@ extern struct efx_phy_operations falcon_sft9001_phy_ops;
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extern void tenxpress_phy_blink(struct efx_nic *efx, bool blink);
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/* Wait for the PHY to boot. Return 0 on success, -EINVAL if the PHY failed
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* to boot due to corrupt flash, or some other negative error code. */
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extern int sft9001_wait_boot(struct efx_nic *efx);
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/****************************************************************************
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* Exported functions from the driver for XFP optical PHYs
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*/
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@ -399,6 +399,7 @@ static struct i2c_board_info sfn4111t_r5_hwmon_info = {
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int sfn4111t_init(struct efx_nic *efx)
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{
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int i = 0;
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int rc;
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efx->board_info.hwmon_client =
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@ -417,13 +418,20 @@ int sfn4111t_init(struct efx_nic *efx)
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if (rc)
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goto fail_hwmon;
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if (efx->phy_mode & PHY_MODE_SPECIAL) {
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efx_stats_disable(efx);
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sfn4111t_reset(efx);
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}
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return 0;
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do {
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if (efx->phy_mode & PHY_MODE_SPECIAL) {
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/* PHY may not generate a 156.25 MHz clock and MAC
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* stats fetch will fail. */
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efx_stats_disable(efx);
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sfn4111t_reset(efx);
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}
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rc = sft9001_wait_boot(efx);
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if (rc == 0)
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return 0;
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efx->phy_mode = PHY_MODE_SPECIAL;
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} while (rc == -EINVAL && ++i < 2);
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device_remove_file(&efx->pci_dev->dev, &dev_attr_phy_flash_cfg);
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fail_hwmon:
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i2c_unregister_device(efx->board_info.hwmon_client);
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return rc;
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@ -158,14 +158,16 @@
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#define PCS_10GBASET_BLKLK_WIDTH 1
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/* Boot status register */
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#define PCS_BOOT_STATUS_REG 53248
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#define PCS_BOOT_FATAL_ERR_LBN (0)
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#define PCS_BOOT_PROGRESS_LBN (1)
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#define PCS_BOOT_PROGRESS_WIDTH (2)
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#define PCS_BOOT_COMPLETE_LBN (3)
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#define PCS_BOOT_MAX_DELAY (100)
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#define PCS_BOOT_POLL_DELAY (10)
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#define PCS_BOOT_STATUS_REG 53248
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#define PCS_BOOT_FATAL_ERROR_LBN 0
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#define PCS_BOOT_PROGRESS_LBN 1
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#define PCS_BOOT_PROGRESS_WIDTH 2
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#define PCS_BOOT_PROGRESS_INIT 0
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#define PCS_BOOT_PROGRESS_WAIT_MDIO 1
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#define PCS_BOOT_PROGRESS_CHECKSUM 2
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#define PCS_BOOT_PROGRESS_JUMP 3
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#define PCS_BOOT_DOWNLOAD_WAIT_LBN 3
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#define PCS_BOOT_CODE_STARTED_LBN 4
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/* 100M/1G PHY registers */
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#define GPHY_XCONTROL_REG 49152
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@ -230,40 +232,62 @@ static ssize_t set_phy_short_reach(struct device *dev,
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static DEVICE_ATTR(phy_short_reach, 0644, show_phy_short_reach,
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set_phy_short_reach);
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/* Check that the C166 has booted successfully */
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static int tenxpress_phy_check(struct efx_nic *efx)
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int sft9001_wait_boot(struct efx_nic *efx)
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{
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int phy_id = efx->mii.phy_id;
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int count = PCS_BOOT_MAX_DELAY / PCS_BOOT_POLL_DELAY;
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unsigned long timeout = jiffies + HZ + 1;
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int boot_stat;
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/* Wait for the boot to complete (or not) */
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while (count) {
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boot_stat = mdio_clause45_read(efx, phy_id,
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for (;;) {
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boot_stat = mdio_clause45_read(efx, efx->mii.phy_id,
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MDIO_MMD_PCS,
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PCS_BOOT_STATUS_REG);
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if (boot_stat & (1 << PCS_BOOT_COMPLETE_LBN))
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break;
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count--;
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udelay(PCS_BOOT_POLL_DELAY);
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}
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if (boot_stat >= 0) {
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EFX_LOG(efx, "PHY boot status = %#x\n", boot_stat);
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switch (boot_stat &
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((1 << PCS_BOOT_FATAL_ERROR_LBN) |
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(3 << PCS_BOOT_PROGRESS_LBN) |
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(1 << PCS_BOOT_DOWNLOAD_WAIT_LBN) |
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(1 << PCS_BOOT_CODE_STARTED_LBN))) {
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case ((1 << PCS_BOOT_FATAL_ERROR_LBN) |
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(PCS_BOOT_PROGRESS_CHECKSUM <<
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PCS_BOOT_PROGRESS_LBN)):
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case ((1 << PCS_BOOT_FATAL_ERROR_LBN) |
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(PCS_BOOT_PROGRESS_INIT <<
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PCS_BOOT_PROGRESS_LBN) |
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(1 << PCS_BOOT_DOWNLOAD_WAIT_LBN)):
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return -EINVAL;
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case ((PCS_BOOT_PROGRESS_WAIT_MDIO <<
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PCS_BOOT_PROGRESS_LBN) |
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(1 << PCS_BOOT_DOWNLOAD_WAIT_LBN)):
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return (efx->phy_mode & PHY_MODE_SPECIAL) ?
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0 : -EIO;
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case ((PCS_BOOT_PROGRESS_JUMP <<
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PCS_BOOT_PROGRESS_LBN) |
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(1 << PCS_BOOT_CODE_STARTED_LBN)):
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case ((PCS_BOOT_PROGRESS_JUMP <<
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PCS_BOOT_PROGRESS_LBN) |
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(1 << PCS_BOOT_DOWNLOAD_WAIT_LBN) |
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(1 << PCS_BOOT_CODE_STARTED_LBN)):
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return (efx->phy_mode & PHY_MODE_SPECIAL) ?
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-EIO : 0;
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default:
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if (boot_stat & (1 << PCS_BOOT_FATAL_ERROR_LBN))
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return -EIO;
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break;
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}
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}
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if (!count) {
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EFX_ERR(efx, "%s: PHY boot timed out. Last status "
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"%x\n", __func__,
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(boot_stat >> PCS_BOOT_PROGRESS_LBN) &
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((1 << PCS_BOOT_PROGRESS_WIDTH) - 1));
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return -ETIMEDOUT;
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}
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if (time_after_eq(jiffies, timeout))
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return -ETIMEDOUT;
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return 0;
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msleep(50);
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}
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}
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static int tenxpress_init(struct efx_nic *efx)
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{
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int phy_id = efx->mii.phy_id;
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int reg;
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int rc;
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if (efx->phy_type == PHY_TYPE_SFX7101) {
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/* Enable 312.5 MHz clock */
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@ -286,10 +310,6 @@ static int tenxpress_init(struct efx_nic *efx)
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false);
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}
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rc = tenxpress_phy_check(efx);
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if (rc < 0)
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return rc;
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/* Set the LEDs up as: Green = Link, Amber = Link/Act, Red = Off */
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if (efx->phy_type == PHY_TYPE_SFX7101) {
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mdio_clause45_set_flag(efx, phy_id, MDIO_MMD_PMAPMD,
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@ -300,7 +320,7 @@ static int tenxpress_init(struct efx_nic *efx)
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PMA_PMD_LED_OVERR_REG, PMA_PMD_LED_DEFAULT);
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}
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return rc;
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return 0;
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}
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static int tenxpress_phy_init(struct efx_nic *efx)
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