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gma500: Final polish 

This completes the clean up all the non Medfield C files to the point where
checkpatch approves of them barring some silly 80 column whining.

The Medfield stuff is still in a lot of flux but the rest is now ready for
general tidy and review.

Signed-off-by: Alan Cox <alan@linux.intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
This commit is contained in:
Alan Cox 2011-07-11 19:39:43 +01:00 committed by Greg Kroah-Hartman
parent 78f23926df
commit 18a4ca2a11
5 changed files with 14 additions and 14 deletions
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8
drivers/staging/gma500/framebuffer.c
View File

@ -756,10 +756,10 @@ static void psb_setup_outputs(struct drm_device *dev)
clone_mask = (1 << INTEL_OUTPUT_MIPI2);
break;
case INTEL_OUTPUT_HDMI:
if (IS_MFLD(dev))
crtc_mask = (1 << 1);
else /* FIXME: review Oaktrail */
crtc_mask = (1 << 0); /* Cedarview */
if (IS_MFLD(dev))
crtc_mask = (1 << 1);
else /* FIXME: review Oaktrail */
crtc_mask = (1 << 0); /* Cedarview */
clone_mask = (1 << INTEL_OUTPUT_HDMI);
break;
}

6
drivers/staging/gma500/psb_intel_display.c
View File

@ -1284,8 +1284,8 @@ const struct drm_crtc_funcs psb_intel_crtc_funcs = {
*/
static void psb_intel_cursor_init(struct drm_device *dev, int pipe)
{
u32 control[3] = { CURACNTR, CURBCNTR, CURCCNTR };
u32 base[3] = { CURABASE, CURBBASE, CURCBASE };
u32 control[3] = { CURACNTR, CURBCNTR, CURCCNTR };
u32 base[3] = { CURABASE, CURBBASE, CURCBASE };
REG_WRITE(control[pipe], 0);
REG_WRITE(base[pipe], 0);
@ -1341,7 +1341,7 @@ void psb_intel_crtc_init(struct drm_device *dev, int pipe,
psb_intel_crtc->cursor_addr = 0;
drm_crtc_helper_add(&psb_intel_crtc->base,
dev_priv->ops->crtc_helper);
dev_priv->ops->crtc_helper);
/* Setup the array of drm_connector pointer array */
psb_intel_crtc->mode_set.crtc = &psb_intel_crtc->base;