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Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus 

Pull MIPS fixes from Ralf Baechle:
 "Two platform-specific fixes plus a fix for oprofile which was calling
  smp_processor_id() in preemptible code"

* 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus:
  MIPS: BMIPS: fix hardware interrupt routing for boot CPU != 0
  MIPS: oprofile: Fix BUG due to smp_processor_id() in preemptible code.
  MIPS: PNX833x: PNX8335_PCI_ETHERNET_INT depends on CONFIG_SOC_PNX8335
This commit is contained in:
Linus Torvalds 2013-08-06 13:14:43 -07:00
parent 69b4a3a030 fcfa66de8a
commit 1853a65ec5
4 changed files with 13 additions and 3 deletions
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2
arch/mips/include/asm/cpu-features.h
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@ -17,6 +17,8 @@
#define current_cpu_type() current_cpu_data.cputype #define current_cpu_type() current_cpu_data.cputype
#endif #endif
#define boot_cpu_type() cpu_data[0].cputype
/* /*
* SMP assumption: Options of CPU 0 are a superset of all processors. * SMP assumption: Options of CPU 0 are a superset of all processors.
* This is true for all known MIPS systems. * This is true for all known MIPS systems.

10
arch/mips/kernel/smp-bmips.c
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@ -66,6 +66,8 @@ static void __init bmips_smp_setup(void)
int i, cpu = 1, boot_cpu = 0; int i, cpu = 1, boot_cpu = 0;
#if defined(CONFIG_CPU_BMIPS4350) || defined(CONFIG_CPU_BMIPS4380) #if defined(CONFIG_CPU_BMIPS4350) || defined(CONFIG_CPU_BMIPS4380)
int cpu_hw_intr;
/* arbitration priority */ /* arbitration priority */
clear_c0_brcm_cmt_ctrl(0x30); clear_c0_brcm_cmt_ctrl(0x30);
@ -80,8 +82,12 @@ static void __init bmips_smp_setup(void)
* MIPS interrupt 2 (HW INT 0) is the CPU0 L1 controller output * MIPS interrupt 2 (HW INT 0) is the CPU0 L1 controller output
* MIPS interrupt 3 (HW INT 1) is the CPU1 L1 controller output * MIPS interrupt 3 (HW INT 1) is the CPU1 L1 controller output
*/ */
change_c0_brcm_cmt_intr(0xf8018000, if (boot_cpu == 0)
(0x02 << 27) | (0x03 << 15)); cpu_hw_intr = 0x02;
else
cpu_hw_intr = 0x1d;
change_c0_brcm_cmt_intr(0xf8018000, (cpu_hw_intr << 27) | (0x03 << 15));
/* single core, 2 threads (2 pipelines) */ /* single core, 2 threads (2 pipelines) */
max_cpus = 2; max_cpus = 2;

2
arch/mips/oprofile/op_model_mipsxx.c
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@ -166,7 +166,7 @@ static void mipsxx_reg_setup(struct op_counter_config *ctr)
reg.control[i] |= M_PERFCTL_USER; reg.control[i] |= M_PERFCTL_USER;
if (ctr[i].exl) if (ctr[i].exl)
reg.control[i] |= M_PERFCTL_EXL; reg.control[i] |= M_PERFCTL_EXL;
if (current_cpu_type() == CPU_XLR) if (boot_cpu_type() == CPU_XLR)
reg.control[i] |= M_PERFCTL_COUNT_ALL_THREADS; reg.control[i] |= M_PERFCTL_COUNT_ALL_THREADS;
reg.counter[i] = 0x80000000 - ctr[i].count; reg.counter[i] = 0x80000000 - ctr[i].count;
} }

2
arch/mips/pnx833x/common/platform.c
View File

@ -206,11 +206,13 @@ static struct resource pnx833x_ethernet_resources[] = {
.end = PNX8335_IP3902_PORTS_END, .end = PNX8335_IP3902_PORTS_END,
.flags = IORESOURCE_MEM, .flags = IORESOURCE_MEM,
}, },
#ifdef CONFIG_SOC_PNX8335
[1] = { [1] = {
.start = PNX8335_PIC_ETHERNET_INT, .start = PNX8335_PIC_ETHERNET_INT,
.end = PNX8335_PIC_ETHERNET_INT, .end = PNX8335_PIC_ETHERNET_INT,
.flags = IORESOURCE_IRQ, .flags = IORESOURCE_IRQ,
}, },
#endif
}; };
static struct platform_device pnx833x_ethernet_device = { static struct platform_device pnx833x_ethernet_device = {