fm10k: Add interrupt support
This patch set adds interrupt support for the fm10k interfaces. The interfaces themselves only support MSI-X, so neither MSI or legacy interrupts are used. Signed-off-by: Alexander Duyck <alexander.h.duyck@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
This commit is contained in:
Alexander Duyck
Jeff Kirsher
parent
504c5eac1d
commit
18283cad0a
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@ -31,6 +31,45 @@
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#define FM10K_MAX_JUMBO_FRAME_SIZE 15358 /* Maximum supported size 15K */
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struct fm10k_ring_container {
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unsigned int total_bytes; /* total bytes processed this int */
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unsigned int total_packets; /* total packets processed this int */
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u16 work_limit; /* total work allowed per interrupt */
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u16 itr; /* interrupt throttle rate value */
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u8 count; /* total number of rings in vector */
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};
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#define FM10K_ITR_MAX 0x0FFF /* maximum value for ITR */
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#define FM10K_ITR_10K 100 /* 100us */
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#define FM10K_ITR_20K 50 /* 50us */
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#define FM10K_ITR_ADAPTIVE 0x8000 /* adaptive interrupt moderation flag */
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#define FM10K_ITR_ENABLE (FM10K_ITR_AUTOMASK | FM10K_ITR_MASK_CLEAR)
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#define MAX_Q_VECTORS 256
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#define MIN_Q_VECTORS 1
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enum fm10k_non_q_vectors {
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FM10K_MBX_VECTOR,
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NON_Q_VECTORS_PF
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};
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#define NON_Q_VECTORS(hw) (((hw)->mac.type == fm10k_mac_pf) ? \
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NON_Q_VECTORS_PF : \
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0)
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#define MIN_MSIX_COUNT(hw) (MIN_Q_VECTORS + NON_Q_VECTORS(hw))
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struct fm10k_q_vector {
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struct fm10k_intfc *interface;
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u32 __iomem *itr; /* pointer to ITR register for this vector */
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u16 v_idx; /* index of q_vector within interface array */
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struct fm10k_ring_container rx, tx;
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struct napi_struct napi;
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char name[IFNAMSIZ + 9];
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struct rcu_head rcu; /* to avoid race with update stats on free */
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};
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enum fm10k_ring_f_enum {
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RING_F_RSS,
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RING_F_QOS,
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@ -66,15 +105,29 @@ struct fm10k_intfc {
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#define FM10K_FLAG_SWPRI_CONFIG (u32)(1 << 4)
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int xcast_mode;
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/* Tx fast path data */
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int num_tx_queues;
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u16 tx_itr;
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/* Rx fast path data */
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int num_rx_queues;
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u16 rx_itr;
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u64 rx_overrun_pf;
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u64 rx_overrun_vf;
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/* Queueing vectors */
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struct fm10k_q_vector *q_vector[MAX_Q_VECTORS];
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struct msix_entry *msix_entries;
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int num_q_vectors; /* current number of q_vectors for device */
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struct fm10k_ring_feature ring_feature[RING_F_ARRAY_SIZE];
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struct fm10k_hw_stats stats;
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struct fm10k_hw hw;
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u32 __iomem *uc_addr;
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u16 msg_enable;
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u16 tx_ring_count;
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u16 rx_ring_count;
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u32 reta[FM10K_RETA_SIZE];
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u32 rssrk[FM10K_RSSRK_SIZE];
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@ -126,8 +179,14 @@ static inline int fm10k_mbx_trylock(struct fm10k_intfc *interface)
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/* main */
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extern char fm10k_driver_name[];
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extern const char fm10k_driver_version[];
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int fm10k_init_queueing_scheme(struct fm10k_intfc *interface);
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void fm10k_clear_queueing_scheme(struct fm10k_intfc *interface);
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/* PCI */
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void fm10k_mbx_free_irq(struct fm10k_intfc *);
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int fm10k_mbx_request_irq(struct fm10k_intfc *);
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void fm10k_qv_free_irq(struct fm10k_intfc *interface);
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int fm10k_qv_request_irq(struct fm10k_intfc *interface);
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int fm10k_register_pci_driver(void);
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void fm10k_unregister_pci_driver(void);
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void fm10k_up(struct fm10k_intfc *interface);
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@ -66,3 +66,404 @@ static void __exit fm10k_exit_module(void)
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fm10k_unregister_pci_driver();
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}
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module_exit(fm10k_exit_module);
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/**
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* fm10k_update_itr - update the dynamic ITR value based on packet size
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*
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* Stores a new ITR value based on strictly on packet size. The
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* divisors and thresholds used by this function were determined based
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* on theoretical maximum wire speed and testing data, in order to
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* minimize response time while increasing bulk throughput.
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*
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* @ring_container: Container for rings to have ITR updated
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**/
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static void fm10k_update_itr(struct fm10k_ring_container *ring_container)
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{
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unsigned int avg_wire_size, packets;
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/* Only update ITR if we are using adaptive setting */
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if (!(ring_container->itr & FM10K_ITR_ADAPTIVE))
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goto clear_counts;
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packets = ring_container->total_packets;
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if (!packets)
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goto clear_counts;
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avg_wire_size = ring_container->total_bytes / packets;
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/* Add 24 bytes to size to account for CRC, preamble, and gap */
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avg_wire_size += 24;
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/* Don't starve jumbo frames */
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if (avg_wire_size > 3000)
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avg_wire_size = 3000;
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/* Give a little boost to mid-size frames */
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if ((avg_wire_size > 300) && (avg_wire_size < 1200))
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avg_wire_size /= 3;
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else
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avg_wire_size /= 2;
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/* write back value and retain adaptive flag */
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ring_container->itr = avg_wire_size | FM10K_ITR_ADAPTIVE;
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clear_counts:
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ring_container->total_bytes = 0;
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ring_container->total_packets = 0;
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}
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static void fm10k_qv_enable(struct fm10k_q_vector *q_vector)
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{
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/* Enable auto-mask and clear the current mask */
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u32 itr = FM10K_ITR_ENABLE;
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/* Update Tx ITR */
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fm10k_update_itr(&q_vector->tx);
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/* Update Rx ITR */
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fm10k_update_itr(&q_vector->rx);
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/* Store Tx itr in timer slot 0 */
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itr |= (q_vector->tx.itr & FM10K_ITR_MAX);
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/* Shift Rx itr to timer slot 1 */
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itr |= (q_vector->rx.itr & FM10K_ITR_MAX) << FM10K_ITR_INTERVAL1_SHIFT;
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/* Write the final value to the ITR register */
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writel(itr, q_vector->itr);
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}
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static int fm10k_poll(struct napi_struct *napi, int budget)
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{
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struct fm10k_q_vector *q_vector =
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container_of(napi, struct fm10k_q_vector, napi);
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/* all work done, exit the polling mode */
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napi_complete(napi);
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/* re-enable the q_vector */
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fm10k_qv_enable(q_vector);
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return 0;
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}
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/**
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* fm10k_set_num_queues: Allocate queues for device, feature dependent
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* @interface: board private structure to initialize
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*
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* This is the top level queue allocation routine. The order here is very
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* important, starting with the "most" number of features turned on at once,
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* and ending with the smallest set of features. This way large combinations
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* can be allocated if they're turned on, and smaller combinations are the
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* fallthrough conditions.
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*
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**/
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static void fm10k_set_num_queues(struct fm10k_intfc *interface)
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{
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/* Start with base case */
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interface->num_rx_queues = 1;
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interface->num_tx_queues = 1;
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}
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/**
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* fm10k_alloc_q_vector - Allocate memory for a single interrupt vector
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* @interface: board private structure to initialize
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* @v_count: q_vectors allocated on interface, used for ring interleaving
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* @v_idx: index of vector in interface struct
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* @txr_count: total number of Tx rings to allocate
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* @txr_idx: index of first Tx ring to allocate
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* @rxr_count: total number of Rx rings to allocate
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* @rxr_idx: index of first Rx ring to allocate
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*
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* We allocate one q_vector. If allocation fails we return -ENOMEM.
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**/
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static int fm10k_alloc_q_vector(struct fm10k_intfc *interface,
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unsigned int v_count, unsigned int v_idx,
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unsigned int txr_count, unsigned int txr_idx,
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unsigned int rxr_count, unsigned int rxr_idx)
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{
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struct fm10k_q_vector *q_vector;
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int ring_count, size;
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ring_count = txr_count + rxr_count;
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size = sizeof(struct fm10k_q_vector);
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/* allocate q_vector and rings */
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q_vector = kzalloc(size, GFP_KERNEL);
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if (!q_vector)
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return -ENOMEM;
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/* initialize NAPI */
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netif_napi_add(interface->netdev, &q_vector->napi,
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fm10k_poll, NAPI_POLL_WEIGHT);
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/* tie q_vector and interface together */
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interface->q_vector[v_idx] = q_vector;
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q_vector->interface = interface;
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q_vector->v_idx = v_idx;
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/* save Tx ring container info */
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q_vector->tx.itr = interface->tx_itr;
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q_vector->tx.count = txr_count;
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/* save Rx ring container info */
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q_vector->rx.itr = interface->rx_itr;
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q_vector->rx.count = rxr_count;
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return 0;
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}
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/**
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* fm10k_free_q_vector - Free memory allocated for specific interrupt vector
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* @interface: board private structure to initialize
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* @v_idx: Index of vector to be freed
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*
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* This function frees the memory allocated to the q_vector. In addition if
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* NAPI is enabled it will delete any references to the NAPI struct prior
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* to freeing the q_vector.
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**/
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static void fm10k_free_q_vector(struct fm10k_intfc *interface, int v_idx)
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{
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struct fm10k_q_vector *q_vector = interface->q_vector[v_idx];
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interface->q_vector[v_idx] = NULL;
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netif_napi_del(&q_vector->napi);
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kfree_rcu(q_vector, rcu);
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}
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/**
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* fm10k_alloc_q_vectors - Allocate memory for interrupt vectors
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* @interface: board private structure to initialize
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*
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* We allocate one q_vector per queue interrupt. If allocation fails we
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* return -ENOMEM.
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**/
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static int fm10k_alloc_q_vectors(struct fm10k_intfc *interface)
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{
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unsigned int q_vectors = interface->num_q_vectors;
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unsigned int rxr_remaining = interface->num_rx_queues;
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unsigned int txr_remaining = interface->num_tx_queues;
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unsigned int rxr_idx = 0, txr_idx = 0, v_idx = 0;
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int err;
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if (q_vectors >= (rxr_remaining + txr_remaining)) {
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for (; rxr_remaining; v_idx++) {
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err = fm10k_alloc_q_vector(interface, q_vectors, v_idx,
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0, 0, 1, rxr_idx);
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if (err)
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goto err_out;
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/* update counts and index */
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rxr_remaining--;
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rxr_idx++;
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}
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}
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for (; v_idx < q_vectors; v_idx++) {
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int rqpv = DIV_ROUND_UP(rxr_remaining, q_vectors - v_idx);
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int tqpv = DIV_ROUND_UP(txr_remaining, q_vectors - v_idx);
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err = fm10k_alloc_q_vector(interface, q_vectors, v_idx,
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tqpv, txr_idx,
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rqpv, rxr_idx);
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if (err)
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goto err_out;
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/* update counts and index */
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rxr_remaining -= rqpv;
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txr_remaining -= tqpv;
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rxr_idx++;
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txr_idx++;
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}
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return 0;
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err_out:
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interface->num_tx_queues = 0;
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interface->num_rx_queues = 0;
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interface->num_q_vectors = 0;
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while (v_idx--)
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fm10k_free_q_vector(interface, v_idx);
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return -ENOMEM;
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}
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/**
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* fm10k_free_q_vectors - Free memory allocated for interrupt vectors
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* @interface: board private structure to initialize
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*
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* This function frees the memory allocated to the q_vectors. In addition if
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* NAPI is enabled it will delete any references to the NAPI struct prior
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* to freeing the q_vector.
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**/
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static void fm10k_free_q_vectors(struct fm10k_intfc *interface)
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{
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int v_idx = interface->num_q_vectors;
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interface->num_tx_queues = 0;
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interface->num_rx_queues = 0;
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interface->num_q_vectors = 0;
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while (v_idx--)
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fm10k_free_q_vector(interface, v_idx);
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}
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/**
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* f10k_reset_msix_capability - reset MSI-X capability
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* @interface: board private structure to initialize
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*
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* Reset the MSI-X capability back to its starting state
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**/
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static void fm10k_reset_msix_capability(struct fm10k_intfc *interface)
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{
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pci_disable_msix(interface->pdev);
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kfree(interface->msix_entries);
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interface->msix_entries = NULL;
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}
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/**
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* f10k_init_msix_capability - configure MSI-X capability
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* @interface: board private structure to initialize
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*
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* Attempt to configure the interrupts using the best available
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* capabilities of the hardware and the kernel.
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**/
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static int fm10k_init_msix_capability(struct fm10k_intfc *interface)
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{
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struct fm10k_hw *hw = &interface->hw;
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int v_budget, vector;
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/* It's easy to be greedy for MSI-X vectors, but it really
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* doesn't do us much good if we have a lot more vectors
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* than CPU's. So let's be conservative and only ask for
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* (roughly) the same number of vectors as there are CPU's.
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* the default is to use pairs of vectors
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*/
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v_budget = max(interface->num_rx_queues, interface->num_tx_queues);
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v_budget = min_t(u16, v_budget, num_online_cpus());
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/* account for vectors not related to queues */
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v_budget += NON_Q_VECTORS(hw);
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/* At the same time, hardware can only support a maximum of
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* hw.mac->max_msix_vectors vectors. With features
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* such as RSS and VMDq, we can easily surpass the number of Rx and Tx
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* descriptor queues supported by our device. Thus, we cap it off in
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* those rare cases where the cpu count also exceeds our vector limit.
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*/
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v_budget = min_t(int, v_budget, hw->mac.max_msix_vectors);
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/* A failure in MSI-X entry allocation is fatal. */
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interface->msix_entries = kcalloc(v_budget, sizeof(struct msix_entry),
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GFP_KERNEL);
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if (!interface->msix_entries)
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return -ENOMEM;
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/* populate entry values */
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for (vector = 0; vector < v_budget; vector++)
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interface->msix_entries[vector].entry = vector;
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/* Attempt to enable MSI-X with requested value */
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v_budget = pci_enable_msix_range(interface->pdev,
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interface->msix_entries,
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MIN_MSIX_COUNT(hw),
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v_budget);
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if (v_budget < 0) {
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kfree(interface->msix_entries);
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interface->msix_entries = NULL;
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return -ENOMEM;
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}
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/* record the number of queues available for q_vectors */
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interface->num_q_vectors = v_budget - NON_Q_VECTORS(hw);
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return 0;
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}
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static void fm10k_init_reta(struct fm10k_intfc *interface)
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{
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u16 i, rss_i = interface->ring_feature[RING_F_RSS].indices;
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u32 reta, base;
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/* If the netdev is initialized we have to maintain table if possible */
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if (interface->netdev->reg_state) {
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for (i = FM10K_RETA_SIZE; i--;) {
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reta = interface->reta[i];
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if ((((reta << 24) >> 24) < rss_i) &&
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(((reta << 16) >> 24) < rss_i) &&
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(((reta << 8) >> 24) < rss_i) &&
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(((reta) >> 24) < rss_i))
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continue;
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goto repopulate_reta;
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}
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/* do nothing if all of the elements are in bounds */
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return;
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}
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repopulate_reta:
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/* Populate the redirection table 4 entries at a time. To do this
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* we are generating the results for n and n+2 and then interleaving
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* those with the results with n+1 and n+3.
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*/
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for (i = FM10K_RETA_SIZE; i--;) {
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/* first pass generates n and n+2 */
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base = ((i * 0x00040004) + 0x00020000) * rss_i;
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reta = (base & 0x3F803F80) >> 7;
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/* second pass generates n+1 and n+3 */
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base += 0x00010001 * rss_i;
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reta |= (base & 0x3F803F80) << 1;
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interface->reta[i] = reta;
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}
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}
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/**
|
||||
* fm10k_init_queueing_scheme - Determine proper queueing scheme
|
||||
* @interface: board private structure to initialize
|
||||
*
|
||||
* We determine which queueing scheme to use based on...
|
||||
* - Hardware queue count (num_*_queues)
|
||||
* - defined by miscellaneous hardware support/features (RSS, etc.)
|
||||
**/
|
||||
int fm10k_init_queueing_scheme(struct fm10k_intfc *interface)
|
||||
{
|
||||
int err;
|
||||
|
||||
/* Number of supported queues */
|
||||
fm10k_set_num_queues(interface);
|
||||
|
||||
/* Configure MSI-X capability */
|
||||
err = fm10k_init_msix_capability(interface);
|
||||
if (err) {
|
||||
dev_err(&interface->pdev->dev,
|
||||
"Unable to initialize MSI-X capability\n");
|
||||
return err;
|
||||
}
|
||||
|
||||
/* Allocate memory for queues */
|
||||
err = fm10k_alloc_q_vectors(interface);
|
||||
if (err)
|
||||
return err;
|
||||
|
||||
/* Initialize RSS redirection table */
|
||||
fm10k_init_reta(interface);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/**
|
||||
* fm10k_clear_queueing_scheme - Clear the current queueing scheme settings
|
||||
* @interface: board private structure to clear queueing scheme on
|
||||
*
|
||||
* We go through and clear queueing specific resources and reset the structure
|
||||
* to pre-load conditions
|
||||
**/
|
||||
void fm10k_clear_queueing_scheme(struct fm10k_intfc *interface)
|
||||
{
|
||||
fm10k_free_q_vectors(interface);
|
||||
fm10k_reset_msix_capability(interface);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -57,6 +57,12 @@ static void fm10k_request_glort_range(struct fm10k_intfc *interface)
|
|||
int fm10k_open(struct net_device *netdev)
|
||||
{
|
||||
struct fm10k_intfc *interface = netdev_priv(netdev);
|
||||
int err;
|
||||
|
||||
/* allocate interrupt resources */
|
||||
err = fm10k_qv_request_irq(interface);
|
||||
if (err)
|
||||
goto err_req_irq;
|
||||
|
||||
/* setup GLORT assignment for this port */
|
||||
fm10k_request_glort_range(interface);
|
||||
|
|
@ -64,6 +70,9 @@ int fm10k_open(struct net_device *netdev)
|
|||
fm10k_up(interface);
|
||||
|
||||
return 0;
|
||||
|
||||
err_req_irq:
|
||||
return err;
|
||||
}
|
||||
|
||||
/**
|
||||
|
|
@ -83,6 +92,8 @@ int fm10k_close(struct net_device *netdev)
|
|||
|
||||
fm10k_down(interface);
|
||||
|
||||
fm10k_qv_free_irq(interface);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -87,6 +87,470 @@ static int fm10k_hw_ready(struct fm10k_intfc *interface)
|
|||
return FM10K_REMOVED(hw->hw_addr) ? -ENODEV : 0;
|
||||
}
|
||||
|
||||
static void fm10k_napi_enable_all(struct fm10k_intfc *interface)
|
||||
{
|
||||
struct fm10k_q_vector *q_vector;
|
||||
int q_idx;
|
||||
|
||||
for (q_idx = 0; q_idx < interface->num_q_vectors; q_idx++) {
|
||||
q_vector = interface->q_vector[q_idx];
|
||||
napi_enable(&q_vector->napi);
|
||||
}
|
||||
}
|
||||
|
||||
static irqreturn_t fm10k_msix_clean_rings(int irq, void *data)
|
||||
{
|
||||
struct fm10k_q_vector *q_vector = data;
|
||||
|
||||
if (q_vector->rx.count || q_vector->tx.count)
|
||||
napi_schedule(&q_vector->napi);
|
||||
|
||||
return IRQ_HANDLED;
|
||||
}
|
||||
|
||||
#define FM10K_ERR_MSG(type) case (type): error = #type; break
|
||||
static void fm10k_print_fault(struct fm10k_intfc *interface, int type,
|
||||
struct fm10k_fault *fault)
|
||||
{
|
||||
struct pci_dev *pdev = interface->pdev;
|
||||
char *error;
|
||||
|
||||
switch (type) {
|
||||
case FM10K_PCA_FAULT:
|
||||
switch (fault->type) {
|
||||
default:
|
||||
error = "Unknown PCA error";
|
||||
break;
|
||||
FM10K_ERR_MSG(PCA_NO_FAULT);
|
||||
FM10K_ERR_MSG(PCA_UNMAPPED_ADDR);
|
||||
FM10K_ERR_MSG(PCA_BAD_QACCESS_PF);
|
||||
FM10K_ERR_MSG(PCA_BAD_QACCESS_VF);
|
||||
FM10K_ERR_MSG(PCA_MALICIOUS_REQ);
|
||||
FM10K_ERR_MSG(PCA_POISONED_TLP);
|
||||
FM10K_ERR_MSG(PCA_TLP_ABORT);
|
||||
}
|
||||
break;
|
||||
case FM10K_THI_FAULT:
|
||||
switch (fault->type) {
|
||||
default:
|
||||
error = "Unknown THI error";
|
||||
break;
|
||||
FM10K_ERR_MSG(THI_NO_FAULT);
|
||||
FM10K_ERR_MSG(THI_MAL_DIS_Q_FAULT);
|
||||
}
|
||||
break;
|
||||
case FM10K_FUM_FAULT:
|
||||
switch (fault->type) {
|
||||
default:
|
||||
error = "Unknown FUM error";
|
||||
break;
|
||||
FM10K_ERR_MSG(FUM_NO_FAULT);
|
||||
FM10K_ERR_MSG(FUM_UNMAPPED_ADDR);
|
||||
FM10K_ERR_MSG(FUM_BAD_VF_QACCESS);
|
||||
FM10K_ERR_MSG(FUM_ADD_DECODE_ERR);
|
||||
FM10K_ERR_MSG(FUM_RO_ERROR);
|
||||
FM10K_ERR_MSG(FUM_QPRC_CRC_ERROR);
|
||||
FM10K_ERR_MSG(FUM_CSR_TIMEOUT);
|
||||
FM10K_ERR_MSG(FUM_INVALID_TYPE);
|
||||
FM10K_ERR_MSG(FUM_INVALID_LENGTH);
|
||||
FM10K_ERR_MSG(FUM_INVALID_BE);
|
||||
FM10K_ERR_MSG(FUM_INVALID_ALIGN);
|
||||
}
|
||||
break;
|
||||
default:
|
||||
error = "Undocumented fault";
|
||||
break;
|
||||
}
|
||||
|
||||
dev_warn(&pdev->dev,
|
||||
"%s Address: 0x%llx SpecInfo: 0x%x Func: %02x.%0x\n",
|
||||
error, fault->address, fault->specinfo,
|
||||
PCI_SLOT(fault->func), PCI_FUNC(fault->func));
|
||||
}
|
||||
|
||||
static void fm10k_report_fault(struct fm10k_intfc *interface, u32 eicr)
|
||||
{
|
||||
struct fm10k_hw *hw = &interface->hw;
|
||||
struct fm10k_fault fault = { 0 };
|
||||
int type, err;
|
||||
|
||||
for (eicr &= FM10K_EICR_FAULT_MASK, type = FM10K_PCA_FAULT;
|
||||
eicr;
|
||||
eicr >>= 1, type += FM10K_FAULT_SIZE) {
|
||||
/* only check if there is an error reported */
|
||||
if (!(eicr & 0x1))
|
||||
continue;
|
||||
|
||||
/* retrieve fault info */
|
||||
err = hw->mac.ops.get_fault(hw, type, &fault);
|
||||
if (err) {
|
||||
dev_err(&interface->pdev->dev,
|
||||
"error reading fault\n");
|
||||
continue;
|
||||
}
|
||||
|
||||
fm10k_print_fault(interface, type, &fault);
|
||||
}
|
||||
}
|
||||
|
||||
static void fm10k_reset_drop_on_empty(struct fm10k_intfc *interface, u32 eicr)
|
||||
{
|
||||
struct fm10k_hw *hw = &interface->hw;
|
||||
const u32 rxdctl = FM10K_RXDCTL_WRITE_BACK_MIN_DELAY;
|
||||
u32 maxholdq;
|
||||
int q;
|
||||
|
||||
if (!(eicr & FM10K_EICR_MAXHOLDTIME))
|
||||
return;
|
||||
|
||||
maxholdq = fm10k_read_reg(hw, FM10K_MAXHOLDQ(7));
|
||||
if (maxholdq)
|
||||
fm10k_write_reg(hw, FM10K_MAXHOLDQ(7), maxholdq);
|
||||
for (q = 255;;) {
|
||||
if (maxholdq & (1 << 31)) {
|
||||
if (q < FM10K_MAX_QUEUES_PF) {
|
||||
interface->rx_overrun_pf++;
|
||||
fm10k_write_reg(hw, FM10K_RXDCTL(q), rxdctl);
|
||||
} else {
|
||||
interface->rx_overrun_vf++;
|
||||
}
|
||||
}
|
||||
|
||||
maxholdq *= 2;
|
||||
if (!maxholdq)
|
||||
q &= ~(32 - 1);
|
||||
|
||||
if (!q)
|
||||
break;
|
||||
|
||||
if (q-- % 32)
|
||||
continue;
|
||||
|
||||
maxholdq = fm10k_read_reg(hw, FM10K_MAXHOLDQ(q / 32));
|
||||
if (maxholdq)
|
||||
fm10k_write_reg(hw, FM10K_MAXHOLDQ(q / 32), maxholdq);
|
||||
}
|
||||
}
|
||||
|
||||
static irqreturn_t fm10k_msix_mbx_pf(int irq, void *data)
|
||||
{
|
||||
struct fm10k_intfc *interface = data;
|
||||
struct fm10k_hw *hw = &interface->hw;
|
||||
struct fm10k_mbx_info *mbx = &hw->mbx;
|
||||
u32 eicr;
|
||||
|
||||
/* unmask any set bits related to this interrupt */
|
||||
eicr = fm10k_read_reg(hw, FM10K_EICR);
|
||||
fm10k_write_reg(hw, FM10K_EICR, eicr & (FM10K_EICR_MAILBOX |
|
||||
FM10K_EICR_SWITCHREADY |
|
||||
FM10K_EICR_SWITCHNOTREADY));
|
||||
|
||||
/* report any faults found to the message log */
|
||||
fm10k_report_fault(interface, eicr);
|
||||
|
||||
/* reset any queues disabled due to receiver overrun */
|
||||
fm10k_reset_drop_on_empty(interface, eicr);
|
||||
|
||||
/* service mailboxes */
|
||||
if (fm10k_mbx_trylock(interface)) {
|
||||
mbx->ops.process(hw, mbx);
|
||||
fm10k_mbx_unlock(interface);
|
||||
}
|
||||
|
||||
/* re-enable mailbox interrupt and indicate 20us delay */
|
||||
fm10k_write_reg(hw, FM10K_ITR(FM10K_MBX_VECTOR),
|
||||
FM10K_ITR_ENABLE | FM10K_MBX_INT_DELAY);
|
||||
|
||||
return IRQ_HANDLED;
|
||||
}
|
||||
|
||||
void fm10k_mbx_free_irq(struct fm10k_intfc *interface)
|
||||
{
|
||||
struct msix_entry *entry = &interface->msix_entries[FM10K_MBX_VECTOR];
|
||||
struct fm10k_hw *hw = &interface->hw;
|
||||
int itr_reg;
|
||||
|
||||
/* disconnect the mailbox */
|
||||
hw->mbx.ops.disconnect(hw, &hw->mbx);
|
||||
|
||||
/* disable Mailbox cause */
|
||||
if (hw->mac.type == fm10k_mac_pf) {
|
||||
fm10k_write_reg(hw, FM10K_EIMR,
|
||||
FM10K_EIMR_DISABLE(PCA_FAULT) |
|
||||
FM10K_EIMR_DISABLE(FUM_FAULT) |
|
||||
FM10K_EIMR_DISABLE(MAILBOX) |
|
||||
FM10K_EIMR_DISABLE(SWITCHREADY) |
|
||||
FM10K_EIMR_DISABLE(SWITCHNOTREADY) |
|
||||
FM10K_EIMR_DISABLE(SRAMERROR) |
|
||||
FM10K_EIMR_DISABLE(VFLR) |
|
||||
FM10K_EIMR_DISABLE(MAXHOLDTIME));
|
||||
itr_reg = FM10K_ITR(FM10K_MBX_VECTOR);
|
||||
}
|
||||
|
||||
fm10k_write_reg(hw, itr_reg, FM10K_ITR_MASK_SET);
|
||||
|
||||
free_irq(entry->vector, interface);
|
||||
}
|
||||
|
||||
/* generic error handler for mailbox issues */
|
||||
static s32 fm10k_mbx_error(struct fm10k_hw *hw, u32 **results,
|
||||
struct fm10k_mbx_info *mbx)
|
||||
{
|
||||
struct fm10k_intfc *interface;
|
||||
struct pci_dev *pdev;
|
||||
|
||||
interface = container_of(hw, struct fm10k_intfc, hw);
|
||||
pdev = interface->pdev;
|
||||
|
||||
dev_err(&pdev->dev, "Unknown message ID %u\n",
|
||||
**results & FM10K_TLV_ID_MASK);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static s32 fm10k_lport_map(struct fm10k_hw *hw, u32 **results,
|
||||
struct fm10k_mbx_info *mbx)
|
||||
{
|
||||
struct fm10k_intfc *interface;
|
||||
u32 dglort_map = hw->mac.dglort_map;
|
||||
s32 err;
|
||||
|
||||
err = fm10k_msg_lport_map_pf(hw, results, mbx);
|
||||
if (err)
|
||||
return err;
|
||||
|
||||
interface = container_of(hw, struct fm10k_intfc, hw);
|
||||
|
||||
/* we need to reset if port count was just updated */
|
||||
if (dglort_map != hw->mac.dglort_map)
|
||||
interface->flags |= FM10K_FLAG_RESET_REQUESTED;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static s32 fm10k_update_pvid(struct fm10k_hw *hw, u32 **results,
|
||||
struct fm10k_mbx_info *mbx)
|
||||
{
|
||||
struct fm10k_intfc *interface;
|
||||
u16 glort, pvid;
|
||||
u32 pvid_update;
|
||||
s32 err;
|
||||
|
||||
err = fm10k_tlv_attr_get_u32(results[FM10K_PF_ATTR_ID_UPDATE_PVID],
|
||||
&pvid_update);
|
||||
if (err)
|
||||
return err;
|
||||
|
||||
/* extract values from the pvid update */
|
||||
glort = FM10K_MSG_HDR_FIELD_GET(pvid_update, UPDATE_PVID_GLORT);
|
||||
pvid = FM10K_MSG_HDR_FIELD_GET(pvid_update, UPDATE_PVID_PVID);
|
||||
|
||||
/* if glort is not valid return error */
|
||||
if (!fm10k_glort_valid_pf(hw, glort))
|
||||
return FM10K_ERR_PARAM;
|
||||
|
||||
/* verify VID is valid */
|
||||
if (pvid >= FM10K_VLAN_TABLE_VID_MAX)
|
||||
return FM10K_ERR_PARAM;
|
||||
|
||||
interface = container_of(hw, struct fm10k_intfc, hw);
|
||||
|
||||
/* we need to reset if default VLAN was just updated */
|
||||
if (pvid != hw->mac.default_vid)
|
||||
interface->flags |= FM10K_FLAG_RESET_REQUESTED;
|
||||
|
||||
hw->mac.default_vid = pvid;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const struct fm10k_msg_data pf_mbx_data[] = {
|
||||
FM10K_PF_MSG_ERR_HANDLER(XCAST_MODES, fm10k_msg_err_pf),
|
||||
FM10K_PF_MSG_ERR_HANDLER(UPDATE_MAC_FWD_RULE, fm10k_msg_err_pf),
|
||||
FM10K_PF_MSG_LPORT_MAP_HANDLER(fm10k_lport_map),
|
||||
FM10K_PF_MSG_ERR_HANDLER(LPORT_CREATE, fm10k_msg_err_pf),
|
||||
FM10K_PF_MSG_ERR_HANDLER(LPORT_DELETE, fm10k_msg_err_pf),
|
||||
FM10K_PF_MSG_UPDATE_PVID_HANDLER(fm10k_update_pvid),
|
||||
FM10K_TLV_MSG_ERROR_HANDLER(fm10k_mbx_error),
|
||||
};
|
||||
|
||||
static int fm10k_mbx_request_irq_pf(struct fm10k_intfc *interface)
|
||||
{
|
||||
struct msix_entry *entry = &interface->msix_entries[FM10K_MBX_VECTOR];
|
||||
struct net_device *dev = interface->netdev;
|
||||
struct fm10k_hw *hw = &interface->hw;
|
||||
int err;
|
||||
|
||||
/* Use timer0 for interrupt moderation on the mailbox */
|
||||
u32 mbx_itr = FM10K_INT_MAP_TIMER0 | entry->entry;
|
||||
u32 other_itr = FM10K_INT_MAP_IMMEDIATE | entry->entry;
|
||||
|
||||
/* register mailbox handlers */
|
||||
err = hw->mbx.ops.register_handlers(&hw->mbx, pf_mbx_data);
|
||||
if (err)
|
||||
return err;
|
||||
|
||||
/* request the IRQ */
|
||||
err = request_irq(entry->vector, fm10k_msix_mbx_pf, 0,
|
||||
dev->name, interface);
|
||||
if (err) {
|
||||
netif_err(interface, probe, dev,
|
||||
"request_irq for msix_mbx failed: %d\n", err);
|
||||
return err;
|
||||
}
|
||||
|
||||
/* Enable interrupts w/ no moderation for "other" interrupts */
|
||||
fm10k_write_reg(hw, FM10K_INT_MAP(fm10k_int_PCIeFault), other_itr);
|
||||
fm10k_write_reg(hw, FM10K_INT_MAP(fm10k_int_SwitchUpDown), other_itr);
|
||||
fm10k_write_reg(hw, FM10K_INT_MAP(fm10k_int_SRAM), other_itr);
|
||||
fm10k_write_reg(hw, FM10K_INT_MAP(fm10k_int_MaxHoldTime), other_itr);
|
||||
fm10k_write_reg(hw, FM10K_INT_MAP(fm10k_int_VFLR), other_itr);
|
||||
|
||||
/* Enable interrupts w/ moderation for mailbox */
|
||||
fm10k_write_reg(hw, FM10K_INT_MAP(fm10k_int_Mailbox), mbx_itr);
|
||||
|
||||
/* Enable individual interrupt causes */
|
||||
fm10k_write_reg(hw, FM10K_EIMR, FM10K_EIMR_ENABLE(PCA_FAULT) |
|
||||
FM10K_EIMR_ENABLE(FUM_FAULT) |
|
||||
FM10K_EIMR_ENABLE(MAILBOX) |
|
||||
FM10K_EIMR_ENABLE(SWITCHREADY) |
|
||||
FM10K_EIMR_ENABLE(SWITCHNOTREADY) |
|
||||
FM10K_EIMR_ENABLE(SRAMERROR) |
|
||||
FM10K_EIMR_ENABLE(VFLR) |
|
||||
FM10K_EIMR_ENABLE(MAXHOLDTIME));
|
||||
|
||||
/* enable interrupt */
|
||||
fm10k_write_reg(hw, FM10K_ITR(entry->entry), FM10K_ITR_ENABLE);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
int fm10k_mbx_request_irq(struct fm10k_intfc *interface)
|
||||
{
|
||||
struct fm10k_hw *hw = &interface->hw;
|
||||
int err;
|
||||
|
||||
/* enable Mailbox cause */
|
||||
err = fm10k_mbx_request_irq_pf(interface);
|
||||
|
||||
/* connect mailbox */
|
||||
if (!err)
|
||||
err = hw->mbx.ops.connect(hw, &hw->mbx);
|
||||
|
||||
return err;
|
||||
}
|
||||
|
||||
/**
|
||||
* fm10k_qv_free_irq - release interrupts associated with queue vectors
|
||||
* @interface: board private structure
|
||||
*
|
||||
* Release all interrupts associated with this interface
|
||||
**/
|
||||
void fm10k_qv_free_irq(struct fm10k_intfc *interface)
|
||||
{
|
||||
int vector = interface->num_q_vectors;
|
||||
struct fm10k_hw *hw = &interface->hw;
|
||||
struct msix_entry *entry;
|
||||
|
||||
entry = &interface->msix_entries[NON_Q_VECTORS(hw) + vector];
|
||||
|
||||
while (vector) {
|
||||
struct fm10k_q_vector *q_vector;
|
||||
|
||||
vector--;
|
||||
entry--;
|
||||
q_vector = interface->q_vector[vector];
|
||||
|
||||
if (!q_vector->tx.count && !q_vector->rx.count)
|
||||
continue;
|
||||
|
||||
/* disable interrupts */
|
||||
|
||||
writel(FM10K_ITR_MASK_SET, q_vector->itr);
|
||||
|
||||
free_irq(entry->vector, q_vector);
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* fm10k_qv_request_irq - initialize interrupts for queue vectors
|
||||
* @interface: board private structure
|
||||
*
|
||||
* Attempts to configure interrupts using the best available
|
||||
* capabilities of the hardware and kernel.
|
||||
**/
|
||||
int fm10k_qv_request_irq(struct fm10k_intfc *interface)
|
||||
{
|
||||
struct net_device *dev = interface->netdev;
|
||||
struct fm10k_hw *hw = &interface->hw;
|
||||
struct msix_entry *entry;
|
||||
int ri = 0, ti = 0;
|
||||
int vector, err;
|
||||
|
||||
entry = &interface->msix_entries[NON_Q_VECTORS(hw)];
|
||||
|
||||
for (vector = 0; vector < interface->num_q_vectors; vector++) {
|
||||
struct fm10k_q_vector *q_vector = interface->q_vector[vector];
|
||||
|
||||
/* name the vector */
|
||||
if (q_vector->tx.count && q_vector->rx.count) {
|
||||
snprintf(q_vector->name, sizeof(q_vector->name) - 1,
|
||||
"%s-TxRx-%d", dev->name, ri++);
|
||||
ti++;
|
||||
} else if (q_vector->rx.count) {
|
||||
snprintf(q_vector->name, sizeof(q_vector->name) - 1,
|
||||
"%s-rx-%d", dev->name, ri++);
|
||||
} else if (q_vector->tx.count) {
|
||||
snprintf(q_vector->name, sizeof(q_vector->name) - 1,
|
||||
"%s-tx-%d", dev->name, ti++);
|
||||
} else {
|
||||
/* skip this unused q_vector */
|
||||
continue;
|
||||
}
|
||||
|
||||
/* Assign ITR register to q_vector */
|
||||
q_vector->itr = &interface->uc_addr[FM10K_ITR(entry->entry)];
|
||||
|
||||
/* request the IRQ */
|
||||
err = request_irq(entry->vector, &fm10k_msix_clean_rings, 0,
|
||||
q_vector->name, q_vector);
|
||||
if (err) {
|
||||
netif_err(interface, probe, dev,
|
||||
"request_irq failed for MSIX interrupt Error: %d\n",
|
||||
err);
|
||||
goto err_out;
|
||||
}
|
||||
|
||||
/* Enable q_vector */
|
||||
writel(FM10K_ITR_ENABLE, q_vector->itr);
|
||||
|
||||
entry++;
|
||||
}
|
||||
|
||||
return 0;
|
||||
|
||||
err_out:
|
||||
/* wind through the ring freeing all entries and vectors */
|
||||
while (vector) {
|
||||
struct fm10k_q_vector *q_vector;
|
||||
|
||||
entry--;
|
||||
vector--;
|
||||
q_vector = interface->q_vector[vector];
|
||||
|
||||
if (!q_vector->tx.count && !q_vector->rx.count)
|
||||
continue;
|
||||
|
||||
/* disable interrupts */
|
||||
|
||||
writel(FM10K_ITR_MASK_SET, q_vector->itr);
|
||||
|
||||
free_irq(entry->vector, q_vector);
|
||||
}
|
||||
|
||||
return err;
|
||||
}
|
||||
|
||||
void fm10k_up(struct fm10k_intfc *interface)
|
||||
{
|
||||
struct fm10k_hw *hw = &interface->hw;
|
||||
|
|
@ -100,6 +564,9 @@ void fm10k_up(struct fm10k_intfc *interface)
|
|||
/* clear down bit to indicate we are ready to go */
|
||||
clear_bit(__FM10K_DOWN, &interface->state);
|
||||
|
||||
/* enable polling cleanups */
|
||||
fm10k_napi_enable_all(interface);
|
||||
|
||||
/* re-establish Rx filters */
|
||||
fm10k_restore_rx_state(interface);
|
||||
|
||||
|
|
@ -107,6 +574,17 @@ void fm10k_up(struct fm10k_intfc *interface)
|
|||
netif_tx_start_all_queues(interface->netdev);
|
||||
}
|
||||
|
||||
static void fm10k_napi_disable_all(struct fm10k_intfc *interface)
|
||||
{
|
||||
struct fm10k_q_vector *q_vector;
|
||||
int q_idx;
|
||||
|
||||
for (q_idx = 0; q_idx < interface->num_q_vectors; q_idx++) {
|
||||
q_vector = interface->q_vector[q_idx];
|
||||
napi_disable(&q_vector->napi);
|
||||
}
|
||||
}
|
||||
|
||||
void fm10k_down(struct fm10k_intfc *interface)
|
||||
{
|
||||
struct net_device *netdev = interface->netdev;
|
||||
|
|
@ -128,6 +606,9 @@ void fm10k_down(struct fm10k_intfc *interface)
|
|||
/* allow 10ms for device to quiesce */
|
||||
usleep_range(10000, 20000);
|
||||
|
||||
/* disable polling routines */
|
||||
fm10k_napi_disable_all(interface);
|
||||
|
||||
/* Disable DMA engine for Tx/Rx */
|
||||
hw->mac.ops.stop_hw(hw);
|
||||
}
|
||||
|
|
@ -226,6 +707,10 @@ static int fm10k_sw_init(struct fm10k_intfc *interface,
|
|||
netdev->hw_features &= ~NETIF_F_GSO_UDP_TUNNEL;
|
||||
}
|
||||
|
||||
/* set default interrupt moderation */
|
||||
interface->tx_itr = FM10K_ITR_10K;
|
||||
interface->rx_itr = FM10K_ITR_ADAPTIVE | FM10K_ITR_20K;
|
||||
|
||||
/* initialize vxlan_port list */
|
||||
INIT_LIST_HEAD(&interface->vxlan_port);
|
||||
|
||||
|
|
@ -341,6 +826,14 @@ static int fm10k_probe(struct pci_dev *pdev,
|
|||
if (err)
|
||||
goto err_sw_init;
|
||||
|
||||
err = fm10k_init_queueing_scheme(interface);
|
||||
if (err)
|
||||
goto err_sw_init;
|
||||
|
||||
err = fm10k_mbx_request_irq(interface);
|
||||
if (err)
|
||||
goto err_mbx_interrupt;
|
||||
|
||||
/* final check of hardware state before registering the interface */
|
||||
err = fm10k_hw_ready(interface);
|
||||
if (err)
|
||||
|
|
@ -377,6 +870,9 @@ static int fm10k_probe(struct pci_dev *pdev,
|
|||
return 0;
|
||||
|
||||
err_register:
|
||||
fm10k_mbx_free_irq(interface);
|
||||
err_mbx_interrupt:
|
||||
fm10k_clear_queueing_scheme(interface);
|
||||
err_sw_init:
|
||||
iounmap(interface->uc_addr);
|
||||
err_ioremap:
|
||||
|
|
@ -408,6 +904,12 @@ static void fm10k_remove(struct pci_dev *pdev)
|
|||
if (netdev->reg_state == NETREG_REGISTERED)
|
||||
unregister_netdev(netdev);
|
||||
|
||||
/* disable mailbox interrupt */
|
||||
fm10k_mbx_free_irq(interface);
|
||||
|
||||
/* free interrupts */
|
||||
fm10k_clear_queueing_scheme(interface);
|
||||
|
||||
iounmap(interface->uc_addr);
|
||||
|
||||
free_netdev(netdev);
|
||||
|
|
|
|||
Loading…
Reference in New Issue