drm/scheduler: Rename cleanup functions v2.
Everything in the flush code path (i.e. waiting for SW queue to become empty) names with *_flush() and everything in the release code path names *_fini() This patch also effect the amdgpu and etnaviv drivers which use those functions. v2: Also pplay the change to vd3. Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com> Suggested-by: Christian König <christian.koenig@amd.com> Acked-by: Lucas Stach <l.stach@pengutronix.de> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -104,7 +104,7 @@ static int amdgpu_ctx_init(struct amdgpu_device *adev,
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failed:
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for (j = 0; j < i; j++)
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drm_sched_entity_fini(&adev->rings[j]->sched,
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drm_sched_entity_destroy(&adev->rings[j]->sched,
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&ctx->rings[j].entity);
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kfree(ctx->fences);
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ctx->fences = NULL;
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@ -178,7 +178,7 @@ static void amdgpu_ctx_do_release(struct kref *ref)
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if (ctx->adev->rings[i] == &ctx->adev->gfx.kiq.ring)
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continue;
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drm_sched_entity_fini(&ctx->adev->rings[i]->sched,
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drm_sched_entity_destroy(&ctx->adev->rings[i]->sched,
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&ctx->rings[i].entity);
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}
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@ -466,7 +466,7 @@ void amdgpu_ctx_mgr_entity_fini(struct amdgpu_ctx_mgr *mgr)
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if (ctx->adev->rings[i] == &ctx->adev->gfx.kiq.ring)
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continue;
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max_wait = drm_sched_entity_do_release(&ctx->adev->rings[i]->sched,
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max_wait = drm_sched_entity_flush(&ctx->adev->rings[i]->sched,
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&ctx->rings[i].entity, max_wait);
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}
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}
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@ -492,7 +492,7 @@ void amdgpu_ctx_mgr_entity_cleanup(struct amdgpu_ctx_mgr *mgr)
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continue;
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if (kref_read(&ctx->refcount) == 1)
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drm_sched_entity_cleanup(&ctx->adev->rings[i]->sched,
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drm_sched_entity_fini(&ctx->adev->rings[i]->sched,
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&ctx->rings[i].entity);
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else
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DRM_ERROR("ctx %p is still alive\n", ctx);
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@ -162,7 +162,7 @@ error_mem:
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static void amdgpu_ttm_global_fini(struct amdgpu_device *adev)
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{
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if (adev->mman.mem_global_referenced) {
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drm_sched_entity_fini(adev->mman.entity.sched,
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drm_sched_entity_destroy(adev->mman.entity.sched,
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&adev->mman.entity);
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mutex_destroy(&adev->mman.gtt_window_lock);
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drm_global_item_unref(&adev->mman.bo_global_ref.ref);
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@ -309,7 +309,7 @@ int amdgpu_uvd_sw_fini(struct amdgpu_device *adev)
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for (j = 0; j < adev->uvd.num_uvd_inst; ++j) {
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kfree(adev->uvd.inst[j].saved_bo);
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drm_sched_entity_fini(&adev->uvd.inst[j].ring.sched, &adev->uvd.inst[j].entity);
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drm_sched_entity_destroy(&adev->uvd.inst[j].ring.sched, &adev->uvd.inst[j].entity);
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amdgpu_bo_free_kernel(&adev->uvd.inst[j].vcpu_bo,
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&adev->uvd.inst[j].gpu_addr,
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@ -222,7 +222,7 @@ int amdgpu_vce_sw_fini(struct amdgpu_device *adev)
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if (adev->vce.vcpu_bo == NULL)
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return 0;
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drm_sched_entity_fini(&adev->vce.ring[0].sched, &adev->vce.entity);
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drm_sched_entity_destroy(&adev->vce.ring[0].sched, &adev->vce.entity);
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amdgpu_bo_free_kernel(&adev->vce.vcpu_bo, &adev->vce.gpu_addr,
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(void **)&adev->vce.cpu_addr);
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@ -2643,7 +2643,7 @@ error_free_root:
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vm->root.base.bo = NULL;
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error_free_sched_entity:
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drm_sched_entity_fini(&ring->sched, &vm->entity);
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drm_sched_entity_destroy(&ring->sched, &vm->entity);
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return r;
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}
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@ -2780,7 +2780,7 @@ void amdgpu_vm_fini(struct amdgpu_device *adev, struct amdgpu_vm *vm)
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spin_unlock_irqrestore(&adev->vm_manager.pasid_lock, flags);
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}
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drm_sched_entity_fini(vm->entity.sched, &vm->entity);
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drm_sched_entity_destroy(vm->entity.sched, &vm->entity);
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if (!RB_EMPTY_ROOT(&vm->va.rb_root)) {
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dev_err(adev->dev, "still active bo inside vm\n");
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@ -470,7 +470,7 @@ static int uvd_v6_0_sw_fini(void *handle)
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return r;
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if (uvd_v6_0_enc_support(adev)) {
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drm_sched_entity_fini(&adev->uvd.inst->ring_enc[0].sched, &adev->uvd.inst->entity_enc);
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drm_sched_entity_destroy(&adev->uvd.inst->ring_enc[0].sched, &adev->uvd.inst->entity_enc);
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for (i = 0; i < adev->uvd.num_enc_rings; ++i)
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amdgpu_ring_fini(&adev->uvd.inst->ring_enc[i]);
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@ -491,7 +491,7 @@ static int uvd_v7_0_sw_fini(void *handle)
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return r;
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for (j = 0; j < adev->uvd.num_uvd_inst; ++j) {
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drm_sched_entity_fini(&adev->uvd.inst[j].ring_enc[0].sched, &adev->uvd.inst[j].entity_enc);
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drm_sched_entity_destroy(&adev->uvd.inst[j].ring_enc[0].sched, &adev->uvd.inst[j].entity_enc);
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for (i = 0; i < adev->uvd.num_enc_rings; ++i)
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amdgpu_ring_fini(&adev->uvd.inst[j].ring_enc[i]);
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@ -78,8 +78,8 @@ static void etnaviv_postclose(struct drm_device *dev, struct drm_file *file)
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gpu->lastctx = NULL;
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mutex_unlock(&gpu->lock);
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drm_sched_entity_fini(&gpu->sched,
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&ctx->sched_entity[i]);
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drm_sched_entity_destroy(&gpu->sched,
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&ctx->sched_entity[i]);
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}
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}
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@ -256,7 +256,7 @@ static void drm_sched_entity_kill_jobs_cb(struct dma_fence *f,
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/**
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* drm_sched_entity_do_release - Destroy a context entity
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* drm_sched_entity_flush - Flush a context entity
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*
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* @sched: scheduler instance
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* @entity: scheduler entity
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@ -267,7 +267,7 @@ static void drm_sched_entity_kill_jobs_cb(struct dma_fence *f,
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*
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* Returns the remaining time in jiffies left from the input timeout
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*/
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long drm_sched_entity_do_release(struct drm_gpu_scheduler *sched,
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long drm_sched_entity_flush(struct drm_gpu_scheduler *sched,
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struct drm_sched_entity *entity, long timeout)
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{
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long ret = timeout;
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@ -294,7 +294,7 @@ long drm_sched_entity_do_release(struct drm_gpu_scheduler *sched,
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return ret;
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}
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EXPORT_SYMBOL(drm_sched_entity_do_release);
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EXPORT_SYMBOL(drm_sched_entity_flush);
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/**
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* drm_sched_entity_cleanup - Destroy a context entity
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@ -306,7 +306,7 @@ EXPORT_SYMBOL(drm_sched_entity_do_release);
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* entity and signals all jobs with an error code if the process was killed.
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*
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*/
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void drm_sched_entity_cleanup(struct drm_gpu_scheduler *sched,
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void drm_sched_entity_fini(struct drm_gpu_scheduler *sched,
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struct drm_sched_entity *entity)
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{
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@ -357,7 +357,7 @@ void drm_sched_entity_cleanup(struct drm_gpu_scheduler *sched,
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dma_fence_put(entity->last_scheduled);
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entity->last_scheduled = NULL;
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}
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EXPORT_SYMBOL(drm_sched_entity_cleanup);
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EXPORT_SYMBOL(drm_sched_entity_fini);
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/**
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* drm_sched_entity_fini - Destroy a context entity
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@ -367,13 +367,13 @@ EXPORT_SYMBOL(drm_sched_entity_cleanup);
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*
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* Calls drm_sched_entity_do_release() and drm_sched_entity_cleanup()
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*/
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void drm_sched_entity_fini(struct drm_gpu_scheduler *sched,
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void drm_sched_entity_destroy(struct drm_gpu_scheduler *sched,
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struct drm_sched_entity *entity)
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{
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drm_sched_entity_do_release(sched, entity, MAX_WAIT_SCHED_ENTITY_Q_EMPTY);
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drm_sched_entity_cleanup(sched, entity);
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drm_sched_entity_flush(sched, entity, MAX_WAIT_SCHED_ENTITY_Q_EMPTY);
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drm_sched_entity_fini(sched, entity);
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}
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EXPORT_SYMBOL(drm_sched_entity_fini);
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EXPORT_SYMBOL(drm_sched_entity_destroy);
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static void drm_sched_entity_wakeup(struct dma_fence *f, struct dma_fence_cb *cb)
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{
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@ -151,7 +151,7 @@ v3d_postclose(struct drm_device *dev, struct drm_file *file)
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enum v3d_queue q;
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for (q = 0; q < V3D_MAX_QUEUES; q++) {
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drm_sched_entity_fini(&v3d->queue[q].sched,
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drm_sched_entity_destroy(&v3d->queue[q].sched,
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&v3d_priv->sched_entity[q]);
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}
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@ -284,12 +284,12 @@ int drm_sched_entity_init(struct drm_gpu_scheduler *sched,
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struct drm_sched_entity *entity,
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struct drm_sched_rq *rq,
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atomic_t *guilty);
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long drm_sched_entity_do_release(struct drm_gpu_scheduler *sched,
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long drm_sched_entity_flush(struct drm_gpu_scheduler *sched,
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struct drm_sched_entity *entity, long timeout);
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void drm_sched_entity_cleanup(struct drm_gpu_scheduler *sched,
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struct drm_sched_entity *entity);
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void drm_sched_entity_fini(struct drm_gpu_scheduler *sched,
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struct drm_sched_entity *entity);
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void drm_sched_entity_destroy(struct drm_gpu_scheduler *sched,
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struct drm_sched_entity *entity);
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void drm_sched_entity_push_job(struct drm_sched_job *sched_job,
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struct drm_sched_entity *entity);
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void drm_sched_entity_set_rq(struct drm_sched_entity *entity,
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