clocksource: sh_cmt: Add DT support
Document DT bindings and parse them in the CMT driver. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Tested-by: Simon Horman <horms+renesas@verge.net.au>
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@ -0,0 +1,47 @@
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* Renesas R-Car Compare Match Timer (CMT)
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The CMT is a multi-channel 16/32/48-bit timer/counter with configurable clock
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inputs and programmable compare match.
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Channels share hardware resources but their counter and compare match value
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are independent. A particular CMT instance can implement only a subset of the
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channels supported by the CMT model. Channel indices represent the hardware
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position of the channel in the CMT and don't match the channel numbers in the
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datasheets.
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Required Properties:
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- compatible: must contain one of the following.
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- "renesas,cmt-32" for the 32-bit CMT
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(CMT0 on sh7372, sh73a0 and r8a7740)
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- "renesas,cmt-32-fast" for the 32-bit CMT with fast clock support
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(CMT[234] on sh7372, sh73a0 and r8a7740)
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- "renesas,cmt-48" for the 48-bit CMT
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(CMT1 on sh7372, sh73a0 and r8a7740)
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- "renesas,cmt-48-gen2" for the second generation 48-bit CMT
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(CMT[01] on r8a73a4, r8a7790 and r8a7791)
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- reg: base address and length of the registers block for the timer module.
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- interrupts: interrupt-specifier for the timer, one per channel.
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- clocks: a list of phandle + clock-specifier pairs, one for each entry
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in clock-names.
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- clock-names: must contain "fck" for the functional clock.
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- renesas,channels-mask: bitmask of the available channels.
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Example: R8A7790 (R-Car H2) CMT0 node
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CMT0 on R8A7790 implements hardware channels 5 and 6 only and names
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them channels 0 and 1 in the documentation.
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cmt0: timer@ffca0000 {
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compatible = "renesas,cmt-48-gen2";
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reg = <0 0xffca0000 0 0x1004>;
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interrupts = <0 142 IRQ_TYPE_LEVEL_HIGH>,
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<0 142 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&mstp1_clks R8A7790_CLK_CMT0>;
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clock-names = "fck";
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renesas,channels-mask = <0x60>;
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};
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@ -24,6 +24,7 @@
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#include <linux/ioport.h>
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#include <linux/irq.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/platform_device.h>
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#include <linux/pm_domain.h>
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#include <linux/pm_runtime.h>
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@ -122,6 +123,7 @@ struct sh_cmt_device {
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struct sh_cmt_channel *channels;
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unsigned int num_channels;
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unsigned int hw_channels;
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bool has_clockevent;
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bool has_clocksource;
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@ -924,10 +926,35 @@ static int sh_cmt_map_memory(struct sh_cmt_device *cmt)
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return 0;
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}
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static const struct platform_device_id sh_cmt_id_table[] = {
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{ "sh-cmt-16", (kernel_ulong_t)&sh_cmt_info[SH_CMT_16BIT] },
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{ "sh-cmt-32", (kernel_ulong_t)&sh_cmt_info[SH_CMT_32BIT] },
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{ "sh-cmt-32-fast", (kernel_ulong_t)&sh_cmt_info[SH_CMT_32BIT_FAST] },
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{ "sh-cmt-48", (kernel_ulong_t)&sh_cmt_info[SH_CMT_48BIT] },
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{ "sh-cmt-48-gen2", (kernel_ulong_t)&sh_cmt_info[SH_CMT_48BIT_GEN2] },
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{ }
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};
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MODULE_DEVICE_TABLE(platform, sh_cmt_id_table);
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static const struct of_device_id sh_cmt_of_table[] __maybe_unused = {
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{ .compatible = "renesas,cmt-32", .data = &sh_cmt_info[SH_CMT_32BIT] },
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{ .compatible = "renesas,cmt-32-fast", .data = &sh_cmt_info[SH_CMT_32BIT_FAST] },
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{ .compatible = "renesas,cmt-48", .data = &sh_cmt_info[SH_CMT_48BIT] },
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{ .compatible = "renesas,cmt-48-gen2", .data = &sh_cmt_info[SH_CMT_48BIT_GEN2] },
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{ }
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};
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MODULE_DEVICE_TABLE(of, sh_cmt_of_table);
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static int sh_cmt_parse_dt(struct sh_cmt_device *cmt)
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{
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struct device_node *np = cmt->pdev->dev.of_node;
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return of_property_read_u32(np, "renesas,channels-mask",
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&cmt->hw_channels);
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}
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static int sh_cmt_setup(struct sh_cmt_device *cmt, struct platform_device *pdev)
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{
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struct sh_timer_config *cfg = pdev->dev.platform_data;
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const struct platform_device_id *id = pdev->id_entry;
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unsigned int mask;
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unsigned int i;
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int ret;
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@ -936,13 +963,26 @@ static int sh_cmt_setup(struct sh_cmt_device *cmt, struct platform_device *pdev)
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cmt->pdev = pdev;
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raw_spin_lock_init(&cmt->lock);
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if (!cfg) {
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if (IS_ENABLED(CONFIG_OF) && pdev->dev.of_node) {
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const struct of_device_id *id;
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id = of_match_node(sh_cmt_of_table, pdev->dev.of_node);
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cmt->info = id->data;
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ret = sh_cmt_parse_dt(cmt);
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if (ret < 0)
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return ret;
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} else if (pdev->dev.platform_data) {
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struct sh_timer_config *cfg = pdev->dev.platform_data;
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const struct platform_device_id *id = pdev->id_entry;
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cmt->info = (const struct sh_cmt_info *)id->driver_data;
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cmt->hw_channels = cfg->channels_mask;
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} else {
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dev_err(&cmt->pdev->dev, "missing platform data\n");
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return -ENXIO;
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}
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cmt->info = (const struct sh_cmt_info *)id->driver_data;
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/* Get hold of clock. */
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cmt->clk = clk_get(&cmt->pdev->dev, "fck");
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if (IS_ERR(cmt->clk)) {
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goto err_clk_unprepare;
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/* Allocate and setup the channels. */
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cmt->num_channels = hweight8(cfg->channels_mask);
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cmt->num_channels = hweight8(cmt->hw_channels);
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cmt->channels = kzalloc(cmt->num_channels * sizeof(*cmt->channels),
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GFP_KERNEL);
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if (cmt->channels == NULL) {
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@ -973,7 +1012,7 @@ static int sh_cmt_setup(struct sh_cmt_device *cmt, struct platform_device *pdev)
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* Use the first channel as a clock event device and the second channel
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* as a clock source. If only one channel is available use it for both.
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*/
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for (i = 0, mask = cfg->channels_mask; i < cmt->num_channels; ++i) {
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for (i = 0, mask = cmt->hw_channels; i < cmt->num_channels; ++i) {
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unsigned int hwidx = ffs(mask) - 1;
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bool clocksource = i == 1 || cmt->num_channels == 1;
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bool clockevent = i == 0;
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return -EBUSY; /* cannot unregister clockevent and clocksource */
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}
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static const struct platform_device_id sh_cmt_id_table[] = {
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{ "sh-cmt-16", (kernel_ulong_t)&sh_cmt_info[SH_CMT_16BIT] },
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{ "sh-cmt-32", (kernel_ulong_t)&sh_cmt_info[SH_CMT_32BIT] },
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{ "sh-cmt-32-fast", (kernel_ulong_t)&sh_cmt_info[SH_CMT_32BIT_FAST] },
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{ "sh-cmt-48", (kernel_ulong_t)&sh_cmt_info[SH_CMT_48BIT] },
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{ "sh-cmt-48-gen2", (kernel_ulong_t)&sh_cmt_info[SH_CMT_48BIT_GEN2] },
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{ }
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};
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MODULE_DEVICE_TABLE(platform, sh_cmt_id_table);
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static struct platform_driver sh_cmt_device_driver = {
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.probe = sh_cmt_probe,
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.remove = sh_cmt_remove,
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.driver = {
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.name = "sh_cmt",
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.of_match_table = of_match_ptr(sh_cmt_of_table),
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},
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.id_table = sh_cmt_id_table,
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};
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