sh: Add SuperH Mobile CEU platform data for Migo-R
Add Migo-R specific platform data for on-chip sh7722 CEU and ov772x camera. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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8b1285f1c1
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1765534c23
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@ -15,6 +15,10 @@
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#include <linux/mtd/nand.h>
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#include <linux/i2c.h>
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#include <linux/smc91x.h>
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#include <linux/delay.h>
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#include <linux/clk.h>
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#include <media/soc_camera_platform.h>
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#include <media/sh_mobile_ceu.h>
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#include <asm/clock.h>
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#include <asm/machvec.h>
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#include <asm/io.h>
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@ -270,15 +274,167 @@ static struct platform_device migor_lcdc_device = {
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},
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};
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static struct clk *camera_clk;
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static void camera_power_on(void)
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{
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unsigned char value;
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camera_clk = clk_get(NULL, "video_clk");
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clk_set_rate(camera_clk, 24000000);
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clk_enable(camera_clk); /* start VIO_CKO */
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mdelay(10);
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value = ctrl_inb(PORT_PTDR);
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value &= ~0x09;
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#ifndef CONFIG_SH_MIGOR_RTA_WVGA
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value |= 0x01;
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#endif
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ctrl_outb(value, PORT_PTDR);
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mdelay(10);
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ctrl_outb(value | 8, PORT_PTDR);
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}
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static void camera_power_off(void)
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{
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clk_disable(camera_clk); /* stop VIO_CKO */
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clk_put(camera_clk);
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ctrl_outb(ctrl_inb(PORT_PTDR) & ~0x08, PORT_PTDR);
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}
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static unsigned char camera_ov772x_magic[] =
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{
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0x09, 0x01, 0x0c, 0x10, 0x0d, 0x41, 0x0e, 0x01,
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0x12, 0x00, 0x13, 0x8F, 0x14, 0x4A, 0x15, 0x00,
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0x16, 0x00, 0x17, 0x23, 0x18, 0xa0, 0x19, 0x07,
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0x1a, 0xf0, 0x1b, 0x40, 0x1f, 0x00, 0x20, 0x10,
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0x22, 0xff, 0x23, 0x01, 0x28, 0x00, 0x29, 0xa0,
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0x2a, 0x00, 0x2b, 0x00, 0x2c, 0xf0, 0x2d, 0x00,
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0x2e, 0x00, 0x30, 0x80, 0x31, 0x60, 0x32, 0x00,
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0x33, 0x00, 0x34, 0x00, 0x3d, 0x80, 0x3e, 0xe2,
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0x3f, 0x1f, 0x42, 0x80, 0x43, 0x80, 0x44, 0x80,
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0x45, 0x80, 0x46, 0x00, 0x47, 0x00, 0x48, 0x00,
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0x49, 0x50, 0x4a, 0x30, 0x4b, 0x50, 0x4c, 0x50,
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0x4d, 0x00, 0x4e, 0xef, 0x4f, 0x10, 0x50, 0x60,
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0x51, 0x00, 0x52, 0x00, 0x53, 0x24, 0x54, 0x7a,
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0x55, 0xfc, 0x62, 0xff, 0x63, 0xf0, 0x64, 0x1f,
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0x65, 0x00, 0x66, 0x10, 0x67, 0x00, 0x68, 0x00,
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0x69, 0x5c, 0x6a, 0x11, 0x6b, 0xa2, 0x6c, 0x01,
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0x6d, 0x50, 0x6e, 0x80, 0x6f, 0x80, 0x70, 0x0f,
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0x71, 0x00, 0x72, 0x00, 0x73, 0x0f, 0x74, 0x0f,
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0x75, 0xff, 0x78, 0x10, 0x79, 0x70, 0x7a, 0x70,
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0x7b, 0xf0, 0x7c, 0xf0, 0x7d, 0xf0, 0x7e, 0x0e,
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0x7f, 0x1a, 0x80, 0x31, 0x81, 0x5a, 0x82, 0x69,
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0x83, 0x75, 0x84, 0x7e, 0x85, 0x88, 0x86, 0x8f,
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0x87, 0x96, 0x88, 0xa3, 0x89, 0xaf, 0x8a, 0xc4,
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0x8b, 0xd7, 0x8c, 0xe8, 0x8d, 0x20, 0x8e, 0x00,
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0x8f, 0x00, 0x90, 0x08, 0x91, 0x10, 0x92, 0x1f,
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0x93, 0x01, 0x94, 0x2c, 0x95, 0x24, 0x96, 0x08,
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0x97, 0x14, 0x98, 0x24, 0x99, 0x38, 0x9a, 0x9e,
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0x9b, 0x00, 0x9c, 0x40, 0x9e, 0x11, 0x9f, 0x02,
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0xa0, 0x00, 0xa1, 0x40, 0xa2, 0x40, 0xa3, 0x06,
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0xa4, 0x00, 0xa6, 0x00, 0xa7, 0x40, 0xa8, 0x40,
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0xa9, 0x80, 0xaa, 0x80, 0xab, 0x06, 0xac, 0xff,
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0x12, 0x06, 0x64, 0x3f, 0x12, 0x46, 0x17, 0x3f,
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0x18, 0x50, 0x19, 0x03, 0x1a, 0x78, 0x29, 0x50,
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0x2c, 0x78,
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};
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static int ov772x_set_capture(struct soc_camera_platform_info *info,
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int enable)
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{
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struct i2c_adapter *a = i2c_get_adapter(0);
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struct i2c_msg msg;
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int ret = 0;
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int i;
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if (!enable)
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return 0; /* camera_power_off() is enough */
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for (i = 0; i < ARRAY_SIZE(camera_ov772x_magic); i += 2) {
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u_int8_t buf[8];
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msg.addr = 0x21;
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msg.buf = buf;
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msg.len = 2;
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msg.flags = 0;
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buf[0] = camera_ov772x_magic[i];
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buf[1] = camera_ov772x_magic[i + 1];
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ret = (ret < 0) ? ret : i2c_transfer(a, &msg, 1);
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}
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return ret;
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}
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static struct soc_camera_platform_info ov772x_info = {
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.iface = 0,
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.format_name = "RGB565",
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.format_depth = 16,
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.format = {
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.pixelformat = V4L2_PIX_FMT_RGB565,
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.colorspace = V4L2_COLORSPACE_SRGB,
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.width = 320,
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.height = 240,
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},
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.bus_param = SOCAM_PCLK_SAMPLE_RISING | SOCAM_HSYNC_ACTIVE_HIGH |
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SOCAM_VSYNC_ACTIVE_HIGH | SOCAM_MASTER | SOCAM_DATAWIDTH_8,
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.set_capture = ov772x_set_capture,
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};
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static struct platform_device migor_camera_device = {
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.name = "soc_camera_platform",
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.dev = {
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.platform_data = &ov772x_info,
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},
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};
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static struct sh_mobile_ceu_info sh_mobile_ceu_info = {
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.flags = SOCAM_MASTER | SOCAM_DATAWIDTH_8 | SOCAM_PCLK_SAMPLE_RISING \
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| SOCAM_HSYNC_ACTIVE_HIGH | SOCAM_VSYNC_ACTIVE_HIGH,
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.enable_camera = camera_power_on,
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.disable_camera = camera_power_off,
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};
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static struct resource migor_ceu_resources[] = {
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[0] = {
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.name = "CEU",
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.start = 0xfe910000,
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.end = 0xfe91009f,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = 52,
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.flags = IORESOURCE_IRQ,
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},
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[2] = {
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/* place holder for contiguous memory */
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},
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};
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static struct platform_device migor_ceu_device = {
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.name = "sh_mobile_ceu",
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.num_resources = ARRAY_SIZE(migor_ceu_resources),
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.resource = migor_ceu_resources,
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.dev = {
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.platform_data = &sh_mobile_ceu_info,
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},
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};
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static struct platform_device *migor_devices[] __initdata = {
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&smc91x_eth_device,
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&sh_keysc_device,
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&migor_lcdc_device,
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&migor_ceu_device,
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&migor_camera_device,
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&migor_nor_flash_device,
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&migor_nand_flash_device,
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};
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static struct i2c_board_info __initdata migor_i2c_devices[] = {
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static struct i2c_board_info migor_i2c_devices[] = {
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{
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I2C_BOARD_INFO("rs5c372b", 0x32),
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},
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@ -292,6 +448,9 @@ static int __init migor_devices_setup(void)
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{
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clk_always_enable("mstp214"); /* KEYSC */
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clk_always_enable("mstp200"); /* LCDC */
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clk_always_enable("mstp203"); /* CEU */
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platform_resource_setup_memory(&migor_ceu_device, "ceu", 4 << 20);
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i2c_register_board_info(0, migor_i2c_devices,
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ARRAY_SIZE(migor_i2c_devices));
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@ -344,6 +503,18 @@ static void __init migor_setup(char **cmdline_p)
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ctrl_outw(ctrl_inw(PORT_MSELCRB) | 0x0100, PORT_MSELCRB);
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ctrl_outw(ctrl_inw(PORT_HIZCRA) & ~0x01e0, PORT_HIZCRA);
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#endif
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/* CEU */
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ctrl_outw((ctrl_inw(PORT_PTCR) & ~0x03c3) | 0x0051, PORT_PTCR);
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ctrl_outw(ctrl_inw(PORT_PUCR) & ~0x03ff, PORT_PUCR);
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ctrl_outw(ctrl_inw(PORT_PVCR) & ~0x03ff, PORT_PVCR);
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ctrl_outw(ctrl_inw(PORT_PWCR) & ~0x3c00, PORT_PWCR);
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ctrl_outw(ctrl_inw(PORT_PSELC) | 0x0001, PORT_PSELC);
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ctrl_outw(ctrl_inw(PORT_PSELD) & ~0x2000, PORT_PSELD);
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ctrl_outw(ctrl_inw(PORT_PSELE) | 0x000f, PORT_PSELE);
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ctrl_outw(ctrl_inw(PORT_MSELCRB) | 0x2200, PORT_MSELCRB);
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ctrl_outw(ctrl_inw(PORT_HIZCRA) & ~0x0a00, PORT_HIZCRA);
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ctrl_outw(ctrl_inw(PORT_HIZCRB) & ~0x0003, PORT_HIZCRB);
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}
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static struct sh_machine_vector mv_migor __initmv = {
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@ -25,12 +25,16 @@
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#define PORT_PLCR 0xa4050114
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#define PORT_PMCR 0xa4050116
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#define PORT_PRCR 0xa405011c
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#define PORT_PTCR 0xa4050140
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#define PORT_PUCR 0xa4050142
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#define PORT_PVCR 0xa4050144
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#define PORT_PWCR 0xa4050146
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#define PORT_PXCR 0xa4050148
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#define PORT_PYCR 0xa405014a
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#define PORT_PZCR 0xa405014c
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#define PORT_PADR 0xa4050120
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#define PORT_PHDR 0xa405012e
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#define PORT_PTDR 0xa4050160
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#define PORT_PWDR 0xa4050166
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#define PORT_HIZCRA 0xa4050158
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#define PORT_PSELB 0xa4050150
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#define PORT_PSELC 0xa4050152
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#define PORT_PSELD 0xa4050154
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#define PORT_PSELE 0xa4050156
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#define PORT_HIZCRA 0xa4050158
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#define PORT_HIZCRB 0xa405015a
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