hollalinux
/
linux-sg2042
mirror of https://github.com/sophgo/linux-riscv.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

Bug fixes and clean-ups for Linux v5.15 

-----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEoE9b9c3U2JxX98mqbmZLrHqL0iMFAmE1QcoACgkQbmZLrHqL
 0iNwVA/9F+hiD9kfIj9nN0ljc4Y1JIzq5H2nL7VC0VBpAr1RxnDxlKIVBr2jbm6F
 YSk8MBmLhVtVIc2SJ8+oOzRAuZ1lChj1BWHy+OY00Q4TQmZ1zAJzqfMwm8lYSZgd
 y5THLlz2MHmH6HcqmvOCMoQoWVcxY99dvKkFzkl/f/pF8OoLv7eo9QeFNxkwySF0
 DVvZFZavFjrST3S+zYkA4VifhOGdeUbWmpIOvlv0e89Y3WG9XMJXy2E818ke/qRb
 tXD/xH83j0pB0vjCB2N4NnDxO1uOU/a/lgLSbX2F0eLhLMJ8byyiB/2vbUgHOLxl
 F8t3Fe+EITZIeuJ+zWJJPJ/t/qBVAKk8jLUVfSqmJXivHJU6HM0dZyNqEbaX00y/
 9FN+uRZM7PXb6U5Gb4lehCsuMAA+SV0BpTXcLBWvL59k2Ne3DtIDh8YF3EpfWhHh
 H7KRGqKCPCdpjP43JxNwuRonnKKUO4ovQ9aMOnYFBh7/Fdc4Awgpt9gLB893/ivn
 o5h4+PS39KJLkV1/a3w/kn6LLdsBArAfFVyboUxSgbCyfW3rphazvTu34B9Fm1Py
 AIsnW8OtW/V9+n8olOkQ2NdiB+v3FXOBVmjOyk5j/Vr5ZoEJyNocW3llCxbe5V93
 DLvhSS/DWmiJVfGLz92bq/2QFqGKf3bWI8C/auMOKuHjqDewOR8=
 =1kqW
 -----END PGP SIGNATURE-----

Merge tag 'ntb-5.15' of git://github.com/jonmason/ntb

Pull NTB updates from Jon Mason:
 "Bug fixes and clean-ups for Linux v5.15"

* tag 'ntb-5.15' of git://github.com/jonmason/ntb:
  NTB: switch from 'pci_' to 'dma_' API
  ntb: ntb_pingpong: remove redundant initialization of variables msg_data and spad_data
  NTB: perf: Fix an error code in perf_setup_inbuf()
  NTB: Fix an error code in ntb_msit_probe()
  ntb: intel: remove invalid email address in header comment
This commit is contained in:
Linus Torvalds 2021-09-07 13:05:02 -07:00
parent 21f577b0f4 38de3afffb
commit 1735715e0f
7 changed files with 11 additions and 38 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

12
drivers/ntb/hw/amd/ntb_hw_amd.c
View File

@ -1176,22 +1176,14 @@ static int amd_ntb_init_pci(struct amd_ntb_dev *ndev,
pci_set_master(pdev);
rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
rc = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
if (rc) {
rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
rc = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
if (rc)
goto err_dma_mask;
dev_warn(&pdev->dev, "Cannot DMA highmem\n");
}
rc = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64));
if (rc) {
rc = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
if (rc)
goto err_dma_mask;
dev_warn(&pdev->dev, "Cannot DMA consistent highmem\n");
}
ndev->self_mmio = pci_iomap(pdev, 0, 0);
if (!ndev->self_mmio) {
rc = -EIO;

15
drivers/ntb/hw/idt/ntb_hw_idt.c
View File

@ -2640,26 +2640,15 @@ static int idt_init_pci(struct idt_ntb_dev *ndev)
int ret;
/* Initialize the bit mask of PCI/NTB DMA */
ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
ret = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
if (ret != 0) {
ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
ret = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
if (ret != 0) {
dev_err(&pdev->dev, "Failed to set DMA bit mask\n");
return ret;
}
dev_warn(&pdev->dev, "Cannot set DMA highmem bit mask\n");
}
ret = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64));
if (ret != 0) {
ret = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
if (ret != 0) {
dev_err(&pdev->dev,
"Failed to set consistent DMA bit mask\n");
return ret;
}
dev_warn(&pdev->dev,
"Cannot set consistent DMA highmem bit mask\n");
}
/*
* Enable the device advanced error reporting. It's not critical to

12
drivers/ntb/hw/intel/ntb_hw_gen1.c
View File

@ -1771,22 +1771,14 @@ static int intel_ntb_init_pci(struct intel_ntb_dev *ndev, struct pci_dev *pdev)
pci_set_master(pdev);
rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
rc = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
if (rc) {
rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
rc = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
if (rc)
goto err_dma_mask;
dev_warn(&pdev->dev, "Cannot DMA highmem\n");
}
rc = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64));
if (rc) {
rc = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
if (rc)
goto err_dma_mask;
dev_warn(&pdev->dev, "Cannot DMA consistent highmem\n");
}
ndev->self_mmio = pci_iomap(pdev, 0, 0);
if (!ndev->self_mmio) {
rc = -EIO;

3
drivers/ntb/hw/intel/ntb_hw_intel.h
View File

@ -43,9 +43,6 @@
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* Intel PCIe NTB Linux driver
*
* Contact Information:
* Jon Mason <jon.mason@intel.com>
*/
#ifndef NTB_HW_INTEL_H

4
drivers/ntb/test/ntb_msi_test.c
View File

@ -369,8 +369,10 @@ static int ntb_msit_probe(struct ntb_client *client, struct ntb_dev *ntb)
if (ret)
goto remove_dbgfs;
if (!nm->isr_ctx)
if (!nm->isr_ctx) {
ret = -ENOMEM;
goto remove_dbgfs;
}
ntb_link_enable(ntb, NTB_SPEED_AUTO, NTB_WIDTH_AUTO);

1
drivers/ntb/test/ntb_perf.c
View File

@ -598,6 +598,7 @@ static int perf_setup_inbuf(struct perf_peer *peer)
return -ENOMEM;
}
if (!IS_ALIGNED(peer->inbuf_xlat, xlat_align)) {
ret = -EINVAL;
dev_err(&perf->ntb->dev, "Unaligned inbuf allocated\n");
goto err_free_inbuf;
}

2
drivers/ntb/test/ntb_pingpong.c
View File

@ -187,7 +187,7 @@ static void pp_ping(struct pp_ctx *pp)
static void pp_pong(struct pp_ctx *pp)
{
u32 msg_data = -1, spad_data = -1;
u32 msg_data, spad_data;
int pidx = 0;
/* Read pong data */