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[PATCH] x86: Fix potential overflow in perfctr reservation 

While reviewing this code again I found a potential overflow of the bitmap.
The p4 oprofile can theoretically set bits beyond the reservation bitmap for
specific configurations. Avoid that by sizing the bitmaps properly.

Signed-off-by: Andi Kleen <ak@suse.de>
This commit is contained in:
Andi Kleen 2007-04-16 10:30:27 +02:00 committed by Andi Kleen
parent 08269c6d38
commit 1714f9bfc9
2 changed files with 11 additions and 8 deletions
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9
arch/i386/kernel/nmi.c
View File

@ -41,16 +41,17 @@ int nmi_watchdog_enabled;
* different subsystems this reservation system just tries to coordinate * different subsystems this reservation system just tries to coordinate
* things a little * things a little
*/ */
static DEFINE_PER_CPU(unsigned long, perfctr_nmi_owner);
static DEFINE_PER_CPU(unsigned long, evntsel_nmi_owner[3]);
static cpumask_t backtrace_mask = CPU_MASK_NONE;
/* this number is calculated from Intel's MSR_P4_CRU_ESCR5 register and it's /* this number is calculated from Intel's MSR_P4_CRU_ESCR5 register and it's
* offset from MSR_P4_BSU_ESCR0. It will be the max for all platforms (for now) * offset from MSR_P4_BSU_ESCR0. It will be the max for all platforms (for now)
*/ */
#define NMI_MAX_COUNTER_BITS 66 #define NMI_MAX_COUNTER_BITS 66
#define NMI_MAX_COUNTER_LONGS BITS_TO_LONGS(NMI_MAX_COUNTER_BITS)
static DEFINE_PER_CPU(unsigned long, perfctr_nmi_owner[NMI_MAX_COUNTER_LONGS]);
static DEFINE_PER_CPU(unsigned long, evntsel_nmi_owner[NMI_MAX_COUNTER_LONGS]);
static cpumask_t backtrace_mask = CPU_MASK_NONE;
/* nmi_active: /* nmi_active:
* >0: the lapic NMI watchdog is active, but can be disabled * >0: the lapic NMI watchdog is active, but can be disabled
* <0: the lapic NMI watchdog has not been set up, and cannot * <0: the lapic NMI watchdog has not been set up, and cannot

10
arch/x86_64/kernel/nmi.c
View File

@ -39,15 +39,17 @@ int panic_on_unrecovered_nmi;
* different subsystems this reservation system just tries to coordinate * different subsystems this reservation system just tries to coordinate
* things a little * things a little
*/ */
static DEFINE_PER_CPU(unsigned, perfctr_nmi_owner);
static DEFINE_PER_CPU(unsigned, evntsel_nmi_owner[2]);
static cpumask_t backtrace_mask = CPU_MASK_NONE;
/* this number is calculated from Intel's MSR_P4_CRU_ESCR5 register and it's /* this number is calculated from Intel's MSR_P4_CRU_ESCR5 register and it's
* offset from MSR_P4_BSU_ESCR0. It will be the max for all platforms (for now) * offset from MSR_P4_BSU_ESCR0. It will be the max for all platforms (for now)
*/ */
#define NMI_MAX_COUNTER_BITS 66 #define NMI_MAX_COUNTER_BITS 66
#define NMI_MAX_COUNTER_LONGS BITS_TO_LONGS(NMI_MAX_COUNTER_BITS)
static DEFINE_PER_CPU(unsigned, perfctr_nmi_owner[NMI_MAX_COUNTER_LONGS]);
static DEFINE_PER_CPU(unsigned, evntsel_nmi_owner[NMI_MAX_COUNTER_LONGS]);
static cpumask_t backtrace_mask = CPU_MASK_NONE;
/* nmi_active: /* nmi_active:
* >0: the lapic NMI watchdog is active, but can be disabled * >0: the lapic NMI watchdog is active, but can be disabled