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rtc: pcf2127: Run a OTP refresh if not done before 

The datasheet of the PCF2127 states, it is recommended to process an OTP
refresh once the power is up and the oscillator is operating stable. The
OTP refresh takes less than 100 ms to complete.

Signed-off-by: Philipp Rosenberger <p.rosenberger@kunbus.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Link: https://lore.kernel.org/r/20210118085752.5759-3-p.rosenberger@kunbus.com
This commit is contained in:
Philipp Rosenberger 2021-01-18 09:57:52 +01:00 committed by Alexandre Belloni
parent b9ac079abe
commit 15f57b3e31
1 changed files with 17 additions and 0 deletions
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17
drivers/rtc/rtc-pcf2127.c
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@ -58,6 +58,9 @@
#define PCF2127_REG_ALARM_DM 0x0D #define PCF2127_REG_ALARM_DM 0x0D
#define PCF2127_REG_ALARM_DW 0x0E #define PCF2127_REG_ALARM_DW 0x0E
#define PCF2127_BIT_ALARM_AE BIT(7) #define PCF2127_BIT_ALARM_AE BIT(7)
/* CLKOUT control register */
#define PCF2127_REG_CLKOUT 0x0f
#define PCF2127_BIT_CLKOUT_OTPR BIT(5)
/* Watchdog registers */ /* Watchdog registers */
#define PCF2127_REG_WD_CTL 0x10 #define PCF2127_REG_WD_CTL 0x10
#define PCF2127_BIT_WD_CTL_TF0 BIT(0) #define PCF2127_BIT_WD_CTL_TF0 BIT(0)
@ -559,6 +562,7 @@ static int pcf2127_probe(struct device *dev, struct regmap *regmap,
{ {
struct pcf2127 *pcf2127; struct pcf2127 *pcf2127;
int ret = 0; int ret = 0;
unsigned int val;
dev_dbg(dev, "%s\n", __func__); dev_dbg(dev, "%s\n", __func__);
@ -615,6 +619,19 @@ static int pcf2127_probe(struct device *dev, struct regmap *regmap,
regmap_clear_bits(pcf2127->regmap, PCF2127_REG_CTRL1, regmap_clear_bits(pcf2127->regmap, PCF2127_REG_CTRL1,
PCF2127_BIT_CTRL1_POR_OVRD); PCF2127_BIT_CTRL1_POR_OVRD);
ret = regmap_read(pcf2127->regmap, PCF2127_REG_CLKOUT, &val);
if (ret < 0)
return ret;
if (!(val & PCF2127_BIT_CLKOUT_OTPR)) {
ret = regmap_set_bits(pcf2127->regmap, PCF2127_REG_CLKOUT,
PCF2127_BIT_CLKOUT_OTPR);
if (ret < 0)
return ret;
msleep(100);
}
/* /*
* Watchdog timer enabled and reset pin /RST activated when timed out. * Watchdog timer enabled and reset pin /RST activated when timed out.
* Select 1Hz clock source for watchdog timer. * Select 1Hz clock source for watchdog timer.