ARM: ux500: Enable PL022 SSP Controller in Device Tree
This SSP Controller supports a number of serial communication methods and as such cannot be registered using of_register_spi_devices. Instead we register it simply as a primecell device. Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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@ -204,7 +204,10 @@
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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// Add one of these for each child device
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cs-gpios = <&gpio0 31 &gpio4 14 &gpio4 16 &gpio6 22 &gpio7 0>;
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};
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uart@80120000 {
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@ -443,7 +443,7 @@ static struct stedma40_chan_cfg ssp0_dma_cfg_tx = {
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};
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#endif
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static struct pl022_ssp_controller ssp0_platform_data = {
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static struct pl022_ssp_controller ssp0_plat = {
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.bus_id = 0,
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#ifdef CONFIG_STE_DMA40
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.enable_dma = 1,
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@ -461,7 +461,7 @@ static struct pl022_ssp_controller ssp0_platform_data = {
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static void __init mop500_spi_init(struct device *parent)
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{
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db8500_add_ssp0(parent, &ssp0_platform_data);
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db8500_add_ssp0(parent, &ssp0_plat);
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}
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#ifdef CONFIG_STE_DMA40
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@ -749,6 +749,7 @@ struct of_dev_auxdata u8500_auxdata_lookup[] __initdata = {
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OF_DEV_AUXDATA("arm,pl011", 0x80120000, "uart0", &uart0_plat),
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OF_DEV_AUXDATA("arm,pl011", 0x80121000, "uart1", &uart1_plat),
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OF_DEV_AUXDATA("arm,pl011", 0x80007000, "uart2", &uart2_plat),
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OF_DEV_AUXDATA("arm,pl022", 0x80002000, "ssp0", &ssp0_plat),
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{},
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};
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@ -804,7 +805,6 @@ static void __init u8500_init_machine(void)
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hrefv60_sdi_init(parent);
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}
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mop500_i2c_init(parent);
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mop500_spi_init(parent);
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i2c_register_board_info(0, mop500_i2c0_devices, i2c0_devs);
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i2c_register_board_info(2, mop500_i2c2_devices,
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