Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-2.6
* git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-2.6: (44 commits) qlge: Fix sparse warnings for tx ring indexes. qlge: Fix sparse warning regarding rx buffer queues. qlge: Fix sparse endian warning in ql_hw_csum_setup(). qlge: Fix sparse endian warning for inbound packet control block flags. qlge: Fix sparse warnings for byte swapping in qlge_ethool.c myri10ge: print MAC and serial number on probe failure pkt_sched: cls_u32: Fix locking in u32_change() iucv: fix cpu hotplug af_iucv: Free iucv path/socket in path_pending callback af_iucv: avoid left over IUCV connections from failing connects af_iucv: New error return codes for connect() net/ehea: bitops work on unsigned longs Revert "net: Fix for initial link state in 2.6.28" tcp: Kill extraneous SPLICE_F_NONBLOCK checks. tcp: don't mask EOF and socket errors on nonblocking splice receive dccp: Integrate the TFRC library with DCCP dccp: Clean up ccid.c after integration of CCID plugins dccp: Lockless integration of CCID congestion-control plugins qeth: get rid of extra argument after printk to dev_* conversion qeth: No large send using EDDP for HiperSockets. ...
This commit is contained in:
commit
15b0669072
|
@ -1519,7 +1519,7 @@ static int decodeFVteln(char *teln, unsigned long *bmaskp, int *activep)
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|||
int digit2 = 0;
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if (!isdigit(*s)) return -3;
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while (isdigit(*s)) { digit1 = digit1*10 + (*s - '0'); s++; }
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if (digit1 <= 0 && digit1 > 30) return -4;
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if (digit1 <= 0 || digit1 > 30) return -4;
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if (*s == 0 || *s == ',' || *s == ' ') {
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bmask |= (1 << digit1);
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digit1 = 0;
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|
@ -1530,7 +1530,7 @@ static int decodeFVteln(char *teln, unsigned long *bmaskp, int *activep)
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s++;
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if (!isdigit(*s)) return -3;
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while (isdigit(*s)) { digit2 = digit2*10 + (*s - '0'); s++; }
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if (digit2 <= 0 && digit2 > 30) return -4;
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if (digit2 <= 0 || digit2 > 30) return -4;
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if (*s == 0 || *s == ',' || *s == ' ') {
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if (digit1 > digit2)
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for (i = digit2; i <= digit1 ; i++)
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|
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@ -66,6 +66,7 @@
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#include <linux/mm.h>
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#include <linux/highmem.h>
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#include <linux/sockios.h>
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#include <linux/firmware.h>
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#if defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE)
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#include <linux/if_vlan.h>
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@ -186,8 +187,6 @@ MODULE_DEVICE_TABLE(pci, acenic_pci_tbl);
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#define MAX_RODATA_LEN 8*1024
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#define MAX_DATA_LEN 2*1024
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#include "acenic_firmware.h"
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#ifndef tigon2FwReleaseLocal
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#define tigon2FwReleaseLocal 0
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#endif
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|
@ -417,6 +416,10 @@ static int dis_pci_mem_inval[ACE_MAX_MOD_PARMS] = {1, 1, 1, 1, 1, 1, 1, 1};
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MODULE_AUTHOR("Jes Sorensen <jes@trained-monkey.org>");
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MODULE_LICENSE("GPL");
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MODULE_DESCRIPTION("AceNIC/3C985/GA620 Gigabit Ethernet driver");
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#ifndef CONFIG_ACENIC_OMIT_TIGON_I
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MODULE_FIRMWARE("acenic/tg1.bin");
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#endif
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MODULE_FIRMWARE("acenic/tg2.bin");
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module_param_array_named(link, link_state, int, NULL, 0);
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module_param_array(trace, int, NULL, 0);
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@ -943,8 +946,8 @@ static int __devinit ace_init(struct net_device *dev)
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case 4:
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case 5:
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printk(KERN_INFO " Tigon I (Rev. %i), Firmware: %i.%i.%i, ",
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tig_ver, tigonFwReleaseMajor, tigonFwReleaseMinor,
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tigonFwReleaseFix);
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tig_ver, ap->firmware_major, ap->firmware_minor,
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ap->firmware_fix);
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writel(0, ®s->LocalCtrl);
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ap->version = 1;
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ap->tx_ring_entries = TIGON_I_TX_RING_ENTRIES;
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@ -952,8 +955,8 @@ static int __devinit ace_init(struct net_device *dev)
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#endif
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case 6:
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printk(KERN_INFO " Tigon II (Rev. %i), Firmware: %i.%i.%i, ",
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tig_ver, tigon2FwReleaseMajor, tigon2FwReleaseMinor,
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tigon2FwReleaseFix);
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tig_ver, ap->firmware_major, ap->firmware_minor,
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ap->firmware_fix);
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writel(readl(®s->CpuBCtrl) | CPU_HALT, ®s->CpuBCtrl);
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readl(®s->CpuBCtrl); /* PCI write posting */
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/*
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@ -1205,7 +1208,9 @@ static int __devinit ace_init(struct net_device *dev)
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memset(ap->info, 0, sizeof(struct ace_info));
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memset(ap->skb, 0, sizeof(struct ace_skb));
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ace_load_firmware(dev);
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if (ace_load_firmware(dev))
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goto init_error;
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ap->fw_running = 0;
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tmp_ptr = ap->info_dma;
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|
@ -1441,10 +1446,7 @@ static int __devinit ace_init(struct net_device *dev)
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if (ap->version >= 2)
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writel(tmp, ®s->TuneFastLink);
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if (ACE_IS_TIGON_I(ap))
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writel(tigonFwStartAddr, ®s->Pc);
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if (ap->version == 2)
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writel(tigon2FwStartAddr, ®s->Pc);
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writel(ap->firmware_start, ®s->Pc);
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writel(0, ®s->Mb0Lo);
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|
@ -2761,8 +2763,8 @@ static void ace_get_drvinfo(struct net_device *dev,
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strlcpy(info->driver, "acenic", sizeof(info->driver));
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snprintf(info->version, sizeof(info->version), "%i.%i.%i",
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tigonFwReleaseMajor, tigonFwReleaseMinor,
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tigonFwReleaseFix);
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ap->firmware_major, ap->firmware_minor,
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ap->firmware_fix);
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if (ap->pdev)
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strlcpy(info->bus_info, pci_name(ap->pdev),
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|
@ -2869,11 +2871,10 @@ static struct net_device_stats *ace_get_stats(struct net_device *dev)
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}
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|
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static void __devinit ace_copy(struct ace_regs __iomem *regs, void *src,
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u32 dest, int size)
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static void __devinit ace_copy(struct ace_regs __iomem *regs, const __be32 *src,
|
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u32 dest, int size)
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{
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void __iomem *tdest;
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u32 *wsrc;
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short tsize, i;
|
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|
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if (size <= 0)
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||||
|
@ -2885,20 +2886,15 @@ static void __devinit ace_copy(struct ace_regs __iomem *regs, void *src,
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|||
tdest = (void __iomem *) ®s->Window +
|
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(dest & (ACE_WINDOW_SIZE - 1));
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writel(dest & ~(ACE_WINDOW_SIZE - 1), ®s->WinBase);
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/*
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* This requires byte swapping on big endian, however
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* writel does that for us
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*/
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wsrc = src;
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for (i = 0; i < (tsize / 4); i++) {
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writel(wsrc[i], tdest + i*4);
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/* Firmware is big-endian */
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writel(be32_to_cpup(src), tdest);
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src++;
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tdest += 4;
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dest += 4;
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size -= 4;
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}
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dest += tsize;
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src += tsize;
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size -= tsize;
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}
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|
||||
return;
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}
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|
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|
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|
@ -2937,8 +2933,13 @@ static void __devinit ace_clear(struct ace_regs __iomem *regs, u32 dest, int siz
|
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*/
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static int __devinit ace_load_firmware(struct net_device *dev)
|
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{
|
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const struct firmware *fw;
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const char *fw_name = "acenic/tg2.bin";
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struct ace_private *ap = netdev_priv(dev);
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struct ace_regs __iomem *regs = ap->regs;
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const __be32 *fw_data;
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u32 load_addr;
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int ret;
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if (!(readl(®s->CpuCtrl) & CPU_HALTED)) {
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printk(KERN_ERR "%s: trying to download firmware while the "
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|
@ -2946,28 +2947,52 @@ static int __devinit ace_load_firmware(struct net_device *dev)
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return -EFAULT;
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}
|
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|
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/*
|
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* Do not try to clear more than 512KB or we end up seeing
|
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* funny things on NICs with only 512KB SRAM
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*/
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ace_clear(regs, 0x2000, 0x80000-0x2000);
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if (ACE_IS_TIGON_I(ap)) {
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ace_copy(regs, tigonFwText, tigonFwTextAddr, tigonFwTextLen);
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ace_copy(regs, tigonFwData, tigonFwDataAddr, tigonFwDataLen);
|
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ace_copy(regs, tigonFwRodata, tigonFwRodataAddr,
|
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tigonFwRodataLen);
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ace_clear(regs, tigonFwBssAddr, tigonFwBssLen);
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ace_clear(regs, tigonFwSbssAddr, tigonFwSbssLen);
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}else if (ap->version == 2) {
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ace_clear(regs, tigon2FwBssAddr, tigon2FwBssLen);
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ace_clear(regs, tigon2FwSbssAddr, tigon2FwSbssLen);
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ace_copy(regs, tigon2FwText, tigon2FwTextAddr,tigon2FwTextLen);
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ace_copy(regs, tigon2FwRodata, tigon2FwRodataAddr,
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tigon2FwRodataLen);
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ace_copy(regs, tigon2FwData, tigon2FwDataAddr,tigon2FwDataLen);
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if (ACE_IS_TIGON_I(ap))
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fw_name = "acenic/tg1.bin";
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ret = request_firmware(&fw, fw_name, &ap->pdev->dev);
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if (ret) {
|
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printk(KERN_ERR "%s: Failed to load firmware \"%s\"\n",
|
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ap->name, fw_name);
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return ret;
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}
|
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|
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return 0;
|
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fw_data = (void *)fw->data;
|
||||
|
||||
/* Firmware blob starts with version numbers, followed by
|
||||
load and start address. Remainder is the blob to be loaded
|
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contiguously from load address. We don't bother to represent
|
||||
the BSS/SBSS sections any more, since we were clearing the
|
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whole thing anyway. */
|
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ap->firmware_major = fw->data[0];
|
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ap->firmware_minor = fw->data[1];
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ap->firmware_fix = fw->data[2];
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|
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ap->firmware_start = be32_to_cpu(fw_data[1]);
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if (ap->firmware_start < 0x4000 || ap->firmware_start >= 0x80000) {
|
||||
printk(KERN_ERR "%s: bogus load address %08x in \"%s\"\n",
|
||||
ap->name, ap->firmware_start, fw_name);
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ret = -EINVAL;
|
||||
goto out;
|
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}
|
||||
|
||||
load_addr = be32_to_cpu(fw_data[2]);
|
||||
if (load_addr < 0x4000 || load_addr >= 0x80000) {
|
||||
printk(KERN_ERR "%s: bogus load address %08x in \"%s\"\n",
|
||||
ap->name, load_addr, fw_name);
|
||||
ret = -EINVAL;
|
||||
goto out;
|
||||
}
|
||||
|
||||
/*
|
||||
* Do not try to clear more than 512KiB or we end up seeing
|
||||
* funny things on NICs with only 512KiB SRAM
|
||||
*/
|
||||
ace_clear(regs, 0x2000, 0x80000-0x2000);
|
||||
ace_copy(regs, &fw_data[3], load_addr, fw->size-12);
|
||||
out:
|
||||
release_firmware(fw);
|
||||
return ret;
|
||||
}
|
||||
|
||||
|
||||
|
|
|
@ -694,6 +694,10 @@ struct ace_private
|
|||
u32 last_tx, last_std_rx, last_mini_rx;
|
||||
#endif
|
||||
int pci_using_dac;
|
||||
u8 firmware_major;
|
||||
u8 firmware_minor;
|
||||
u8 firmware_fix;
|
||||
u32 firmware_start;
|
||||
};
|
||||
|
||||
|
||||
|
|
|
@ -658,12 +658,12 @@ static int e100_self_test(struct nic *nic)
|
|||
e100_disable_irq(nic);
|
||||
|
||||
/* Check results of self-test */
|
||||
if(nic->mem->selftest.result != 0) {
|
||||
if (nic->mem->selftest.result != 0) {
|
||||
DPRINTK(HW, ERR, "Self-test failed: result=0x%08X\n",
|
||||
nic->mem->selftest.result);
|
||||
return -ETIMEDOUT;
|
||||
}
|
||||
if(nic->mem->selftest.signature == 0) {
|
||||
if (nic->mem->selftest.signature == 0) {
|
||||
DPRINTK(HW, ERR, "Self-test failed: timed out\n");
|
||||
return -ETIMEDOUT;
|
||||
}
|
||||
|
@ -684,13 +684,13 @@ static void e100_eeprom_write(struct nic *nic, u16 addr_len, u16 addr, __le16 da
|
|||
cmd_addr_data[2] = op_ewds << (addr_len - 2);
|
||||
|
||||
/* Bit-bang cmds to write word to eeprom */
|
||||
for(j = 0; j < 3; j++) {
|
||||
for (j = 0; j < 3; j++) {
|
||||
|
||||
/* Chip select */
|
||||
iowrite8(eecs | eesk, &nic->csr->eeprom_ctrl_lo);
|
||||
e100_write_flush(nic); udelay(4);
|
||||
|
||||
for(i = 31; i >= 0; i--) {
|
||||
for (i = 31; i >= 0; i--) {
|
||||
ctrl = (cmd_addr_data[j] & (1 << i)) ?
|
||||
eecs | eedi : eecs;
|
||||
iowrite8(ctrl, &nic->csr->eeprom_ctrl_lo);
|
||||
|
@ -723,7 +723,7 @@ static __le16 e100_eeprom_read(struct nic *nic, u16 *addr_len, u16 addr)
|
|||
e100_write_flush(nic); udelay(4);
|
||||
|
||||
/* Bit-bang to read word from eeprom */
|
||||
for(i = 31; i >= 0; i--) {
|
||||
for (i = 31; i >= 0; i--) {
|
||||
ctrl = (cmd_addr_data & (1 << i)) ? eecs | eedi : eecs;
|
||||
iowrite8(ctrl, &nic->csr->eeprom_ctrl_lo);
|
||||
e100_write_flush(nic); udelay(4);
|
||||
|
@ -734,7 +734,7 @@ static __le16 e100_eeprom_read(struct nic *nic, u16 *addr_len, u16 addr)
|
|||
/* Eeprom drives a dummy zero to EEDO after receiving
|
||||
* complete address. Use this to adjust addr_len. */
|
||||
ctrl = ioread8(&nic->csr->eeprom_ctrl_lo);
|
||||
if(!(ctrl & eedo) && i > 16) {
|
||||
if (!(ctrl & eedo) && i > 16) {
|
||||
*addr_len -= (i - 16);
|
||||
i = 17;
|
||||
}
|
||||
|
@ -758,9 +758,9 @@ static int e100_eeprom_load(struct nic *nic)
|
|||
e100_eeprom_read(nic, &addr_len, 0);
|
||||
nic->eeprom_wc = 1 << addr_len;
|
||||
|
||||
for(addr = 0; addr < nic->eeprom_wc; addr++) {
|
||||
for (addr = 0; addr < nic->eeprom_wc; addr++) {
|
||||
nic->eeprom[addr] = e100_eeprom_read(nic, &addr_len, addr);
|
||||
if(addr < nic->eeprom_wc - 1)
|
||||
if (addr < nic->eeprom_wc - 1)
|
||||
checksum += le16_to_cpu(nic->eeprom[addr]);
|
||||
}
|
||||
|
||||
|
@ -784,15 +784,15 @@ static int e100_eeprom_save(struct nic *nic, u16 start, u16 count)
|
|||
e100_eeprom_read(nic, &addr_len, 0);
|
||||
nic->eeprom_wc = 1 << addr_len;
|
||||
|
||||
if(start + count >= nic->eeprom_wc)
|
||||
if (start + count >= nic->eeprom_wc)
|
||||
return -EINVAL;
|
||||
|
||||
for(addr = start; addr < start + count; addr++)
|
||||
for (addr = start; addr < start + count; addr++)
|
||||
e100_eeprom_write(nic, addr_len, addr, nic->eeprom[addr]);
|
||||
|
||||
/* The checksum, stored in the last word, is calculated such that
|
||||
* the sum of words should be 0xBABA */
|
||||
for(addr = 0; addr < nic->eeprom_wc - 1; addr++)
|
||||
for (addr = 0; addr < nic->eeprom_wc - 1; addr++)
|
||||
checksum += le16_to_cpu(nic->eeprom[addr]);
|
||||
nic->eeprom[nic->eeprom_wc - 1] = cpu_to_le16(0xBABA - checksum);
|
||||
e100_eeprom_write(nic, addr_len, nic->eeprom_wc - 1,
|
||||
|
@ -812,19 +812,19 @@ static int e100_exec_cmd(struct nic *nic, u8 cmd, dma_addr_t dma_addr)
|
|||
spin_lock_irqsave(&nic->cmd_lock, flags);
|
||||
|
||||
/* Previous command is accepted when SCB clears */
|
||||
for(i = 0; i < E100_WAIT_SCB_TIMEOUT; i++) {
|
||||
if(likely(!ioread8(&nic->csr->scb.cmd_lo)))
|
||||
for (i = 0; i < E100_WAIT_SCB_TIMEOUT; i++) {
|
||||
if (likely(!ioread8(&nic->csr->scb.cmd_lo)))
|
||||
break;
|
||||
cpu_relax();
|
||||
if(unlikely(i > E100_WAIT_SCB_FAST))
|
||||
if (unlikely(i > E100_WAIT_SCB_FAST))
|
||||
udelay(5);
|
||||
}
|
||||
if(unlikely(i == E100_WAIT_SCB_TIMEOUT)) {
|
||||
if (unlikely(i == E100_WAIT_SCB_TIMEOUT)) {
|
||||
err = -EAGAIN;
|
||||
goto err_unlock;
|
||||
}
|
||||
|
||||
if(unlikely(cmd != cuc_resume))
|
||||
if (unlikely(cmd != cuc_resume))
|
||||
iowrite32(dma_addr, &nic->csr->scb.gen_ptr);
|
||||
iowrite8(cmd, &nic->csr->scb.cmd_lo);
|
||||
|
||||
|
@ -843,7 +843,7 @@ static int e100_exec_cb(struct nic *nic, struct sk_buff *skb,
|
|||
|
||||
spin_lock_irqsave(&nic->cb_lock, flags);
|
||||
|
||||
if(unlikely(!nic->cbs_avail)) {
|
||||
if (unlikely(!nic->cbs_avail)) {
|
||||
err = -ENOMEM;
|
||||
goto err_unlock;
|
||||
}
|
||||
|
@ -853,7 +853,7 @@ static int e100_exec_cb(struct nic *nic, struct sk_buff *skb,
|
|||
nic->cbs_avail--;
|
||||
cb->skb = skb;
|
||||
|
||||
if(unlikely(!nic->cbs_avail))
|
||||
if (unlikely(!nic->cbs_avail))
|
||||
err = -ENOSPC;
|
||||
|
||||
cb_prepare(nic, cb, skb);
|
||||
|
@ -864,15 +864,15 @@ static int e100_exec_cb(struct nic *nic, struct sk_buff *skb,
|
|||
wmb();
|
||||
cb->prev->command &= cpu_to_le16(~cb_s);
|
||||
|
||||
while(nic->cb_to_send != nic->cb_to_use) {
|
||||
if(unlikely(e100_exec_cmd(nic, nic->cuc_cmd,
|
||||
while (nic->cb_to_send != nic->cb_to_use) {
|
||||
if (unlikely(e100_exec_cmd(nic, nic->cuc_cmd,
|
||||
nic->cb_to_send->dma_addr))) {
|
||||
/* Ok, here's where things get sticky. It's
|
||||
* possible that we can't schedule the command
|
||||
* because the controller is too busy, so
|
||||
* let's just queue the command and try again
|
||||
* when another command is scheduled. */
|
||||
if(err == -ENOSPC) {
|
||||
if (err == -ENOSPC) {
|
||||
//request a reset
|
||||
schedule_work(&nic->tx_timeout_task);
|
||||
}
|
||||
|
@ -945,7 +945,7 @@ static void e100_get_defaults(struct nic *nic)
|
|||
|
||||
/* MAC type is encoded as rev ID; exception: ICH is treated as 82559 */
|
||||
nic->mac = (nic->flags & ich) ? mac_82559_D101M : nic->pdev->revision;
|
||||
if(nic->mac == mac_unknown)
|
||||
if (nic->mac == mac_unknown)
|
||||
nic->mac = mac_82557_D100_A;
|
||||
|
||||
nic->params.rfds = rfds;
|
||||
|
@ -1008,23 +1008,23 @@ static void e100_configure(struct nic *nic, struct cb *cb, struct sk_buff *skb)
|
|||
config->adaptive_ifs = nic->adaptive_ifs;
|
||||
config->loopback = nic->loopback;
|
||||
|
||||
if(nic->mii.force_media && nic->mii.full_duplex)
|
||||
if (nic->mii.force_media && nic->mii.full_duplex)
|
||||
config->full_duplex_force = 0x1; /* 1=force, 0=auto */
|
||||
|
||||
if(nic->flags & promiscuous || nic->loopback) {
|
||||
if (nic->flags & promiscuous || nic->loopback) {
|
||||
config->rx_save_bad_frames = 0x1; /* 1=save, 0=discard */
|
||||
config->rx_discard_short_frames = 0x0; /* 1=discard, 0=save */
|
||||
config->promiscuous_mode = 0x1; /* 1=on, 0=off */
|
||||
}
|
||||
|
||||
if(nic->flags & multicast_all)
|
||||
if (nic->flags & multicast_all)
|
||||
config->multicast_all = 0x1; /* 1=accept, 0=no */
|
||||
|
||||
/* disable WoL when up */
|
||||
if(netif_running(nic->netdev) || !(nic->flags & wol_magic))
|
||||
if (netif_running(nic->netdev) || !(nic->flags & wol_magic))
|
||||
config->magic_packet_disable = 0x1; /* 1=off, 0=on */
|
||||
|
||||
if(nic->mac >= mac_82558_D101_A4) {
|
||||
if (nic->mac >= mac_82558_D101_A4) {
|
||||
config->fc_disable = 0x1; /* 1=Tx fc off, 0=Tx fc on */
|
||||
config->mwi_enable = 0x1; /* 1=enable, 0=disable */
|
||||
config->standard_tcb = 0x0; /* 1=standard, 0=extended */
|
||||
|
@ -1369,21 +1369,21 @@ static int e100_phy_init(struct nic *nic)
|
|||
u16 bmcr, stat, id_lo, id_hi, cong;
|
||||
|
||||
/* Discover phy addr by searching addrs in order {1,0,2,..., 31} */
|
||||
for(addr = 0; addr < 32; addr++) {
|
||||
for (addr = 0; addr < 32; addr++) {
|
||||
nic->mii.phy_id = (addr == 0) ? 1 : (addr == 1) ? 0 : addr;
|
||||
bmcr = mdio_read(netdev, nic->mii.phy_id, MII_BMCR);
|
||||
stat = mdio_read(netdev, nic->mii.phy_id, MII_BMSR);
|
||||
stat = mdio_read(netdev, nic->mii.phy_id, MII_BMSR);
|
||||
if(!((bmcr == 0xFFFF) || ((stat == 0) && (bmcr == 0))))
|
||||
if (!((bmcr == 0xFFFF) || ((stat == 0) && (bmcr == 0))))
|
||||
break;
|
||||
}
|
||||
DPRINTK(HW, DEBUG, "phy_addr = %d\n", nic->mii.phy_id);
|
||||
if(addr == 32)
|
||||
if (addr == 32)
|
||||
return -EAGAIN;
|
||||
|
||||
/* Selected the phy and isolate the rest */
|
||||
for(addr = 0; addr < 32; addr++) {
|
||||
if(addr != nic->mii.phy_id) {
|
||||
for (addr = 0; addr < 32; addr++) {
|
||||
if (addr != nic->mii.phy_id) {
|
||||
mdio_write(netdev, addr, MII_BMCR, BMCR_ISOLATE);
|
||||
} else {
|
||||
bmcr = mdio_read(netdev, addr, MII_BMCR);
|
||||
|
@ -1400,7 +1400,7 @@ static int e100_phy_init(struct nic *nic)
|
|||
|
||||
/* Handle National tx phys */
|
||||
#define NCS_PHY_MODEL_MASK 0xFFF0FFFF
|
||||
if((nic->phy & NCS_PHY_MODEL_MASK) == phy_nsc_tx) {
|
||||
if ((nic->phy & NCS_PHY_MODEL_MASK) == phy_nsc_tx) {
|
||||
/* Disable congestion control */
|
||||
cong = mdio_read(netdev, nic->mii.phy_id, MII_NSC_CONG);
|
||||
cong |= NSC_CONG_TXREADY;
|
||||
|
@ -1408,7 +1408,7 @@ static int e100_phy_init(struct nic *nic)
|
|||
mdio_write(netdev, nic->mii.phy_id, MII_NSC_CONG, cong);
|
||||
}
|
||||
|
||||
if((nic->mac >= mac_82550_D102) || ((nic->flags & ich) &&
|
||||
if ((nic->mac >= mac_82550_D102) || ((nic->flags & ich) &&
|
||||
(mdio_read(netdev, nic->mii.phy_id, MII_TPISTATUS) & 0x8000) &&
|
||||
!(nic->eeprom[eeprom_cnfg_mdix] & eeprom_mdix_enabled))) {
|
||||
/* enable/disable MDI/MDI-X auto-switching. */
|
||||
|
@ -1426,25 +1426,25 @@ static int e100_hw_init(struct nic *nic)
|
|||
e100_hw_reset(nic);
|
||||
|
||||
DPRINTK(HW, ERR, "e100_hw_init\n");
|
||||
if(!in_interrupt() && (err = e100_self_test(nic)))
|
||||
if (!in_interrupt() && (err = e100_self_test(nic)))
|
||||
return err;
|
||||
|
||||
if((err = e100_phy_init(nic)))
|
||||
if ((err = e100_phy_init(nic)))
|
||||
return err;
|
||||
if((err = e100_exec_cmd(nic, cuc_load_base, 0)))
|
||||
if ((err = e100_exec_cmd(nic, cuc_load_base, 0)))
|
||||
return err;
|
||||
if((err = e100_exec_cmd(nic, ruc_load_base, 0)))
|
||||
if ((err = e100_exec_cmd(nic, ruc_load_base, 0)))
|
||||
return err;
|
||||
if ((err = e100_exec_cb_wait(nic, NULL, e100_setup_ucode)))
|
||||
return err;
|
||||
if((err = e100_exec_cb(nic, NULL, e100_configure)))
|
||||
if ((err = e100_exec_cb(nic, NULL, e100_configure)))
|
||||
return err;
|
||||
if((err = e100_exec_cb(nic, NULL, e100_setup_iaaddr)))
|
||||
if ((err = e100_exec_cb(nic, NULL, e100_setup_iaaddr)))
|
||||
return err;
|
||||
if((err = e100_exec_cmd(nic, cuc_dump_addr,
|
||||
if ((err = e100_exec_cmd(nic, cuc_dump_addr,
|
||||
nic->dma_addr + offsetof(struct mem, stats))))
|
||||
return err;
|
||||
if((err = e100_exec_cmd(nic, cuc_dump_reset, 0)))
|
||||
if ((err = e100_exec_cmd(nic, cuc_dump_reset, 0)))
|
||||
return err;
|
||||
|
||||
e100_disable_irq(nic);
|
||||
|
@ -1460,7 +1460,7 @@ static void e100_multi(struct nic *nic, struct cb *cb, struct sk_buff *skb)
|
|||
|
||||
cb->command = cpu_to_le16(cb_multi);
|
||||
cb->u.multi.count = cpu_to_le16(count * ETH_ALEN);
|
||||
for(i = 0; list && i < count; i++, list = list->next)
|
||||
for (i = 0; list && i < count; i++, list = list->next)
|
||||
memcpy(&cb->u.multi.addr[i*ETH_ALEN], &list->dmi_addr,
|
||||
ETH_ALEN);
|
||||
}
|
||||
|
@ -1472,12 +1472,12 @@ static void e100_set_multicast_list(struct net_device *netdev)
|
|||
DPRINTK(HW, DEBUG, "mc_count=%d, flags=0x%04X\n",
|
||||
netdev->mc_count, netdev->flags);
|
||||
|
||||
if(netdev->flags & IFF_PROMISC)
|
||||
if (netdev->flags & IFF_PROMISC)
|
||||
nic->flags |= promiscuous;
|
||||
else
|
||||
nic->flags &= ~promiscuous;
|
||||
|
||||
if(netdev->flags & IFF_ALLMULTI ||
|
||||
if (netdev->flags & IFF_ALLMULTI ||
|
||||
netdev->mc_count > E100_MAX_MULTICAST_ADDRS)
|
||||
nic->flags |= multicast_all;
|
||||
else
|
||||
|
@ -1500,7 +1500,7 @@ static void e100_update_stats(struct nic *nic)
|
|||
* complete, so we're always waiting for results of the
|
||||
* previous command. */
|
||||
|
||||
if(*complete == cpu_to_le32(cuc_dump_reset_complete)) {
|
||||
if (*complete == cpu_to_le32(cuc_dump_reset_complete)) {
|
||||
*complete = 0;
|
||||
nic->tx_frames = le32_to_cpu(s->tx_good_frames);
|
||||
nic->tx_collisions = le32_to_cpu(s->tx_total_collisions);
|
||||
|
@ -1527,12 +1527,12 @@ static void e100_update_stats(struct nic *nic)
|
|||
le32_to_cpu(s->tx_single_collisions);
|
||||
nic->tx_multiple_collisions +=
|
||||
le32_to_cpu(s->tx_multiple_collisions);
|
||||
if(nic->mac >= mac_82558_D101_A4) {
|
||||
if (nic->mac >= mac_82558_D101_A4) {
|
||||
nic->tx_fc_pause += le32_to_cpu(s->fc_xmt_pause);
|
||||
nic->rx_fc_pause += le32_to_cpu(s->fc_rcv_pause);
|
||||
nic->rx_fc_unsupported +=
|
||||
le32_to_cpu(s->fc_rcv_unsupported);
|
||||
if(nic->mac >= mac_82559_D101M) {
|
||||
if (nic->mac >= mac_82559_D101M) {
|
||||
nic->tx_tco_frames +=
|
||||
le16_to_cpu(s->xmt_tco_frames);
|
||||
nic->rx_tco_frames +=
|
||||
|
@ -1542,7 +1542,7 @@ static void e100_update_stats(struct nic *nic)
|
|||
}
|
||||
|
||||
|
||||
if(e100_exec_cmd(nic, cuc_dump_reset, 0))
|
||||
if (e100_exec_cmd(nic, cuc_dump_reset, 0))
|
||||
DPRINTK(TX_ERR, DEBUG, "exec cuc_dump_reset failed\n");
|
||||
}
|
||||
|
||||
|
@ -1551,19 +1551,19 @@ static void e100_adjust_adaptive_ifs(struct nic *nic, int speed, int duplex)
|
|||
/* Adjust inter-frame-spacing (IFS) between two transmits if
|
||||
* we're getting collisions on a half-duplex connection. */
|
||||
|
||||
if(duplex == DUPLEX_HALF) {
|
||||
if (duplex == DUPLEX_HALF) {
|
||||
u32 prev = nic->adaptive_ifs;
|
||||
u32 min_frames = (speed == SPEED_100) ? 1000 : 100;
|
||||
|
||||
if((nic->tx_frames / 32 < nic->tx_collisions) &&
|
||||
if ((nic->tx_frames / 32 < nic->tx_collisions) &&
|
||||
(nic->tx_frames > min_frames)) {
|
||||
if(nic->adaptive_ifs < 60)
|
||||
if (nic->adaptive_ifs < 60)
|
||||
nic->adaptive_ifs += 5;
|
||||
} else if (nic->tx_frames < min_frames) {
|
||||
if(nic->adaptive_ifs >= 5)
|
||||
if (nic->adaptive_ifs >= 5)
|
||||
nic->adaptive_ifs -= 5;
|
||||
}
|
||||
if(nic->adaptive_ifs != prev)
|
||||
if (nic->adaptive_ifs != prev)
|
||||
e100_exec_cb(nic, NULL, e100_configure);
|
||||
}
|
||||
}
|
||||
|
@ -1579,12 +1579,12 @@ static void e100_watchdog(unsigned long data)
|
|||
|
||||
mii_ethtool_gset(&nic->mii, &cmd);
|
||||
|
||||
if(mii_link_ok(&nic->mii) && !netif_carrier_ok(nic->netdev)) {
|
||||
if (mii_link_ok(&nic->mii) && !netif_carrier_ok(nic->netdev)) {
|
||||
printk(KERN_INFO "e100: %s NIC Link is Up %s Mbps %s Duplex\n",
|
||||
nic->netdev->name,
|
||||
cmd.speed == SPEED_100 ? "100" : "10",
|
||||
cmd.duplex == DUPLEX_FULL ? "Full" : "Half");
|
||||
} else if(!mii_link_ok(&nic->mii) && netif_carrier_ok(nic->netdev)) {
|
||||
} else if (!mii_link_ok(&nic->mii) && netif_carrier_ok(nic->netdev)) {
|
||||
printk(KERN_INFO "e100: %s NIC Link is Down\n",
|
||||
nic->netdev->name);
|
||||
}
|
||||
|
@ -1604,11 +1604,11 @@ static void e100_watchdog(unsigned long data)
|
|||
e100_update_stats(nic);
|
||||
e100_adjust_adaptive_ifs(nic, cmd.speed, cmd.duplex);
|
||||
|
||||
if(nic->mac <= mac_82557_D100_C)
|
||||
if (nic->mac <= mac_82557_D100_C)
|
||||
/* Issue a multicast command to workaround a 557 lock up */
|
||||
e100_set_multicast_list(nic->netdev);
|
||||
|
||||
if(nic->flags & ich && cmd.speed==SPEED_10 && cmd.duplex==DUPLEX_HALF)
|
||||
if (nic->flags & ich && cmd.speed==SPEED_10 && cmd.duplex==DUPLEX_HALF)
|
||||
/* Need SW workaround for ICH[x] 10Mbps/half duplex Tx hang. */
|
||||
nic->flags |= ich_10h_workaround;
|
||||
else
|
||||
|
@ -1623,7 +1623,7 @@ static void e100_xmit_prepare(struct nic *nic, struct cb *cb,
|
|||
{
|
||||
cb->command = nic->tx_command;
|
||||
/* interrupt every 16 packets regardless of delay */
|
||||
if((nic->cbs_avail & ~15) == nic->cbs_avail)
|
||||
if ((nic->cbs_avail & ~15) == nic->cbs_avail)
|
||||
cb->command |= cpu_to_le16(cb_i);
|
||||
cb->u.tcb.tbd_array = cb->dma_addr + offsetof(struct cb, u.tcb.tbd);
|
||||
cb->u.tcb.tcb_byte_count = 0;
|
||||
|
@ -1640,18 +1640,18 @@ static int e100_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
|
|||
struct nic *nic = netdev_priv(netdev);
|
||||
int err;
|
||||
|
||||
if(nic->flags & ich_10h_workaround) {
|
||||
if (nic->flags & ich_10h_workaround) {
|
||||
/* SW workaround for ICH[x] 10Mbps/half duplex Tx hang.
|
||||
Issue a NOP command followed by a 1us delay before
|
||||
issuing the Tx command. */
|
||||
if(e100_exec_cmd(nic, cuc_nop, 0))
|
||||
if (e100_exec_cmd(nic, cuc_nop, 0))
|
||||
DPRINTK(TX_ERR, DEBUG, "exec cuc_nop failed\n");
|
||||
udelay(1);
|
||||
}
|
||||
|
||||
err = e100_exec_cb(nic, skb, e100_xmit_prepare);
|
||||
|
||||
switch(err) {
|
||||
switch (err) {
|
||||
case -ENOSPC:
|
||||
/* We queued the skb, but now we're out of space. */
|
||||
DPRINTK(TX_ERR, DEBUG, "No space for CB\n");
|
||||
|
@ -1677,14 +1677,14 @@ static int e100_tx_clean(struct nic *nic)
|
|||
spin_lock(&nic->cb_lock);
|
||||
|
||||
/* Clean CBs marked complete */
|
||||
for(cb = nic->cb_to_clean;
|
||||
for (cb = nic->cb_to_clean;
|
||||
cb->status & cpu_to_le16(cb_complete);
|
||||
cb = nic->cb_to_clean = cb->next) {
|
||||
DPRINTK(TX_DONE, DEBUG, "cb[%d]->status = 0x%04X\n",
|
||||
(int)(((void*)cb - (void*)nic->cbs)/sizeof(struct cb)),
|
||||
cb->status);
|
||||
|
||||
if(likely(cb->skb != NULL)) {
|
||||
if (likely(cb->skb != NULL)) {
|
||||
dev->stats.tx_packets++;
|
||||
dev->stats.tx_bytes += cb->skb->len;
|
||||
|
||||
|
@ -1703,7 +1703,7 @@ static int e100_tx_clean(struct nic *nic)
|
|||
spin_unlock(&nic->cb_lock);
|
||||
|
||||
/* Recover from running out of Tx resources in xmit_frame */
|
||||
if(unlikely(tx_cleaned && netif_queue_stopped(nic->netdev)))
|
||||
if (unlikely(tx_cleaned && netif_queue_stopped(nic->netdev)))
|
||||
netif_wake_queue(nic->netdev);
|
||||
|
||||
return tx_cleaned;
|
||||
|
@ -1711,10 +1711,10 @@ static int e100_tx_clean(struct nic *nic)
|
|||
|
||||
static void e100_clean_cbs(struct nic *nic)
|
||||
{
|
||||
if(nic->cbs) {
|
||||
while(nic->cbs_avail != nic->params.cbs.count) {
|
||||
if (nic->cbs) {
|
||||
while (nic->cbs_avail != nic->params.cbs.count) {
|
||||
struct cb *cb = nic->cb_to_clean;
|
||||
if(cb->skb) {
|
||||
if (cb->skb) {
|
||||
pci_unmap_single(nic->pdev,
|
||||
le32_to_cpu(cb->u.tcb.tbd.buf_addr),
|
||||
le16_to_cpu(cb->u.tcb.tbd.size),
|
||||
|
@ -1746,10 +1746,10 @@ static int e100_alloc_cbs(struct nic *nic)
|
|||
|
||||
nic->cbs = pci_alloc_consistent(nic->pdev,
|
||||
sizeof(struct cb) * count, &nic->cbs_dma_addr);
|
||||
if(!nic->cbs)
|
||||
if (!nic->cbs)
|
||||
return -ENOMEM;
|
||||
|
||||
for(cb = nic->cbs, i = 0; i < count; cb++, i++) {
|
||||
for (cb = nic->cbs, i = 0; i < count; cb++, i++) {
|
||||
cb->next = (i + 1 < count) ? cb + 1 : nic->cbs;
|
||||
cb->prev = (i == 0) ? nic->cbs + count - 1 : cb - 1;
|
||||
|
||||
|
@ -1767,14 +1767,14 @@ static int e100_alloc_cbs(struct nic *nic)
|
|||
|
||||
static inline void e100_start_receiver(struct nic *nic, struct rx *rx)
|
||||
{
|
||||
if(!nic->rxs) return;
|
||||
if(RU_SUSPENDED != nic->ru_running) return;
|
||||
if (!nic->rxs) return;
|
||||
if (RU_SUSPENDED != nic->ru_running) return;
|
||||
|
||||
/* handle init time starts */
|
||||
if(!rx) rx = nic->rxs;
|
||||
if (!rx) rx = nic->rxs;
|
||||
|
||||
/* (Re)start RU if suspended or idle and RFA is non-NULL */
|
||||
if(rx->skb) {
|
||||
if (rx->skb) {
|
||||
e100_exec_cmd(nic, ruc_start, rx->dma_addr);
|
||||
nic->ru_running = RU_RUNNING;
|
||||
}
|
||||
|
@ -1783,7 +1783,7 @@ static inline void e100_start_receiver(struct nic *nic, struct rx *rx)
|
|||
#define RFD_BUF_LEN (sizeof(struct rfd) + VLAN_ETH_FRAME_LEN)
|
||||
static int e100_rx_alloc_skb(struct nic *nic, struct rx *rx)
|
||||
{
|
||||
if(!(rx->skb = netdev_alloc_skb(nic->netdev, RFD_BUF_LEN + NET_IP_ALIGN)))
|
||||
if (!(rx->skb = netdev_alloc_skb(nic->netdev, RFD_BUF_LEN + NET_IP_ALIGN)))
|
||||
return -ENOMEM;
|
||||
|
||||
/* Align, init, and map the RFD. */
|
||||
|
@ -1820,7 +1820,7 @@ static int e100_rx_indicate(struct nic *nic, struct rx *rx,
|
|||
struct rfd *rfd = (struct rfd *)skb->data;
|
||||
u16 rfd_status, actual_size;
|
||||
|
||||
if(unlikely(work_done && *work_done >= work_to_do))
|
||||
if (unlikely(work_done && *work_done >= work_to_do))
|
||||
return -EAGAIN;
|
||||
|
||||
/* Need to sync before taking a peek at cb_complete bit */
|
||||
|
@ -1847,7 +1847,7 @@ static int e100_rx_indicate(struct nic *nic, struct rx *rx,
|
|||
|
||||
/* Get actual data size */
|
||||
actual_size = le16_to_cpu(rfd->actual_size) & 0x3FFF;
|
||||
if(unlikely(actual_size > RFD_BUF_LEN - sizeof(struct rfd)))
|
||||
if (unlikely(actual_size > RFD_BUF_LEN - sizeof(struct rfd)))
|
||||
actual_size = RFD_BUF_LEN - sizeof(struct rfd);
|
||||
|
||||
/* Get data */
|
||||
|
@ -1872,10 +1872,10 @@ static int e100_rx_indicate(struct nic *nic, struct rx *rx,
|
|||
skb_put(skb, actual_size);
|
||||
skb->protocol = eth_type_trans(skb, nic->netdev);
|
||||
|
||||
if(unlikely(!(rfd_status & cb_ok))) {
|
||||
if (unlikely(!(rfd_status & cb_ok))) {
|
||||
/* Don't indicate if hardware indicates errors */
|
||||
dev_kfree_skb_any(skb);
|
||||
} else if(actual_size > ETH_DATA_LEN + VLAN_ETH_HLEN) {
|
||||
} else if (actual_size > ETH_DATA_LEN + VLAN_ETH_HLEN) {
|
||||
/* Don't indicate oversized frames */
|
||||
nic->rx_over_length_errors++;
|
||||
dev_kfree_skb_any(skb);
|
||||
|
@ -1883,7 +1883,7 @@ static int e100_rx_indicate(struct nic *nic, struct rx *rx,
|
|||
dev->stats.rx_packets++;
|
||||
dev->stats.rx_bytes += actual_size;
|
||||
netif_receive_skb(skb);
|
||||
if(work_done)
|
||||
if (work_done)
|
||||
(*work_done)++;
|
||||
}
|
||||
|
||||
|
@ -1901,7 +1901,7 @@ static void e100_rx_clean(struct nic *nic, unsigned int *work_done,
|
|||
struct rfd *old_before_last_rfd, *new_before_last_rfd;
|
||||
|
||||
/* Indicate newly arrived packets */
|
||||
for(rx = nic->rx_to_clean; rx->skb; rx = nic->rx_to_clean = rx->next) {
|
||||
for (rx = nic->rx_to_clean; rx->skb; rx = nic->rx_to_clean = rx->next) {
|
||||
err = e100_rx_indicate(nic, rx, work_done, work_to_do);
|
||||
/* Hit quota or no more to clean */
|
||||
if (-EAGAIN == err || -ENODATA == err)
|
||||
|
@ -1922,8 +1922,8 @@ static void e100_rx_clean(struct nic *nic, unsigned int *work_done,
|
|||
old_before_last_rfd = (struct rfd *)old_before_last_rx->skb->data;
|
||||
|
||||
/* Alloc new skbs to refill list */
|
||||
for(rx = nic->rx_to_use; !rx->skb; rx = nic->rx_to_use = rx->next) {
|
||||
if(unlikely(e100_rx_alloc_skb(nic, rx)))
|
||||
for (rx = nic->rx_to_use; !rx->skb; rx = nic->rx_to_use = rx->next) {
|
||||
if (unlikely(e100_rx_alloc_skb(nic, rx)))
|
||||
break; /* Better luck next time (see watchdog) */
|
||||
}
|
||||
|
||||
|
@ -1959,11 +1959,11 @@ static void e100_rx_clean(struct nic *nic, unsigned int *work_done,
|
|||
PCI_DMA_BIDIRECTIONAL);
|
||||
}
|
||||
|
||||
if(restart_required) {
|
||||
if (restart_required) {
|
||||
// ack the rnr?
|
||||
iowrite8(stat_ack_rnr, &nic->csr->scb.stat_ack);
|
||||
e100_start_receiver(nic, nic->rx_to_clean);
|
||||
if(work_done)
|
||||
if (work_done)
|
||||
(*work_done)++;
|
||||
}
|
||||
}
|
||||
|
@ -1975,9 +1975,9 @@ static void e100_rx_clean_list(struct nic *nic)
|
|||
|
||||
nic->ru_running = RU_UNINITIALIZED;
|
||||
|
||||
if(nic->rxs) {
|
||||
for(rx = nic->rxs, i = 0; i < count; rx++, i++) {
|
||||
if(rx->skb) {
|
||||
if (nic->rxs) {
|
||||
for (rx = nic->rxs, i = 0; i < count; rx++, i++) {
|
||||
if (rx->skb) {
|
||||
pci_unmap_single(nic->pdev, rx->dma_addr,
|
||||
RFD_BUF_LEN, PCI_DMA_BIDIRECTIONAL);
|
||||
dev_kfree_skb(rx->skb);
|
||||
|
@ -1999,13 +1999,13 @@ static int e100_rx_alloc_list(struct nic *nic)
|
|||
nic->rx_to_use = nic->rx_to_clean = NULL;
|
||||
nic->ru_running = RU_UNINITIALIZED;
|
||||
|
||||
if(!(nic->rxs = kcalloc(count, sizeof(struct rx), GFP_ATOMIC)))
|
||||
if (!(nic->rxs = kcalloc(count, sizeof(struct rx), GFP_ATOMIC)))
|
||||
return -ENOMEM;
|
||||
|
||||
for(rx = nic->rxs, i = 0; i < count; rx++, i++) {
|
||||
for (rx = nic->rxs, i = 0; i < count; rx++, i++) {
|
||||
rx->next = (i + 1 < count) ? rx + 1 : nic->rxs;
|
||||
rx->prev = (i == 0) ? nic->rxs + count - 1 : rx - 1;
|
||||
if(e100_rx_alloc_skb(nic, rx)) {
|
||||
if (e100_rx_alloc_skb(nic, rx)) {
|
||||
e100_rx_clean_list(nic);
|
||||
return -ENOMEM;
|
||||
}
|
||||
|
@ -2038,7 +2038,7 @@ static irqreturn_t e100_intr(int irq, void *dev_id)
|
|||
|
||||
DPRINTK(INTR, DEBUG, "stat_ack = 0x%02X\n", stat_ack);
|
||||
|
||||
if(stat_ack == stat_ack_not_ours || /* Not our interrupt */
|
||||
if (stat_ack == stat_ack_not_ours || /* Not our interrupt */
|
||||
stat_ack == stat_ack_not_present) /* Hardware is ejected */
|
||||
return IRQ_NONE;
|
||||
|
||||
|
@ -2046,10 +2046,10 @@ static irqreturn_t e100_intr(int irq, void *dev_id)
|
|||
iowrite8(stat_ack, &nic->csr->scb.stat_ack);
|
||||
|
||||
/* We hit Receive No Resource (RNR); restart RU after cleaning */
|
||||
if(stat_ack & stat_ack_rnr)
|
||||
if (stat_ack & stat_ack_rnr)
|
||||
nic->ru_running = RU_SUSPENDED;
|
||||
|
||||
if(likely(netif_rx_schedule_prep(&nic->napi))) {
|
||||
if (likely(netif_rx_schedule_prep(&nic->napi))) {
|
||||
e100_disable_irq(nic);
|
||||
__netif_rx_schedule(&nic->napi);
|
||||
}
|
||||
|
@ -2102,7 +2102,7 @@ static int e100_set_mac_address(struct net_device *netdev, void *p)
|
|||
|
||||
static int e100_change_mtu(struct net_device *netdev, int new_mtu)
|
||||
{
|
||||
if(new_mtu < ETH_ZLEN || new_mtu > ETH_DATA_LEN)
|
||||
if (new_mtu < ETH_ZLEN || new_mtu > ETH_DATA_LEN)
|
||||
return -EINVAL;
|
||||
netdev->mtu = new_mtu;
|
||||
return 0;
|
||||
|
@ -2121,16 +2121,16 @@ static int e100_up(struct nic *nic)
|
|||
{
|
||||
int err;
|
||||
|
||||
if((err = e100_rx_alloc_list(nic)))
|
||||
if ((err = e100_rx_alloc_list(nic)))
|
||||
return err;
|
||||
if((err = e100_alloc_cbs(nic)))
|
||||
if ((err = e100_alloc_cbs(nic)))
|
||||
goto err_rx_clean_list;
|
||||
if((err = e100_hw_init(nic)))
|
||||
if ((err = e100_hw_init(nic)))
|
||||
goto err_clean_cbs;
|
||||
e100_set_multicast_list(nic->netdev);
|
||||
e100_start_receiver(nic, NULL);
|
||||
mod_timer(&nic->watchdog, jiffies);
|
||||
if((err = request_irq(nic->pdev->irq, e100_intr, IRQF_SHARED,
|
||||
if ((err = request_irq(nic->pdev->irq, e100_intr, IRQF_SHARED,
|
||||
nic->netdev->name, nic->netdev)))
|
||||
goto err_no_irq;
|
||||
netif_wake_queue(nic->netdev);
|
||||
|
@ -2192,26 +2192,26 @@ static int e100_loopback_test(struct nic *nic, enum loopback loopback_mode)
|
|||
* in loopback mode, and the test passes if the received
|
||||
* packet compares byte-for-byte to the transmitted packet. */
|
||||
|
||||
if((err = e100_rx_alloc_list(nic)))
|
||||
if ((err = e100_rx_alloc_list(nic)))
|
||||
return err;
|
||||
if((err = e100_alloc_cbs(nic)))
|
||||
if ((err = e100_alloc_cbs(nic)))
|
||||
goto err_clean_rx;
|
||||
|
||||
/* ICH PHY loopback is broken so do MAC loopback instead */
|
||||
if(nic->flags & ich && loopback_mode == lb_phy)
|
||||
if (nic->flags & ich && loopback_mode == lb_phy)
|
||||
loopback_mode = lb_mac;
|
||||
|
||||
nic->loopback = loopback_mode;
|
||||
if((err = e100_hw_init(nic)))
|
||||
if ((err = e100_hw_init(nic)))
|
||||
goto err_loopback_none;
|
||||
|
||||
if(loopback_mode == lb_phy)
|
||||
if (loopback_mode == lb_phy)
|
||||
mdio_write(nic->netdev, nic->mii.phy_id, MII_BMCR,
|
||||
BMCR_LOOPBACK);
|
||||
|
||||
e100_start_receiver(nic, NULL);
|
||||
|
||||
if(!(skb = netdev_alloc_skb(nic->netdev, ETH_DATA_LEN))) {
|
||||
if (!(skb = netdev_alloc_skb(nic->netdev, ETH_DATA_LEN))) {
|
||||
err = -ENOMEM;
|
||||
goto err_loopback_none;
|
||||
}
|
||||
|
@ -2224,7 +2224,7 @@ static int e100_loopback_test(struct nic *nic, enum loopback loopback_mode)
|
|||
pci_dma_sync_single_for_cpu(nic->pdev, nic->rx_to_clean->dma_addr,
|
||||
RFD_BUF_LEN, PCI_DMA_BIDIRECTIONAL);
|
||||
|
||||
if(memcmp(nic->rx_to_clean->skb->data + sizeof(struct rfd),
|
||||
if (memcmp(nic->rx_to_clean->skb->data + sizeof(struct rfd),
|
||||
skb->data, ETH_DATA_LEN))
|
||||
err = -EAGAIN;
|
||||
|
||||
|
@ -2301,7 +2301,7 @@ static void e100_get_regs(struct net_device *netdev,
|
|||
buff[0] = ioread8(&nic->csr->scb.cmd_hi) << 24 |
|
||||
ioread8(&nic->csr->scb.cmd_lo) << 16 |
|
||||
ioread16(&nic->csr->scb.status);
|
||||
for(i = E100_PHY_REGS; i >= 0; i--)
|
||||
for (i = E100_PHY_REGS; i >= 0; i--)
|
||||
buff[1 + E100_PHY_REGS - i] =
|
||||
mdio_read(netdev, nic->mii.phy_id, i);
|
||||
memset(nic->mem->dump_buf, 0, sizeof(nic->mem->dump_buf));
|
||||
|
@ -2326,7 +2326,7 @@ static int e100_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
|
|||
!device_can_wakeup(&nic->pdev->dev))
|
||||
return -EOPNOTSUPP;
|
||||
|
||||
if(wol->wolopts)
|
||||
if (wol->wolopts)
|
||||
nic->flags |= wol_magic;
|
||||
else
|
||||
nic->flags &= ~wol_magic;
|
||||
|
@ -2385,7 +2385,7 @@ static int e100_set_eeprom(struct net_device *netdev,
|
|||
{
|
||||
struct nic *nic = netdev_priv(netdev);
|
||||
|
||||
if(eeprom->magic != E100_EEPROM_MAGIC)
|
||||
if (eeprom->magic != E100_EEPROM_MAGIC)
|
||||
return -EINVAL;
|
||||
|
||||
memcpy(&((u8 *)nic->eeprom)[eeprom->offset], bytes, eeprom->len);
|
||||
|
@ -2421,7 +2421,7 @@ static int e100_set_ringparam(struct net_device *netdev,
|
|||
if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending))
|
||||
return -EINVAL;
|
||||
|
||||
if(netif_running(netdev))
|
||||
if (netif_running(netdev))
|
||||
e100_down(nic);
|
||||
rfds->count = max(ring->rx_pending, rfds->min);
|
||||
rfds->count = min(rfds->count, rfds->max);
|
||||
|
@ -2429,7 +2429,7 @@ static int e100_set_ringparam(struct net_device *netdev,
|
|||
cbs->count = min(cbs->count, cbs->max);
|
||||
DPRINTK(DRV, INFO, "Ring Param settings: rx: %d, tx %d\n",
|
||||
rfds->count, cbs->count);
|
||||
if(netif_running(netdev))
|
||||
if (netif_running(netdev))
|
||||
e100_up(nic);
|
||||
|
||||
return 0;
|
||||
|
@ -2454,12 +2454,12 @@ static void e100_diag_test(struct net_device *netdev,
|
|||
memset(data, 0, E100_TEST_LEN * sizeof(u64));
|
||||
data[0] = !mii_link_ok(&nic->mii);
|
||||
data[1] = e100_eeprom_load(nic);
|
||||
if(test->flags & ETH_TEST_FL_OFFLINE) {
|
||||
if (test->flags & ETH_TEST_FL_OFFLINE) {
|
||||
|
||||
/* save speed, duplex & autoneg settings */
|
||||
err = mii_ethtool_gset(&nic->mii, &cmd);
|
||||
|
||||
if(netif_running(netdev))
|
||||
if (netif_running(netdev))
|
||||
e100_down(nic);
|
||||
data[2] = e100_self_test(nic);
|
||||
data[3] = e100_loopback_test(nic, lb_mac);
|
||||
|
@ -2468,10 +2468,10 @@ static void e100_diag_test(struct net_device *netdev,
|
|||
/* restore speed, duplex & autoneg settings */
|
||||
err = mii_ethtool_sset(&nic->mii, &cmd);
|
||||
|
||||
if(netif_running(netdev))
|
||||
if (netif_running(netdev))
|
||||
e100_up(nic);
|
||||
}
|
||||
for(i = 0; i < E100_TEST_LEN; i++)
|
||||
for (i = 0; i < E100_TEST_LEN; i++)
|
||||
test->flags |= data[i] ? ETH_TEST_FL_FAILED : 0;
|
||||
|
||||
msleep_interruptible(4 * 1000);
|
||||
|
@ -2481,7 +2481,7 @@ static int e100_phys_id(struct net_device *netdev, u32 data)
|
|||
{
|
||||
struct nic *nic = netdev_priv(netdev);
|
||||
|
||||
if(!data || data > (u32)(MAX_SCHEDULE_TIMEOUT / HZ))
|
||||
if (!data || data > (u32)(MAX_SCHEDULE_TIMEOUT / HZ))
|
||||
data = (u32)(MAX_SCHEDULE_TIMEOUT / HZ);
|
||||
mod_timer(&nic->blink_timer, jiffies);
|
||||
msleep_interruptible(data * 1000);
|
||||
|
@ -2524,7 +2524,7 @@ static void e100_get_ethtool_stats(struct net_device *netdev,
|
|||
struct nic *nic = netdev_priv(netdev);
|
||||
int i;
|
||||
|
||||
for(i = 0; i < E100_NET_STATS_LEN; i++)
|
||||
for (i = 0; i < E100_NET_STATS_LEN; i++)
|
||||
data[i] = ((unsigned long *)&netdev->stats)[i];
|
||||
|
||||
data[i++] = nic->tx_deferred;
|
||||
|
@ -2539,7 +2539,7 @@ static void e100_get_ethtool_stats(struct net_device *netdev,
|
|||
|
||||
static void e100_get_strings(struct net_device *netdev, u32 stringset, u8 *data)
|
||||
{
|
||||
switch(stringset) {
|
||||
switch (stringset) {
|
||||
case ETH_SS_TEST:
|
||||
memcpy(data, *e100_gstrings_test, sizeof(e100_gstrings_test));
|
||||
break;
|
||||
|
@ -2589,7 +2589,7 @@ static int e100_alloc(struct nic *nic)
|
|||
|
||||
static void e100_free(struct nic *nic)
|
||||
{
|
||||
if(nic->mem) {
|
||||
if (nic->mem) {
|
||||
pci_free_consistent(nic->pdev, sizeof(struct mem),
|
||||
nic->mem, nic->dma_addr);
|
||||
nic->mem = NULL;
|
||||
|
@ -2602,7 +2602,7 @@ static int e100_open(struct net_device *netdev)
|
|||
int err = 0;
|
||||
|
||||
netif_carrier_off(netdev);
|
||||
if((err = e100_up(nic)))
|
||||
if ((err = e100_up(nic)))
|
||||
DPRINTK(IFUP, ERR, "Cannot open interface, aborting.\n");
|
||||
return err;
|
||||
}
|
||||
|
@ -2635,8 +2635,8 @@ static int __devinit e100_probe(struct pci_dev *pdev,
|
|||
struct nic *nic;
|
||||
int err;
|
||||
|
||||
if(!(netdev = alloc_etherdev(sizeof(struct nic)))) {
|
||||
if(((1 << debug) - 1) & NETIF_MSG_PROBE)
|
||||
if (!(netdev = alloc_etherdev(sizeof(struct nic)))) {
|
||||
if (((1 << debug) - 1) & NETIF_MSG_PROBE)
|
||||
printk(KERN_ERR PFX "Etherdev alloc failed, abort.\n");
|
||||
return -ENOMEM;
|
||||
}
|
||||
|
@ -2653,24 +2653,24 @@ static int __devinit e100_probe(struct pci_dev *pdev,
|
|||
nic->msg_enable = (1 << debug) - 1;
|
||||
pci_set_drvdata(pdev, netdev);
|
||||
|
||||
if((err = pci_enable_device(pdev))) {
|
||||
if ((err = pci_enable_device(pdev))) {
|
||||
DPRINTK(PROBE, ERR, "Cannot enable PCI device, aborting.\n");
|
||||
goto err_out_free_dev;
|
||||
}
|
||||
|
||||
if(!(pci_resource_flags(pdev, 0) & IORESOURCE_MEM)) {
|
||||
if (!(pci_resource_flags(pdev, 0) & IORESOURCE_MEM)) {
|
||||
DPRINTK(PROBE, ERR, "Cannot find proper PCI device "
|
||||
"base address, aborting.\n");
|
||||
err = -ENODEV;
|
||||
goto err_out_disable_pdev;
|
||||
}
|
||||
|
||||
if((err = pci_request_regions(pdev, DRV_NAME))) {
|
||||
if ((err = pci_request_regions(pdev, DRV_NAME))) {
|
||||
DPRINTK(PROBE, ERR, "Cannot obtain PCI resources, aborting.\n");
|
||||
goto err_out_disable_pdev;
|
||||
}
|
||||
|
||||
if((err = pci_set_dma_mask(pdev, DMA_32BIT_MASK))) {
|
||||
if ((err = pci_set_dma_mask(pdev, DMA_32BIT_MASK))) {
|
||||
DPRINTK(PROBE, ERR, "No usable DMA configuration, aborting.\n");
|
||||
goto err_out_free_res;
|
||||
}
|
||||
|
@ -2681,13 +2681,13 @@ static int __devinit e100_probe(struct pci_dev *pdev,
|
|||
DPRINTK(PROBE, INFO, "using i/o access mode\n");
|
||||
|
||||
nic->csr = pci_iomap(pdev, (use_io ? 1 : 0), sizeof(struct csr));
|
||||
if(!nic->csr) {
|
||||
if (!nic->csr) {
|
||||
DPRINTK(PROBE, ERR, "Cannot map device registers, aborting.\n");
|
||||
err = -ENOMEM;
|
||||
goto err_out_free_res;
|
||||
}
|
||||
|
||||
if(ent->driver_data)
|
||||
if (ent->driver_data)
|
||||
nic->flags |= ich;
|
||||
else
|
||||
nic->flags &= ~ich;
|
||||
|
@ -2715,12 +2715,12 @@ static int __devinit e100_probe(struct pci_dev *pdev,
|
|||
|
||||
INIT_WORK(&nic->tx_timeout_task, e100_tx_timeout_task);
|
||||
|
||||
if((err = e100_alloc(nic))) {
|
||||
if ((err = e100_alloc(nic))) {
|
||||
DPRINTK(PROBE, ERR, "Cannot alloc driver memory, aborting.\n");
|
||||
goto err_out_iounmap;
|
||||
}
|
||||
|
||||
if((err = e100_eeprom_load(nic)))
|
||||
if ((err = e100_eeprom_load(nic)))
|
||||
goto err_out_free;
|
||||
|
||||
e100_phy_init(nic);
|
||||
|
@ -2740,7 +2740,7 @@ static int __devinit e100_probe(struct pci_dev *pdev,
|
|||
}
|
||||
|
||||
/* Wol magic packet can be enabled from eeprom */
|
||||
if((nic->mac >= mac_82558_D101_A4) &&
|
||||
if ((nic->mac >= mac_82558_D101_A4) &&
|
||||
(nic->eeprom[eeprom_id] & eeprom_id_wol)) {
|
||||
nic->flags |= wol_magic;
|
||||
device_set_wakeup_enable(&pdev->dev, true);
|
||||
|
@ -2750,7 +2750,7 @@ static int __devinit e100_probe(struct pci_dev *pdev,
|
|||
pci_pme_active(pdev, false);
|
||||
|
||||
strcpy(netdev->name, "eth%d");
|
||||
if((err = register_netdev(netdev))) {
|
||||
if ((err = register_netdev(netdev))) {
|
||||
DPRINTK(PROBE, ERR, "Cannot register net device, aborting.\n");
|
||||
goto err_out_free;
|
||||
}
|
||||
|
@ -2779,7 +2779,7 @@ static void __devexit e100_remove(struct pci_dev *pdev)
|
|||
{
|
||||
struct net_device *netdev = pci_get_drvdata(pdev);
|
||||
|
||||
if(netdev) {
|
||||
if (netdev) {
|
||||
struct nic *nic = netdev_priv(netdev);
|
||||
unregister_netdev(netdev);
|
||||
e100_free(nic);
|
||||
|
@ -2932,7 +2932,7 @@ static struct pci_driver e100_driver = {
|
|||
|
||||
static int __init e100_init_module(void)
|
||||
{
|
||||
if(((1 << debug) - 1) & NETIF_MSG_DRV) {
|
||||
if (((1 << debug) - 1) & NETIF_MSG_DRV) {
|
||||
printk(KERN_INFO PFX "%s, %s\n", DRV_DESCRIPTION, DRV_VERSION);
|
||||
printk(KERN_INFO PFX "%s\n", DRV_COPYRIGHT);
|
||||
}
|
||||
|
|
|
@ -478,7 +478,7 @@ struct ehea_port {
|
|||
int num_add_tx_qps;
|
||||
int num_mcs;
|
||||
int resets;
|
||||
u64 flags;
|
||||
unsigned long flags;
|
||||
u64 mac_addr;
|
||||
u32 logical_port_id;
|
||||
u32 port_speed;
|
||||
|
@ -510,7 +510,6 @@ void ehea_set_ethtool_ops(struct net_device *netdev);
|
|||
int ehea_sense_port_attr(struct ehea_port *port);
|
||||
int ehea_set_portspeed(struct ehea_port *port, u32 port_speed);
|
||||
|
||||
extern u64 ehea_driver_flags;
|
||||
extern struct work_struct ehea_rereg_mr_task;
|
||||
|
||||
#endif /* __EHEA_H__ */
|
||||
|
|
|
@ -99,7 +99,7 @@ MODULE_PARM_DESC(use_lro, " Large Receive Offload, 1: enable, 0: disable, "
|
|||
|
||||
static int port_name_cnt;
|
||||
static LIST_HEAD(adapter_list);
|
||||
u64 ehea_driver_flags;
|
||||
static unsigned long ehea_driver_flags;
|
||||
struct work_struct ehea_rereg_mr_task;
|
||||
static DEFINE_MUTEX(dlpar_mem_lock);
|
||||
struct ehea_fw_handle_array ehea_fw_handles;
|
||||
|
|
|
@ -944,7 +944,7 @@ static void enc28j60_hw_rx(struct net_device *ndev)
|
|||
if (netif_msg_rx_status(priv))
|
||||
enc28j60_dump_rsv(priv, __func__, next_packet, len, rxstat);
|
||||
|
||||
if (!RSV_GETBIT(rxstat, RSV_RXOK)) {
|
||||
if (!RSV_GETBIT(rxstat, RSV_RXOK) || len > MAX_FRAMELEN) {
|
||||
if (netif_msg_rx_err(priv))
|
||||
dev_err(&ndev->dev, "Rx Error (%04x)\n", rxstat);
|
||||
ndev->stats.rx_errors++;
|
||||
|
@ -952,6 +952,8 @@ static void enc28j60_hw_rx(struct net_device *ndev)
|
|||
ndev->stats.rx_crc_errors++;
|
||||
if (RSV_GETBIT(rxstat, RSV_LENCHECKERR))
|
||||
ndev->stats.rx_frame_errors++;
|
||||
if (len > MAX_FRAMELEN)
|
||||
ndev->stats.rx_over_errors++;
|
||||
} else {
|
||||
skb = dev_alloc_skb(len + NET_IP_ALIGN);
|
||||
if (!skb) {
|
||||
|
|
|
@ -75,7 +75,7 @@
|
|||
#include "myri10ge_mcp.h"
|
||||
#include "myri10ge_mcp_gen_header.h"
|
||||
|
||||
#define MYRI10GE_VERSION_STR "1.4.4-1.395"
|
||||
#define MYRI10GE_VERSION_STR "1.4.4-1.398"
|
||||
|
||||
MODULE_DESCRIPTION("Myricom 10G driver (10GbE)");
|
||||
MODULE_AUTHOR("Maintainer: help@myri.com");
|
||||
|
@ -3929,6 +3929,10 @@ abort_with_firmware:
|
|||
myri10ge_dummy_rdma(mgp, 0);
|
||||
|
||||
abort_with_ioremap:
|
||||
if (mgp->mac_addr_string != NULL)
|
||||
dev_err(&pdev->dev,
|
||||
"myri10ge_probe() failed: MAC=%s, SN=%ld\n",
|
||||
mgp->mac_addr_string, mgp->serial_number);
|
||||
iounmap(mgp->sram);
|
||||
|
||||
abort_with_mtrr:
|
||||
|
|
|
@ -818,15 +818,6 @@ struct tx_doorbell_context {
|
|||
};
|
||||
|
||||
/* DATA STRUCTURES SHARED WITH HARDWARE. */
|
||||
|
||||
struct bq_element {
|
||||
u32 addr_lo;
|
||||
#define BQ_END 0x00000001
|
||||
#define BQ_CONT 0x00000002
|
||||
#define BQ_MASK 0x00000003
|
||||
u32 addr_hi;
|
||||
} __attribute((packed));
|
||||
|
||||
struct tx_buf_desc {
|
||||
__le64 addr;
|
||||
__le32 len;
|
||||
|
@ -860,8 +851,8 @@ struct ob_mac_iocb_req {
|
|||
__le16 frame_len;
|
||||
#define OB_MAC_IOCB_LEN_MASK 0x3ffff
|
||||
__le16 reserved2;
|
||||
__le32 tid;
|
||||
__le32 txq_idx;
|
||||
u32 tid;
|
||||
u32 txq_idx;
|
||||
__le32 reserved3;
|
||||
__le16 vlan_tci;
|
||||
__le16 reserved4;
|
||||
|
@ -880,8 +871,8 @@ struct ob_mac_iocb_rsp {
|
|||
u8 flags2; /* */
|
||||
u8 flags3; /* */
|
||||
#define OB_MAC_IOCB_RSP_B 0x80 /* */
|
||||
__le32 tid;
|
||||
__le32 txq_idx;
|
||||
u32 tid;
|
||||
u32 txq_idx;
|
||||
__le32 reserved[13];
|
||||
} __attribute((packed));
|
||||
|
||||
|
@ -903,8 +894,8 @@ struct ob_mac_tso_iocb_req {
|
|||
#define OB_MAC_TSO_IOCB_V 0x04
|
||||
__le32 reserved1[2];
|
||||
__le32 frame_len;
|
||||
__le32 tid;
|
||||
__le32 txq_idx;
|
||||
u32 tid;
|
||||
u32 txq_idx;
|
||||
__le16 total_hdrs_len;
|
||||
__le16 net_trans_offset;
|
||||
#define OB_MAC_TRANSPORT_HDR_SHIFT 6
|
||||
|
@ -925,8 +916,8 @@ struct ob_mac_tso_iocb_rsp {
|
|||
u8 flags2; /* */
|
||||
u8 flags3; /* */
|
||||
#define OB_MAC_TSO_IOCB_RSP_B 0x8000
|
||||
__le32 tid;
|
||||
__le32 txq_idx;
|
||||
u32 tid;
|
||||
u32 txq_idx;
|
||||
__le32 reserved2[13];
|
||||
} __attribute((packed));
|
||||
|
||||
|
@ -979,10 +970,11 @@ struct ib_mac_iocb_rsp {
|
|||
|
||||
__le16 reserved1;
|
||||
__le32 reserved2[6];
|
||||
__le32 flags4;
|
||||
#define IB_MAC_IOCB_RSP_HV 0x20000000 /* */
|
||||
#define IB_MAC_IOCB_RSP_HS 0x40000000 /* */
|
||||
#define IB_MAC_IOCB_RSP_HL 0x80000000 /* */
|
||||
u8 reserved3[3];
|
||||
u8 flags4;
|
||||
#define IB_MAC_IOCB_RSP_HV 0x20
|
||||
#define IB_MAC_IOCB_RSP_HS 0x40
|
||||
#define IB_MAC_IOCB_RSP_HL 0x80
|
||||
__le32 hdr_len; /* */
|
||||
__le32 hdr_addr_lo; /* */
|
||||
__le32 hdr_addr_hi; /* */
|
||||
|
@ -1126,7 +1118,7 @@ struct map_list {
|
|||
struct tx_ring_desc {
|
||||
struct sk_buff *skb;
|
||||
struct ob_mac_iocb_req *queue_entry;
|
||||
int index;
|
||||
u32 index;
|
||||
struct oal oal;
|
||||
struct map_list map[MAX_SKB_FRAGS + 1];
|
||||
int map_cnt;
|
||||
|
@ -1138,8 +1130,8 @@ struct bq_desc {
|
|||
struct page *lbq_page;
|
||||
struct sk_buff *skb;
|
||||
} p;
|
||||
struct bq_element *bq;
|
||||
int index;
|
||||
__le64 *addr;
|
||||
u32 index;
|
||||
DECLARE_PCI_UNMAP_ADDR(mapaddr);
|
||||
DECLARE_PCI_UNMAP_LEN(maplen);
|
||||
};
|
||||
|
@ -1189,7 +1181,7 @@ struct rx_ring {
|
|||
u32 cq_size;
|
||||
u32 cq_len;
|
||||
u16 cq_id;
|
||||
u32 *prod_idx_sh_reg; /* Shadowed producer register. */
|
||||
volatile __le32 *prod_idx_sh_reg; /* Shadowed producer register. */
|
||||
dma_addr_t prod_idx_sh_reg_dma;
|
||||
void __iomem *cnsmr_idx_db_reg; /* PCI doorbell mem area + 0 */
|
||||
u32 cnsmr_idx; /* current sw idx */
|
||||
|
@ -1467,21 +1459,6 @@ static inline void ql_write_db_reg(u32 val, void __iomem *addr)
|
|||
mmiowb();
|
||||
}
|
||||
|
||||
/*
|
||||
* Shadow Registers:
|
||||
* Outbound queues have a consumer index that is maintained by the chip.
|
||||
* Inbound queues have a producer index that is maintained by the chip.
|
||||
* For lower overhead, these registers are "shadowed" to host memory
|
||||
* which allows the device driver to track the queue progress without
|
||||
* PCI reads. When an entry is placed on an inbound queue, the chip will
|
||||
* update the relevant index register and then copy the value to the
|
||||
* shadow register in host memory.
|
||||
*/
|
||||
static inline unsigned int ql_read_sh_reg(const volatile void *addr)
|
||||
{
|
||||
return *(volatile unsigned int __force *)addr;
|
||||
}
|
||||
|
||||
extern char qlge_driver_name[];
|
||||
extern const char qlge_driver_version[];
|
||||
extern const struct ethtool_ops qlge_ethtool_ops;
|
||||
|
|
|
@ -821,14 +821,11 @@ void ql_dump_ib_mac_rsp(struct ib_mac_iocb_rsp *ib_mac_rsp)
|
|||
le16_to_cpu(ib_mac_rsp->vlan_id));
|
||||
|
||||
printk(KERN_ERR PFX "flags4 = %s%s%s.\n",
|
||||
le32_to_cpu(ib_mac_rsp->
|
||||
flags4) & IB_MAC_IOCB_RSP_HV ? "HV " : "",
|
||||
le32_to_cpu(ib_mac_rsp->
|
||||
flags4) & IB_MAC_IOCB_RSP_HS ? "HS " : "",
|
||||
le32_to_cpu(ib_mac_rsp->
|
||||
flags4) & IB_MAC_IOCB_RSP_HL ? "HL " : "");
|
||||
ib_mac_rsp->flags4 & IB_MAC_IOCB_RSP_HV ? "HV " : "",
|
||||
ib_mac_rsp->flags4 & IB_MAC_IOCB_RSP_HS ? "HS " : "",
|
||||
ib_mac_rsp->flags4 & IB_MAC_IOCB_RSP_HL ? "HL " : "");
|
||||
|
||||
if (le32_to_cpu(ib_mac_rsp->flags4) & IB_MAC_IOCB_RSP_HV) {
|
||||
if (ib_mac_rsp->flags4 & IB_MAC_IOCB_RSP_HV) {
|
||||
printk(KERN_ERR PFX "hdr length = %d.\n",
|
||||
le32_to_cpu(ib_mac_rsp->hdr_len));
|
||||
printk(KERN_ERR PFX "hdr addr_hi = 0x%x.\n",
|
||||
|
|
|
@ -56,9 +56,9 @@ static int ql_update_ring_coalescing(struct ql_adapter *qdev)
|
|||
for (i = 1; i < qdev->rss_ring_first_cq_id; i++, rx_ring++) {
|
||||
rx_ring = &qdev->rx_ring[i];
|
||||
cqicb = (struct cqicb *)rx_ring;
|
||||
cqicb->irq_delay = le16_to_cpu(qdev->tx_coalesce_usecs);
|
||||
cqicb->irq_delay = cpu_to_le16(qdev->tx_coalesce_usecs);
|
||||
cqicb->pkt_delay =
|
||||
le16_to_cpu(qdev->tx_max_coalesced_frames);
|
||||
cpu_to_le16(qdev->tx_max_coalesced_frames);
|
||||
cqicb->flags = FLAGS_LI;
|
||||
status = ql_write_cfg(qdev, cqicb, sizeof(cqicb),
|
||||
CFG_LCQ, rx_ring->cq_id);
|
||||
|
@ -79,9 +79,9 @@ static int ql_update_ring_coalescing(struct ql_adapter *qdev)
|
|||
i++) {
|
||||
rx_ring = &qdev->rx_ring[i];
|
||||
cqicb = (struct cqicb *)rx_ring;
|
||||
cqicb->irq_delay = le16_to_cpu(qdev->rx_coalesce_usecs);
|
||||
cqicb->irq_delay = cpu_to_le16(qdev->rx_coalesce_usecs);
|
||||
cqicb->pkt_delay =
|
||||
le16_to_cpu(qdev->rx_max_coalesced_frames);
|
||||
cpu_to_le16(qdev->rx_max_coalesced_frames);
|
||||
cqicb->flags = FLAGS_LI;
|
||||
status = ql_write_cfg(qdev, cqicb, sizeof(cqicb),
|
||||
CFG_LCQ, rx_ring->cq_id);
|
||||
|
|
|
@ -257,7 +257,7 @@ int ql_get_mac_addr_reg(struct ql_adapter *qdev, u32 type, u16 index,
|
|||
{
|
||||
status =
|
||||
ql_wait_reg_rdy(qdev,
|
||||
MAC_ADDR_IDX, MAC_ADDR_MW, MAC_ADDR_E);
|
||||
MAC_ADDR_IDX, MAC_ADDR_MW, 0);
|
||||
if (status)
|
||||
goto exit;
|
||||
ql_write32(qdev, MAC_ADDR_IDX, (offset++) | /* offset */
|
||||
|
@ -265,13 +265,13 @@ int ql_get_mac_addr_reg(struct ql_adapter *qdev, u32 type, u16 index,
|
|||
MAC_ADDR_ADR | MAC_ADDR_RS | type); /* type */
|
||||
status =
|
||||
ql_wait_reg_rdy(qdev,
|
||||
MAC_ADDR_IDX, MAC_ADDR_MR, MAC_ADDR_E);
|
||||
MAC_ADDR_IDX, MAC_ADDR_MR, 0);
|
||||
if (status)
|
||||
goto exit;
|
||||
*value++ = ql_read32(qdev, MAC_ADDR_DATA);
|
||||
status =
|
||||
ql_wait_reg_rdy(qdev,
|
||||
MAC_ADDR_IDX, MAC_ADDR_MW, MAC_ADDR_E);
|
||||
MAC_ADDR_IDX, MAC_ADDR_MW, 0);
|
||||
if (status)
|
||||
goto exit;
|
||||
ql_write32(qdev, MAC_ADDR_IDX, (offset++) | /* offset */
|
||||
|
@ -279,14 +279,14 @@ int ql_get_mac_addr_reg(struct ql_adapter *qdev, u32 type, u16 index,
|
|||
MAC_ADDR_ADR | MAC_ADDR_RS | type); /* type */
|
||||
status =
|
||||
ql_wait_reg_rdy(qdev,
|
||||
MAC_ADDR_IDX, MAC_ADDR_MR, MAC_ADDR_E);
|
||||
MAC_ADDR_IDX, MAC_ADDR_MR, 0);
|
||||
if (status)
|
||||
goto exit;
|
||||
*value++ = ql_read32(qdev, MAC_ADDR_DATA);
|
||||
if (type == MAC_ADDR_TYPE_CAM_MAC) {
|
||||
status =
|
||||
ql_wait_reg_rdy(qdev,
|
||||
MAC_ADDR_IDX, MAC_ADDR_MW, MAC_ADDR_E);
|
||||
MAC_ADDR_IDX, MAC_ADDR_MW, 0);
|
||||
if (status)
|
||||
goto exit;
|
||||
ql_write32(qdev, MAC_ADDR_IDX, (offset++) | /* offset */
|
||||
|
@ -294,7 +294,7 @@ int ql_get_mac_addr_reg(struct ql_adapter *qdev, u32 type, u16 index,
|
|||
MAC_ADDR_ADR | MAC_ADDR_RS | type); /* type */
|
||||
status =
|
||||
ql_wait_reg_rdy(qdev, MAC_ADDR_IDX,
|
||||
MAC_ADDR_MR, MAC_ADDR_E);
|
||||
MAC_ADDR_MR, 0);
|
||||
if (status)
|
||||
goto exit;
|
||||
*value++ = ql_read32(qdev, MAC_ADDR_DATA);
|
||||
|
@ -344,7 +344,7 @@ static int ql_set_mac_addr_reg(struct ql_adapter *qdev, u8 *addr, u32 type,
|
|||
|
||||
status =
|
||||
ql_wait_reg_rdy(qdev,
|
||||
MAC_ADDR_IDX, MAC_ADDR_MW, MAC_ADDR_E);
|
||||
MAC_ADDR_IDX, MAC_ADDR_MW, 0);
|
||||
if (status)
|
||||
goto exit;
|
||||
ql_write32(qdev, MAC_ADDR_IDX, (offset++) | /* offset */
|
||||
|
@ -353,7 +353,7 @@ static int ql_set_mac_addr_reg(struct ql_adapter *qdev, u8 *addr, u32 type,
|
|||
ql_write32(qdev, MAC_ADDR_DATA, lower);
|
||||
status =
|
||||
ql_wait_reg_rdy(qdev,
|
||||
MAC_ADDR_IDX, MAC_ADDR_MW, MAC_ADDR_E);
|
||||
MAC_ADDR_IDX, MAC_ADDR_MW, 0);
|
||||
if (status)
|
||||
goto exit;
|
||||
ql_write32(qdev, MAC_ADDR_IDX, (offset++) | /* offset */
|
||||
|
@ -362,7 +362,7 @@ static int ql_set_mac_addr_reg(struct ql_adapter *qdev, u8 *addr, u32 type,
|
|||
ql_write32(qdev, MAC_ADDR_DATA, upper);
|
||||
status =
|
||||
ql_wait_reg_rdy(qdev,
|
||||
MAC_ADDR_IDX, MAC_ADDR_MW, MAC_ADDR_E);
|
||||
MAC_ADDR_IDX, MAC_ADDR_MW, 0);
|
||||
if (status)
|
||||
goto exit;
|
||||
ql_write32(qdev, MAC_ADDR_IDX, (offset) | /* offset */
|
||||
|
@ -400,7 +400,7 @@ static int ql_set_mac_addr_reg(struct ql_adapter *qdev, u8 *addr, u32 type,
|
|||
|
||||
status =
|
||||
ql_wait_reg_rdy(qdev,
|
||||
MAC_ADDR_IDX, MAC_ADDR_MW, MAC_ADDR_E);
|
||||
MAC_ADDR_IDX, MAC_ADDR_MW, 0);
|
||||
if (status)
|
||||
goto exit;
|
||||
ql_write32(qdev, MAC_ADDR_IDX, offset | /* offset */
|
||||
|
@ -431,13 +431,13 @@ int ql_get_routing_reg(struct ql_adapter *qdev, u32 index, u32 *value)
|
|||
if (status)
|
||||
goto exit;
|
||||
|
||||
status = ql_wait_reg_rdy(qdev, RT_IDX, RT_IDX_MW, RT_IDX_E);
|
||||
status = ql_wait_reg_rdy(qdev, RT_IDX, RT_IDX_MW, 0);
|
||||
if (status)
|
||||
goto exit;
|
||||
|
||||
ql_write32(qdev, RT_IDX,
|
||||
RT_IDX_TYPE_NICQ | RT_IDX_RS | (index << RT_IDX_IDX_SHIFT));
|
||||
status = ql_wait_reg_rdy(qdev, RT_IDX, RT_IDX_MR, RT_IDX_E);
|
||||
status = ql_wait_reg_rdy(qdev, RT_IDX, RT_IDX_MR, 0);
|
||||
if (status)
|
||||
goto exit;
|
||||
*value = ql_read32(qdev, RT_DATA);
|
||||
|
@ -874,7 +874,6 @@ static void ql_update_lbq(struct ql_adapter *qdev, struct rx_ring *rx_ring)
|
|||
{
|
||||
int clean_idx = rx_ring->lbq_clean_idx;
|
||||
struct bq_desc *lbq_desc;
|
||||
struct bq_element *bq;
|
||||
u64 map;
|
||||
int i;
|
||||
|
||||
|
@ -884,7 +883,6 @@ static void ql_update_lbq(struct ql_adapter *qdev, struct rx_ring *rx_ring)
|
|||
"lbq: try cleaning clean_idx = %d.\n",
|
||||
clean_idx);
|
||||
lbq_desc = &rx_ring->lbq[clean_idx];
|
||||
bq = lbq_desc->bq;
|
||||
if (lbq_desc->p.lbq_page == NULL) {
|
||||
QPRINTK(qdev, RX_STATUS, DEBUG,
|
||||
"lbq: getting new page for index %d.\n",
|
||||
|
@ -906,10 +904,7 @@ static void ql_update_lbq(struct ql_adapter *qdev, struct rx_ring *rx_ring)
|
|||
}
|
||||
pci_unmap_addr_set(lbq_desc, mapaddr, map);
|
||||
pci_unmap_len_set(lbq_desc, maplen, PAGE_SIZE);
|
||||
bq->addr_lo = /*lbq_desc->addr_lo = */
|
||||
cpu_to_le32(map);
|
||||
bq->addr_hi = /*lbq_desc->addr_hi = */
|
||||
cpu_to_le32(map >> 32);
|
||||
*lbq_desc->addr = cpu_to_le64(map);
|
||||
}
|
||||
clean_idx++;
|
||||
if (clean_idx == rx_ring->lbq_len)
|
||||
|
@ -934,7 +929,6 @@ static void ql_update_sbq(struct ql_adapter *qdev, struct rx_ring *rx_ring)
|
|||
{
|
||||
int clean_idx = rx_ring->sbq_clean_idx;
|
||||
struct bq_desc *sbq_desc;
|
||||
struct bq_element *bq;
|
||||
u64 map;
|
||||
int i;
|
||||
|
||||
|
@ -944,7 +938,6 @@ static void ql_update_sbq(struct ql_adapter *qdev, struct rx_ring *rx_ring)
|
|||
QPRINTK(qdev, RX_STATUS, DEBUG,
|
||||
"sbq: try cleaning clean_idx = %d.\n",
|
||||
clean_idx);
|
||||
bq = sbq_desc->bq;
|
||||
if (sbq_desc->p.skb == NULL) {
|
||||
QPRINTK(qdev, RX_STATUS, DEBUG,
|
||||
"sbq: getting new skb for index %d.\n",
|
||||
|
@ -963,11 +956,15 @@ static void ql_update_sbq(struct ql_adapter *qdev, struct rx_ring *rx_ring)
|
|||
sbq_desc->p.skb->data,
|
||||
rx_ring->sbq_buf_size /
|
||||
2, PCI_DMA_FROMDEVICE);
|
||||
if (pci_dma_mapping_error(qdev->pdev, map)) {
|
||||
QPRINTK(qdev, IFUP, ERR, "PCI mapping failed.\n");
|
||||
rx_ring->sbq_clean_idx = clean_idx;
|
||||
return;
|
||||
}
|
||||
pci_unmap_addr_set(sbq_desc, mapaddr, map);
|
||||
pci_unmap_len_set(sbq_desc, maplen,
|
||||
rx_ring->sbq_buf_size / 2);
|
||||
bq->addr_lo = cpu_to_le32(map);
|
||||
bq->addr_hi = cpu_to_le32(map >> 32);
|
||||
*sbq_desc->addr = cpu_to_le64(map);
|
||||
}
|
||||
|
||||
clean_idx++;
|
||||
|
@ -1303,6 +1300,11 @@ static struct sk_buff *ql_build_rx_skb(struct ql_adapter *qdev,
|
|||
"No skb available, drop the packet.\n");
|
||||
return NULL;
|
||||
}
|
||||
pci_unmap_page(qdev->pdev,
|
||||
pci_unmap_addr(lbq_desc,
|
||||
mapaddr),
|
||||
pci_unmap_len(lbq_desc, maplen),
|
||||
PCI_DMA_FROMDEVICE);
|
||||
skb_reserve(skb, NET_IP_ALIGN);
|
||||
QPRINTK(qdev, RX_STATUS, DEBUG,
|
||||
"%d bytes of headers and data in large. Chain page to new skb and pull tail.\n", length);
|
||||
|
@ -1330,7 +1332,7 @@ static struct sk_buff *ql_build_rx_skb(struct ql_adapter *qdev,
|
|||
* eventually be in trouble.
|
||||
*/
|
||||
int size, offset, i = 0;
|
||||
struct bq_element *bq, bq_array[8];
|
||||
__le64 *bq, bq_array[8];
|
||||
sbq_desc = ql_get_curr_sbuf(rx_ring);
|
||||
pci_unmap_single(qdev->pdev,
|
||||
pci_unmap_addr(sbq_desc, mapaddr),
|
||||
|
@ -1356,16 +1358,10 @@ static struct sk_buff *ql_build_rx_skb(struct ql_adapter *qdev,
|
|||
} else {
|
||||
QPRINTK(qdev, RX_STATUS, DEBUG,
|
||||
"Headers in small, %d bytes of data in chain of large.\n", length);
|
||||
bq = (struct bq_element *)sbq_desc->p.skb->data;
|
||||
bq = (__le64 *)sbq_desc->p.skb->data;
|
||||
}
|
||||
while (length > 0) {
|
||||
lbq_desc = ql_get_curr_lbuf(rx_ring);
|
||||
if ((bq->addr_lo & ~BQ_MASK) != lbq_desc->bq->addr_lo) {
|
||||
QPRINTK(qdev, RX_STATUS, ERR,
|
||||
"Panic!!! bad large buffer address, expected 0x%.08x, got 0x%.08x.\n",
|
||||
lbq_desc->bq->addr_lo, bq->addr_lo);
|
||||
return NULL;
|
||||
}
|
||||
pci_unmap_page(qdev->pdev,
|
||||
pci_unmap_addr(lbq_desc,
|
||||
mapaddr),
|
||||
|
@ -1549,7 +1545,7 @@ static void ql_process_chip_ae_intr(struct ql_adapter *qdev,
|
|||
static int ql_clean_outbound_rx_ring(struct rx_ring *rx_ring)
|
||||
{
|
||||
struct ql_adapter *qdev = rx_ring->qdev;
|
||||
u32 prod = ql_read_sh_reg(rx_ring->prod_idx_sh_reg);
|
||||
u32 prod = le32_to_cpu(*rx_ring->prod_idx_sh_reg);
|
||||
struct ob_mac_iocb_rsp *net_rsp = NULL;
|
||||
int count = 0;
|
||||
|
||||
|
@ -1575,7 +1571,7 @@ static int ql_clean_outbound_rx_ring(struct rx_ring *rx_ring)
|
|||
}
|
||||
count++;
|
||||
ql_update_cq(rx_ring);
|
||||
prod = ql_read_sh_reg(rx_ring->prod_idx_sh_reg);
|
||||
prod = le32_to_cpu(*rx_ring->prod_idx_sh_reg);
|
||||
}
|
||||
ql_write_cq_idx(rx_ring);
|
||||
if (netif_queue_stopped(qdev->ndev) && net_rsp != NULL) {
|
||||
|
@ -1595,7 +1591,7 @@ static int ql_clean_outbound_rx_ring(struct rx_ring *rx_ring)
|
|||
static int ql_clean_inbound_rx_ring(struct rx_ring *rx_ring, int budget)
|
||||
{
|
||||
struct ql_adapter *qdev = rx_ring->qdev;
|
||||
u32 prod = ql_read_sh_reg(rx_ring->prod_idx_sh_reg);
|
||||
u32 prod = le32_to_cpu(*rx_ring->prod_idx_sh_reg);
|
||||
struct ql_net_rsp_iocb *net_rsp;
|
||||
int count = 0;
|
||||
|
||||
|
@ -1628,7 +1624,7 @@ static int ql_clean_inbound_rx_ring(struct rx_ring *rx_ring, int budget)
|
|||
}
|
||||
count++;
|
||||
ql_update_cq(rx_ring);
|
||||
prod = ql_read_sh_reg(rx_ring->prod_idx_sh_reg);
|
||||
prod = le32_to_cpu(*rx_ring->prod_idx_sh_reg);
|
||||
if (count == budget)
|
||||
break;
|
||||
}
|
||||
|
@ -1791,7 +1787,7 @@ static irqreturn_t qlge_isr(int irq, void *dev_id)
|
|||
* Check the default queue and wake handler if active.
|
||||
*/
|
||||
rx_ring = &qdev->rx_ring[0];
|
||||
if (ql_read_sh_reg(rx_ring->prod_idx_sh_reg) != rx_ring->cnsmr_idx) {
|
||||
if (le32_to_cpu(*rx_ring->prod_idx_sh_reg) != rx_ring->cnsmr_idx) {
|
||||
QPRINTK(qdev, INTR, INFO, "Waking handler for rx_ring[0].\n");
|
||||
ql_disable_completion_interrupt(qdev, intr_context->intr);
|
||||
queue_delayed_work_on(smp_processor_id(), qdev->q_workqueue,
|
||||
|
@ -1805,7 +1801,7 @@ static irqreturn_t qlge_isr(int irq, void *dev_id)
|
|||
*/
|
||||
for (i = 1; i < qdev->rx_ring_count; i++) {
|
||||
rx_ring = &qdev->rx_ring[i];
|
||||
if (ql_read_sh_reg(rx_ring->prod_idx_sh_reg) !=
|
||||
if (le32_to_cpu(*rx_ring->prod_idx_sh_reg) !=
|
||||
rx_ring->cnsmr_idx) {
|
||||
QPRINTK(qdev, INTR, INFO,
|
||||
"Waking handler for rx_ring[%d].\n", i);
|
||||
|
@ -1874,7 +1870,7 @@ static void ql_hw_csum_setup(struct sk_buff *skb,
|
|||
{
|
||||
int len;
|
||||
struct iphdr *iph = ip_hdr(skb);
|
||||
u16 *check;
|
||||
__sum16 *check;
|
||||
mac_iocb_ptr->opcode = OPCODE_OB_MAC_TSO_IOCB;
|
||||
mac_iocb_ptr->frame_len = cpu_to_le32((u32) skb->len);
|
||||
mac_iocb_ptr->net_trans_offset =
|
||||
|
@ -2083,8 +2079,6 @@ static void ql_free_lbq_buffers(struct ql_adapter *qdev, struct rx_ring *rx_ring
|
|||
put_page(lbq_desc->p.lbq_page);
|
||||
lbq_desc->p.lbq_page = NULL;
|
||||
}
|
||||
lbq_desc->bq->addr_lo = 0;
|
||||
lbq_desc->bq->addr_hi = 0;
|
||||
}
|
||||
}
|
||||
|
||||
|
@ -2097,12 +2091,12 @@ static int ql_alloc_lbq_buffers(struct ql_adapter *qdev,
|
|||
int i;
|
||||
struct bq_desc *lbq_desc;
|
||||
u64 map;
|
||||
struct bq_element *bq = rx_ring->lbq_base;
|
||||
__le64 *bq = rx_ring->lbq_base;
|
||||
|
||||
for (i = 0; i < rx_ring->lbq_len; i++) {
|
||||
lbq_desc = &rx_ring->lbq[i];
|
||||
memset(lbq_desc, 0, sizeof(lbq_desc));
|
||||
lbq_desc->bq = bq;
|
||||
lbq_desc->addr = bq;
|
||||
lbq_desc->index = i;
|
||||
lbq_desc->p.lbq_page = alloc_page(GFP_ATOMIC);
|
||||
if (unlikely(!lbq_desc->p.lbq_page)) {
|
||||
|
@ -2119,8 +2113,7 @@ static int ql_alloc_lbq_buffers(struct ql_adapter *qdev,
|
|||
}
|
||||
pci_unmap_addr_set(lbq_desc, mapaddr, map);
|
||||
pci_unmap_len_set(lbq_desc, maplen, PAGE_SIZE);
|
||||
bq->addr_lo = cpu_to_le32(map);
|
||||
bq->addr_hi = cpu_to_le32(map >> 32);
|
||||
*lbq_desc->addr = cpu_to_le64(map);
|
||||
}
|
||||
bq++;
|
||||
}
|
||||
|
@ -2149,13 +2142,6 @@ static void ql_free_sbq_buffers(struct ql_adapter *qdev, struct rx_ring *rx_ring
|
|||
dev_kfree_skb(sbq_desc->p.skb);
|
||||
sbq_desc->p.skb = NULL;
|
||||
}
|
||||
if (sbq_desc->bq == NULL) {
|
||||
QPRINTK(qdev, IFUP, ERR, "sbq_desc->bq %d is NULL.\n",
|
||||
i);
|
||||
return;
|
||||
}
|
||||
sbq_desc->bq->addr_lo = 0;
|
||||
sbq_desc->bq->addr_hi = 0;
|
||||
}
|
||||
}
|
||||
|
||||
|
@ -2167,13 +2153,13 @@ static int ql_alloc_sbq_buffers(struct ql_adapter *qdev,
|
|||
struct bq_desc *sbq_desc;
|
||||
struct sk_buff *skb;
|
||||
u64 map;
|
||||
struct bq_element *bq = rx_ring->sbq_base;
|
||||
__le64 *bq = rx_ring->sbq_base;
|
||||
|
||||
for (i = 0; i < rx_ring->sbq_len; i++) {
|
||||
sbq_desc = &rx_ring->sbq[i];
|
||||
memset(sbq_desc, 0, sizeof(sbq_desc));
|
||||
sbq_desc->index = i;
|
||||
sbq_desc->bq = bq;
|
||||
sbq_desc->addr = bq;
|
||||
skb = netdev_alloc_skb(qdev->ndev, rx_ring->sbq_buf_size);
|
||||
if (unlikely(!skb)) {
|
||||
/* Better luck next round */
|
||||
|
@ -2199,10 +2185,7 @@ static int ql_alloc_sbq_buffers(struct ql_adapter *qdev,
|
|||
}
|
||||
pci_unmap_addr_set(sbq_desc, mapaddr, map);
|
||||
pci_unmap_len_set(sbq_desc, maplen, rx_ring->sbq_buf_size / 2);
|
||||
bq->addr_lo = /*sbq_desc->addr_lo = */
|
||||
cpu_to_le32(map);
|
||||
bq->addr_hi = /*sbq_desc->addr_hi = */
|
||||
cpu_to_le32(map >> 32);
|
||||
*sbq_desc->addr = cpu_to_le64(map);
|
||||
bq++;
|
||||
}
|
||||
return 0;
|
||||
|
@ -2481,7 +2464,8 @@ static int ql_start_rx_ring(struct ql_adapter *qdev, struct rx_ring *rx_ring)
|
|||
memset((void *)cqicb, 0, sizeof(struct cqicb));
|
||||
cqicb->msix_vect = rx_ring->irq;
|
||||
|
||||
cqicb->len = cpu_to_le16(rx_ring->cq_len | LEN_V | LEN_CPP_CONT);
|
||||
bq_len = (rx_ring->cq_len == 65536) ? 0 : (u16) rx_ring->cq_len;
|
||||
cqicb->len = cpu_to_le16(bq_len | LEN_V | LEN_CPP_CONT);
|
||||
|
||||
cqicb->addr_lo = cpu_to_le32(rx_ring->cq_base_dma);
|
||||
cqicb->addr_hi = cpu_to_le32((u64) rx_ring->cq_base_dma >> 32);
|
||||
|
@ -2503,8 +2487,11 @@ static int ql_start_rx_ring(struct ql_adapter *qdev, struct rx_ring *rx_ring)
|
|||
cpu_to_le32(rx_ring->lbq_base_indirect_dma);
|
||||
cqicb->lbq_addr_hi =
|
||||
cpu_to_le32((u64) rx_ring->lbq_base_indirect_dma >> 32);
|
||||
cqicb->lbq_buf_size = cpu_to_le32(rx_ring->lbq_buf_size);
|
||||
bq_len = (u16) rx_ring->lbq_len;
|
||||
bq_len = (rx_ring->lbq_buf_size == 65536) ? 0 :
|
||||
(u16) rx_ring->lbq_buf_size;
|
||||
cqicb->lbq_buf_size = cpu_to_le16(bq_len);
|
||||
bq_len = (rx_ring->lbq_len == 65536) ? 0 :
|
||||
(u16) rx_ring->lbq_len;
|
||||
cqicb->lbq_len = cpu_to_le16(bq_len);
|
||||
rx_ring->lbq_prod_idx = rx_ring->lbq_len - 16;
|
||||
rx_ring->lbq_curr_idx = 0;
|
||||
|
@ -2520,7 +2507,8 @@ static int ql_start_rx_ring(struct ql_adapter *qdev, struct rx_ring *rx_ring)
|
|||
cpu_to_le32((u64) rx_ring->sbq_base_indirect_dma >> 32);
|
||||
cqicb->sbq_buf_size =
|
||||
cpu_to_le16(((rx_ring->sbq_buf_size / 2) + 8) & 0xfffffff8);
|
||||
bq_len = (u16) rx_ring->sbq_len;
|
||||
bq_len = (rx_ring->sbq_len == 65536) ? 0 :
|
||||
(u16) rx_ring->sbq_len;
|
||||
cqicb->sbq_len = cpu_to_le16(bq_len);
|
||||
rx_ring->sbq_prod_idx = rx_ring->sbq_len - 16;
|
||||
rx_ring->sbq_curr_idx = 0;
|
||||
|
@ -3341,11 +3329,11 @@ static int ql_configure_rings(struct ql_adapter *qdev)
|
|||
rx_ring->cq_len * sizeof(struct ql_net_rsp_iocb);
|
||||
rx_ring->lbq_len = NUM_LARGE_BUFFERS;
|
||||
rx_ring->lbq_size =
|
||||
rx_ring->lbq_len * sizeof(struct bq_element);
|
||||
rx_ring->lbq_len * sizeof(__le64);
|
||||
rx_ring->lbq_buf_size = LARGE_BUFFER_SIZE;
|
||||
rx_ring->sbq_len = NUM_SMALL_BUFFERS;
|
||||
rx_ring->sbq_size =
|
||||
rx_ring->sbq_len * sizeof(struct bq_element);
|
||||
rx_ring->sbq_len * sizeof(__le64);
|
||||
rx_ring->sbq_buf_size = SMALL_BUFFER_SIZE * 2;
|
||||
rx_ring->type = DEFAULT_Q;
|
||||
} else if (i < qdev->rss_ring_first_cq_id) {
|
||||
|
@ -3372,11 +3360,11 @@ static int ql_configure_rings(struct ql_adapter *qdev)
|
|||
rx_ring->cq_len * sizeof(struct ql_net_rsp_iocb);
|
||||
rx_ring->lbq_len = NUM_LARGE_BUFFERS;
|
||||
rx_ring->lbq_size =
|
||||
rx_ring->lbq_len * sizeof(struct bq_element);
|
||||
rx_ring->lbq_len * sizeof(__le64);
|
||||
rx_ring->lbq_buf_size = LARGE_BUFFER_SIZE;
|
||||
rx_ring->sbq_len = NUM_SMALL_BUFFERS;
|
||||
rx_ring->sbq_size =
|
||||
rx_ring->sbq_len * sizeof(struct bq_element);
|
||||
rx_ring->sbq_len * sizeof(__le64);
|
||||
rx_ring->sbq_buf_size = SMALL_BUFFER_SIZE * 2;
|
||||
rx_ring->type = RX_Q;
|
||||
}
|
||||
|
|
|
@ -42,11 +42,11 @@
|
|||
#include <linux/mii.h>
|
||||
#include <linux/if_vlan.h>
|
||||
#include <linux/mm.h>
|
||||
#include <linux/firmware.h>
|
||||
#include <asm/processor.h> /* Processor type for cache alignment. */
|
||||
#include <asm/uaccess.h>
|
||||
#include <asm/io.h>
|
||||
|
||||
#include "starfire_firmware.h"
|
||||
/*
|
||||
* The current frame processor firmware fails to checksum a fragment
|
||||
* of length 1. If and when this is fixed, the #define below can be removed.
|
||||
|
@ -173,6 +173,10 @@ static int full_duplex[MAX_UNITS] = {0, };
|
|||
#define skb_first_frag_len(skb) skb_headlen(skb)
|
||||
#define skb_num_frags(skb) (skb_shinfo(skb)->nr_frags + 1)
|
||||
|
||||
/* Firmware names */
|
||||
#define FIRMWARE_RX "adaptec/starfire_rx.bin"
|
||||
#define FIRMWARE_TX "adaptec/starfire_tx.bin"
|
||||
|
||||
/* These identify the driver base version and may not be removed. */
|
||||
static char version[] =
|
||||
KERN_INFO "starfire.c:v1.03 7/26/2000 Written by Donald Becker <becker@scyld.com>\n"
|
||||
|
@ -182,6 +186,8 @@ MODULE_AUTHOR("Donald Becker <becker@scyld.com>");
|
|||
MODULE_DESCRIPTION("Adaptec Starfire Ethernet driver");
|
||||
MODULE_LICENSE("GPL");
|
||||
MODULE_VERSION(DRV_VERSION);
|
||||
MODULE_FIRMWARE(FIRMWARE_RX);
|
||||
MODULE_FIRMWARE(FIRMWARE_TX);
|
||||
|
||||
module_param(max_interrupt_work, int, 0);
|
||||
module_param(mtu, int, 0);
|
||||
|
@ -902,9 +908,12 @@ static void mdio_write(struct net_device *dev, int phy_id, int location, int val
|
|||
|
||||
static int netdev_open(struct net_device *dev)
|
||||
{
|
||||
const struct firmware *fw_rx, *fw_tx;
|
||||
const __be32 *fw_rx_data, *fw_tx_data;
|
||||
struct netdev_private *np = netdev_priv(dev);
|
||||
void __iomem *ioaddr = np->base;
|
||||
int i, retval;
|
||||
size_t tx_size, rx_size;
|
||||
size_t tx_done_q_size, rx_done_q_size, tx_ring_size, rx_ring_size;
|
||||
|
||||
/* Do we ever need to reset the chip??? */
|
||||
|
@ -1040,11 +1049,40 @@ static int netdev_open(struct net_device *dev)
|
|||
writel(ETH_P_8021Q, ioaddr + VlanType);
|
||||
#endif /* VLAN_SUPPORT */
|
||||
|
||||
retval = request_firmware(&fw_rx, FIRMWARE_RX, &np->pci_dev->dev);
|
||||
if (retval) {
|
||||
printk(KERN_ERR "starfire: Failed to load firmware \"%s\"\n",
|
||||
FIRMWARE_RX);
|
||||
return retval;
|
||||
}
|
||||
if (fw_rx->size % 4) {
|
||||
printk(KERN_ERR "starfire: bogus length %zu in \"%s\"\n",
|
||||
fw_rx->size, FIRMWARE_RX);
|
||||
retval = -EINVAL;
|
||||
goto out_rx;
|
||||
}
|
||||
retval = request_firmware(&fw_tx, FIRMWARE_TX, &np->pci_dev->dev);
|
||||
if (retval) {
|
||||
printk(KERN_ERR "starfire: Failed to load firmware \"%s\"\n",
|
||||
FIRMWARE_TX);
|
||||
goto out_rx;
|
||||
}
|
||||
if (fw_tx->size % 4) {
|
||||
printk(KERN_ERR "starfire: bogus length %zu in \"%s\"\n",
|
||||
fw_tx->size, FIRMWARE_TX);
|
||||
retval = -EINVAL;
|
||||
goto out_tx;
|
||||
}
|
||||
fw_rx_data = (const __be32 *)&fw_rx->data[0];
|
||||
fw_tx_data = (const __be32 *)&fw_tx->data[0];
|
||||
rx_size = fw_rx->size / 4;
|
||||
tx_size = fw_tx->size / 4;
|
||||
|
||||
/* Load Rx/Tx firmware into the frame processors */
|
||||
for (i = 0; i < FIRMWARE_RX_SIZE * 2; i++)
|
||||
writel(firmware_rx[i], ioaddr + RxGfpMem + i * 4);
|
||||
for (i = 0; i < FIRMWARE_TX_SIZE * 2; i++)
|
||||
writel(firmware_tx[i], ioaddr + TxGfpMem + i * 4);
|
||||
for (i = 0; i < rx_size; i++)
|
||||
writel(be32_to_cpup(&fw_rx_data[i]), ioaddr + RxGfpMem + i * 4);
|
||||
for (i = 0; i < tx_size; i++)
|
||||
writel(be32_to_cpup(&fw_tx_data[i]), ioaddr + TxGfpMem + i * 4);
|
||||
if (enable_hw_cksum)
|
||||
/* Enable the Rx and Tx units, and the Rx/Tx frame processors. */
|
||||
writel(TxEnable|TxGFPEnable|RxEnable|RxGFPEnable, ioaddr + GenCtrl);
|
||||
|
@ -1056,7 +1094,11 @@ static int netdev_open(struct net_device *dev)
|
|||
printk(KERN_DEBUG "%s: Done netdev_open().\n",
|
||||
dev->name);
|
||||
|
||||
return 0;
|
||||
out_tx:
|
||||
release_firmware(fw_tx);
|
||||
out_rx:
|
||||
release_firmware(fw_rx);
|
||||
return retval;
|
||||
}
|
||||
|
||||
|
||||
|
|
|
@ -1,346 +0,0 @@
|
|||
/*
|
||||
* Copyright 2003 Adaptec, Inc.
|
||||
*
|
||||
* Please read the following license before using the Adaptec Software
|
||||
* ("Program"). If you do not agree to the license terms, do not use the
|
||||
* Program:
|
||||
*
|
||||
* You agree to be bound by version 2 of the General Public License ("GPL")
|
||||
* dated June 1991, which can be found at http://www.fsf.org/licenses/gpl.html.
|
||||
* If the link is broken, write to Free Software Foundation, 59 Temple Place,
|
||||
* Boston, Massachusetts 02111-1307.
|
||||
*
|
||||
* BECAUSE THE PROGRAM IS LICENSED FREE OF CHARGE IT IS LICENSED "AS IS" AND
|
||||
* THERE IS NO WARRANTY FOR THE PROGRAM, INCLUDING BUT NOT LIMITED TO THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTIBILITY OR FITNESS FOR A PARTICULAR PURPOSE
|
||||
* (TO THE EXTENT PERMITTED BY APPLICABLE LAW). USE OF THE PROGRAM IS AT YOUR
|
||||
* OWN RISK. IN NO EVENT WILL ADAPTEC OR ITS LICENSORS BE LIABLE TO YOU FOR
|
||||
* DAMAGES, INCLUDING ANY GENERAL, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES
|
||||
* ARISING OUT OF THE USE OR INABILITY TO USE THE PROGRAM.
|
||||
*
|
||||
*/
|
||||
|
||||
static const u32 firmware_rx[] = {
|
||||
0x010003dc, 0x00000000,
|
||||
0x04000421, 0x00000086,
|
||||
0x80000015, 0x0000180e,
|
||||
0x81000015, 0x00006664,
|
||||
0x1a0040ab, 0x00000b06,
|
||||
0x14200011, 0x00000000,
|
||||
0x14204022, 0x0000aaaa,
|
||||
0x14204022, 0x00000300,
|
||||
0x14204022, 0x00000000,
|
||||
0x1a0040ab, 0x00000b14,
|
||||
0x14200011, 0x00000000,
|
||||
0x83000015, 0x00000002,
|
||||
0x04000021, 0x00000000,
|
||||
0x00000010, 0x00000000,
|
||||
0x04000421, 0x00000087,
|
||||
0x00000010, 0x00000000,
|
||||
0x00000010, 0x00000000,
|
||||
0x00008015, 0x00000000,
|
||||
0x0000003e, 0x00000000,
|
||||
0x00000010, 0x00000000,
|
||||
0x82000015, 0x00004000,
|
||||
0x009e8050, 0x00000000,
|
||||
0x03008015, 0x00000000,
|
||||
0x86008015, 0x00000000,
|
||||
0x82000015, 0x00008000,
|
||||
0x0100001c, 0x00000000,
|
||||
0x000050a0, 0x0000010c,
|
||||
0x4e20d011, 0x00006008,
|
||||
0x1420d012, 0x00004008,
|
||||
0x0000f090, 0x00007000,
|
||||
0x0000c8b0, 0x00003000,
|
||||
0x00004040, 0x00000000,
|
||||
0x00108015, 0x00000000,
|
||||
0x00a2c150, 0x00004000,
|
||||
0x00a400b0, 0x00000014,
|
||||
0x00000020, 0x00000000,
|
||||
0x2500400d, 0x00002525,
|
||||
0x00047220, 0x00003100,
|
||||
0x00934070, 0x00000000,
|
||||
0x00000020, 0x00000000,
|
||||
0x00924460, 0x00000184,
|
||||
0x2b20c011, 0x00000000,
|
||||
0x0000c420, 0x00000540,
|
||||
0x36014018, 0x0000422d,
|
||||
0x14200011, 0x00000000,
|
||||
0x00924460, 0x00000183,
|
||||
0x3200001f, 0x00000034,
|
||||
0x02ac0015, 0x00000002,
|
||||
0x00a60110, 0x00000008,
|
||||
0x42200011, 0x00000000,
|
||||
0x00924060, 0x00000103,
|
||||
0x0000001e, 0x00000000,
|
||||
0x00000020, 0x00000100,
|
||||
0x0000001e, 0x00000000,
|
||||
0x00924460, 0x00000086,
|
||||
0x00004080, 0x00000000,
|
||||
0x0092c070, 0x00000000,
|
||||
0x00924060, 0x00000100,
|
||||
0x0000c890, 0x00005000,
|
||||
0x00a6c110, 0x00000000,
|
||||
0x00b0c090, 0x00000012,
|
||||
0x021c0015, 0x00000000,
|
||||
0x3200001f, 0x00000034,
|
||||
0x00924460, 0x00000510,
|
||||
0x44210011, 0x00000000,
|
||||
0x42000011, 0x00000000,
|
||||
0x83000015, 0x00000040,
|
||||
0x00924460, 0x00000508,
|
||||
0x45014018, 0x00004545,
|
||||
0x00808050, 0x00000000,
|
||||
0x62208012, 0x00000000,
|
||||
0x82000015, 0x00000800,
|
||||
0x15200011, 0x00000000,
|
||||
0x00000010, 0x00000000,
|
||||
0x00000010, 0x00000000,
|
||||
0x00000010, 0x00000000,
|
||||
0x00000010, 0x00000000,
|
||||
0x00000010, 0x00000000,
|
||||
0x80000015, 0x0000eea4,
|
||||
0x81000015, 0x0000005f,
|
||||
0x00000060, 0x00000000,
|
||||
0x00004120, 0x00000000,
|
||||
0x00004a00, 0x00004000,
|
||||
0x00924460, 0x00000190,
|
||||
0x5601401a, 0x00005956,
|
||||
0x14000011, 0x00000000,
|
||||
0x00934050, 0x00000018,
|
||||
0x00930050, 0x00000018,
|
||||
0x3601403a, 0x0000002d,
|
||||
0x000643a9, 0x00000000,
|
||||
0x0000c420, 0x00000140,
|
||||
0x5601401a, 0x00005956,
|
||||
0x14000011, 0x00000000,
|
||||
0x00000010, 0x00000000,
|
||||
0x00000010, 0x00000000,
|
||||
0x000642a9, 0x00000000,
|
||||
0x00024420, 0x00000183,
|
||||
0x5601401a, 0x00005956,
|
||||
0x82000015, 0x00002000,
|
||||
0x15200011, 0x00000000,
|
||||
0x82000015, 0x00000010,
|
||||
0x15200011, 0x00000000,
|
||||
0x82000015, 0x00000010,
|
||||
0x15200011, 0x00000000,
|
||||
}; /* 104 Rx instructions */
|
||||
#define FIRMWARE_RX_SIZE 104
|
||||
|
||||
static const u32 firmware_tx[] = {
|
||||
0x010003dc, 0x00000000,
|
||||
0x04000421, 0x00000086,
|
||||
0x80000015, 0x0000180e,
|
||||
0x81000015, 0x00006664,
|
||||
0x1a0040ab, 0x00000b06,
|
||||
0x14200011, 0x00000000,
|
||||
0x14204022, 0x0000aaaa,
|
||||
0x14204022, 0x00000300,
|
||||
0x14204022, 0x00000000,
|
||||
0x1a0040ab, 0x00000b14,
|
||||
0x14200011, 0x00000000,
|
||||
0x83000015, 0x00000002,
|
||||
0x04000021, 0x00000000,
|
||||
0x00000010, 0x00000000,
|
||||
0x04000421, 0x00000087,
|
||||
0x00000010, 0x00000000,
|
||||
0x00000010, 0x00000000,
|
||||
0x00008015, 0x00000000,
|
||||
0x0000003e, 0x00000000,
|
||||
0x00000010, 0x00000000,
|
||||
0x82000015, 0x00004000,
|
||||
0x009e8050, 0x00000000,
|
||||
0x03008015, 0x00000000,
|
||||
0x86008015, 0x00000000,
|
||||
0x82000015, 0x00008000,
|
||||
0x0100001c, 0x00000000,
|
||||
0x000050a0, 0x0000010c,
|
||||
0x4e20d011, 0x00006008,
|
||||
0x1420d012, 0x00004008,
|
||||
0x0000f090, 0x00007000,
|
||||
0x0000c8b0, 0x00003000,
|
||||
0x00004040, 0x00000000,
|
||||
0x00108015, 0x00000000,
|
||||
0x00a2c150, 0x00004000,
|
||||
0x00a400b0, 0x00000014,
|
||||
0x00000020, 0x00000000,
|
||||
0x2500400d, 0x00002525,
|
||||
0x00047220, 0x00003100,
|
||||
0x00934070, 0x00000000,
|
||||
0x00000020, 0x00000000,
|
||||
0x00924460, 0x00000184,
|
||||
0x2b20c011, 0x00000000,
|
||||
0x0000c420, 0x00000540,
|
||||
0x36014018, 0x0000422d,
|
||||
0x14200011, 0x00000000,
|
||||
0x00924460, 0x00000183,
|
||||
0x3200001f, 0x00000034,
|
||||
0x02ac0015, 0x00000002,
|
||||
0x00a60110, 0x00000008,
|
||||
0x42200011, 0x00000000,
|
||||
0x00924060, 0x00000103,
|
||||
0x0000001e, 0x00000000,
|
||||
0x00000020, 0x00000100,
|
||||
0x0000001e, 0x00000000,
|
||||
0x00924460, 0x00000086,
|
||||
0x00004080, 0x00000000,
|
||||
0x0092c070, 0x00000000,
|
||||
0x00924060, 0x00000100,
|
||||
0x0000c890, 0x00005000,
|
||||
0x00a6c110, 0x00000000,
|
||||
0x00b0c090, 0x00000012,
|
||||
0x021c0015, 0x00000000,
|
||||
0x3200001f, 0x00000034,
|
||||
0x00924460, 0x00000510,
|
||||
0x44210011, 0x00000000,
|
||||
0x42000011, 0x00000000,
|
||||
0x83000015, 0x00000040,
|
||||
0x00924460, 0x00000508,
|
||||
0x45014018, 0x00004545,
|
||||
0x00808050, 0x00000000,
|
||||
0x62208012, 0x00000000,
|
||||
0x82000015, 0x00000800,
|
||||
0x15200011, 0x00000000,
|
||||
0x00000010, 0x00000000,
|
||||
0x00000010, 0x00000000,
|
||||
0x00000010, 0x00000000,
|
||||
0x00000010, 0x00000000,
|
||||
0x00000010, 0x00000000,
|
||||
0x80000015, 0x0000eea4,
|
||||
0x81000015, 0x0000005f,
|
||||
0x00000060, 0x00000000,
|
||||
0x00004120, 0x00000000,
|
||||
0x00004a00, 0x00004000,
|
||||
0x00924460, 0x00000190,
|
||||
0x5601401a, 0x00005956,
|
||||
0x14000011, 0x00000000,
|
||||
0x00934050, 0x00000018,
|
||||
0x00930050, 0x00000018,
|
||||
0x3601403a, 0x0000002d,
|
||||
0x000643a9, 0x00000000,
|
||||
0x0000c420, 0x00000140,
|
||||
0x5601401a, 0x00005956,
|
||||
0x14000011, 0x00000000,
|
||||
0x00000010, 0x00000000,
|
||||
0x00000010, 0x00000000,
|
||||
0x000642a9, 0x00000000,
|
||||
0x00024420, 0x00000183,
|
||||
0x5601401a, 0x00005956,
|
||||
0x82000015, 0x00002000,
|
||||
0x15200011, 0x00000000,
|
||||
0x82000015, 0x00000010,
|
||||
0x15200011, 0x00000000,
|
||||
0x82000015, 0x00000010,
|
||||
0x15200011, 0x00000000,
|
||||
}; /* 104 Tx instructions */
|
||||
#define FIRMWARE_TX_SIZE 104
|
||||
#if 0
|
||||
static const u32 firmware_wol[] = {
|
||||
0x010003dc, 0x00000000,
|
||||
0x19000421, 0x00000087,
|
||||
0x80000015, 0x00001a1a,
|
||||
0x81000015, 0x00001a1a,
|
||||
0x1a0040ab, 0x00000b06,
|
||||
0x15200011, 0x00000000,
|
||||
0x15204022, 0x0000aaaa,
|
||||
0x15204022, 0x00000300,
|
||||
0x15204022, 0x00000000,
|
||||
0x1a0040ab, 0x00000b15,
|
||||
0x15200011, 0x00000000,
|
||||
0x83000015, 0x00000002,
|
||||
0x04000021, 0x00000000,
|
||||
0x00000010, 0x00000000,
|
||||
0x04000421, 0x00000087,
|
||||
0x00000010, 0x00000000,
|
||||
0x00000010, 0x00000000,
|
||||
0x00008015, 0x00000000,
|
||||
0x0000003e, 0x00000000,
|
||||
0x00000010, 0x00000000,
|
||||
0x00000010, 0x00000000,
|
||||
0x82000015, 0x00004000,
|
||||
0x82000015, 0x00008000,
|
||||
0x0000000c, 0x00000000,
|
||||
0x00000010, 0x00000000,
|
||||
0x00004080, 0x00000100,
|
||||
0x1f20c011, 0x00001122,
|
||||
0x2720f011, 0x00003011,
|
||||
0x19200071, 0x00000000,
|
||||
0x1a200051, 0x00000000,
|
||||
0x00000010, 0x00000000,
|
||||
0x00000010, 0x00000000,
|
||||
0x1d2040a4, 0x00003344,
|
||||
0x1d2040a2, 0x00005566,
|
||||
0x000040a0, 0x00000100,
|
||||
0x00108050, 0x00000001,
|
||||
0x1a208012, 0x00000006,
|
||||
0x82000015, 0x00008080,
|
||||
0x010003dc, 0x00000000,
|
||||
0x1d2040a4, 0x00002233,
|
||||
0x1d2040a4, 0x00004455,
|
||||
0x2d208011, 0x00000005,
|
||||
0x1d2040a4, 0x00006611,
|
||||
0x00108050, 0x00000001,
|
||||
0x27200011, 0x00000000,
|
||||
0x1d2050a4, 0x00006600,
|
||||
0x82000015, 0x00008080,
|
||||
0x010003dc, 0x00000000,
|
||||
0x00000050, 0x00000000,
|
||||
0x1b200031, 0x00000000,
|
||||
0x0000001e, 0x00000000,
|
||||
0x0000001e, 0x00000000,
|
||||
0x0000001e, 0x00000000,
|
||||
0x0000001e, 0x00000000,
|
||||
0x00924460, 0x00000086,
|
||||
0x00004080, 0x00000000,
|
||||
0x0092c070, 0x00000000,
|
||||
0x00924060, 0x00000100,
|
||||
0x0000c890, 0x00005000,
|
||||
0x00a6c110, 0x00000000,
|
||||
0x00b0c090, 0x00000012,
|
||||
0x021c0015, 0x00000000,
|
||||
0x3200001f, 0x00000034,
|
||||
0x00924460, 0x00000510,
|
||||
0x44210011, 0x00000000,
|
||||
0x42000011, 0x00000000,
|
||||
0x83000015, 0x00000040,
|
||||
0x00924460, 0x00000508,
|
||||
0x476a0012, 0x00000100,
|
||||
0x83000015, 0x00000008,
|
||||
0x16200011, 0x00000000,
|
||||
0x001e8050, 0x00000000,
|
||||
0x001e8050, 0x00000000,
|
||||
0x00808050, 0x00000000,
|
||||
0x03008015, 0x00000000,
|
||||
0x62208012, 0x00000000,
|
||||
0x82000015, 0x00000800,
|
||||
0x16200011, 0x00000000,
|
||||
0x80000015, 0x0000eea4,
|
||||
0x81000015, 0x0000005f,
|
||||
0x00000020, 0x00000000,
|
||||
0x00004120, 0x00000000,
|
||||
0x00004a00, 0x00004000,
|
||||
0x00924460, 0x00000190,
|
||||
0x5c01401a, 0x0000595c,
|
||||
0x15000011, 0x00000000,
|
||||
0x00934050, 0x00000018,
|
||||
0x00930050, 0x00000018,
|
||||
0x3601403a, 0x0000002d,
|
||||
0x00064029, 0x00000000,
|
||||
0x0000c420, 0x00000140,
|
||||
0x5c01401a, 0x0000595c,
|
||||
0x15000011, 0x00000000,
|
||||
0x00000010, 0x00000000,
|
||||
0x00000010, 0x00000000,
|
||||
0x00064029, 0x00000000,
|
||||
0x00024420, 0x00000183,
|
||||
0x5c01401a, 0x0000595c,
|
||||
0x82000015, 0x00002000,
|
||||
0x16200011, 0x00000000,
|
||||
0x82000015, 0x00000010,
|
||||
0x16200011, 0x00000000,
|
||||
0x82000015, 0x00000010,
|
||||
0x16200011, 0x00000000,
|
||||
}; /* 104 WoL instructions */
|
||||
#define FIRMWARE_WOL_SIZE 104
|
||||
#endif
|
|
@ -1,31 +0,0 @@
|
|||
#!/usr/bin/perl
|
||||
|
||||
# This script can be used to generate a new starfire_firmware.h
|
||||
# from GFP_RX.DAT and GFP_TX.DAT, files included with the DDK
|
||||
# and also with the Novell drivers.
|
||||
|
||||
open FW, "GFP_RX.DAT" || die;
|
||||
open FWH, ">starfire_firmware.h" || die;
|
||||
|
||||
printf(FWH "static u32 firmware_rx[] = {\n");
|
||||
$counter = 0;
|
||||
while ($foo = <FW>) {
|
||||
chomp;
|
||||
printf(FWH " 0x%s, 0x0000%s,\n", substr($foo, 4, 8), substr($foo, 0, 4));
|
||||
$counter++;
|
||||
}
|
||||
|
||||
close FW;
|
||||
open FW, "GFP_TX.DAT" || die;
|
||||
|
||||
printf(FWH "};\t/* %d Rx instructions */\n#define FIRMWARE_RX_SIZE %d\n\nstatic u32 firmware_tx[] = {\n", $counter, $counter);
|
||||
$counter = 0;
|
||||
while ($foo = <FW>) {
|
||||
chomp;
|
||||
printf(FWH " 0x%s, 0x0000%s,\n", substr($foo, 4, 8), substr($foo, 0, 4));
|
||||
$counter++;
|
||||
}
|
||||
|
||||
close FW;
|
||||
printf(FWH "};\t/* %d Tx instructions */\n#define FIRMWARE_TX_SIZE %d\n", $counter, $counter);
|
||||
close(FWH);
|
|
@ -40,6 +40,7 @@
|
|||
#include <linux/workqueue.h>
|
||||
#include <linux/prefetch.h>
|
||||
#include <linux/dma-mapping.h>
|
||||
#include <linux/firmware.h>
|
||||
|
||||
#include <net/checksum.h>
|
||||
#include <net/ip.h>
|
||||
|
@ -137,6 +138,10 @@
|
|||
|
||||
#define TG3_NUM_TEST 6
|
||||
|
||||
#define FIRMWARE_TG3 "tigon/tg3.bin"
|
||||
#define FIRMWARE_TG3TSO "tigon/tg3_tso.bin"
|
||||
#define FIRMWARE_TG3TSO5 "tigon/tg3_tso5.bin"
|
||||
|
||||
static char version[] __devinitdata =
|
||||
DRV_MODULE_NAME ".c:v" DRV_MODULE_VERSION " (" DRV_MODULE_RELDATE ")\n";
|
||||
|
||||
|
@ -144,6 +149,10 @@ MODULE_AUTHOR("David S. Miller (davem@redhat.com) and Jeff Garzik (jgarzik@pobox
|
|||
MODULE_DESCRIPTION("Broadcom Tigon3 ethernet driver");
|
||||
MODULE_LICENSE("GPL");
|
||||
MODULE_VERSION(DRV_MODULE_VERSION);
|
||||
MODULE_FIRMWARE(FIRMWARE_TG3);
|
||||
MODULE_FIRMWARE(FIRMWARE_TG3TSO);
|
||||
MODULE_FIRMWARE(FIRMWARE_TG3TSO5);
|
||||
|
||||
|
||||
static int tg3_debug = -1; /* -1 == use TG3_DEF_MSG_ENABLE as value */
|
||||
module_param(tg3_debug, int, 0);
|
||||
|
@ -6205,130 +6214,6 @@ static int tg3_halt(struct tg3 *tp, int kind, int silent)
|
|||
return 0;
|
||||
}
|
||||
|
||||
#define TG3_FW_RELEASE_MAJOR 0x0
|
||||
#define TG3_FW_RELASE_MINOR 0x0
|
||||
#define TG3_FW_RELEASE_FIX 0x0
|
||||
#define TG3_FW_START_ADDR 0x08000000
|
||||
#define TG3_FW_TEXT_ADDR 0x08000000
|
||||
#define TG3_FW_TEXT_LEN 0x9c0
|
||||
#define TG3_FW_RODATA_ADDR 0x080009c0
|
||||
#define TG3_FW_RODATA_LEN 0x60
|
||||
#define TG3_FW_DATA_ADDR 0x08000a40
|
||||
#define TG3_FW_DATA_LEN 0x20
|
||||
#define TG3_FW_SBSS_ADDR 0x08000a60
|
||||
#define TG3_FW_SBSS_LEN 0xc
|
||||
#define TG3_FW_BSS_ADDR 0x08000a70
|
||||
#define TG3_FW_BSS_LEN 0x10
|
||||
|
||||
static const u32 tg3FwText[(TG3_FW_TEXT_LEN / sizeof(u32)) + 1] = {
|
||||
0x00000000, 0x10000003, 0x00000000, 0x0000000d, 0x0000000d, 0x3c1d0800,
|
||||
0x37bd3ffc, 0x03a0f021, 0x3c100800, 0x26100000, 0x0e000018, 0x00000000,
|
||||
0x0000000d, 0x3c1d0800, 0x37bd3ffc, 0x03a0f021, 0x3c100800, 0x26100034,
|
||||
0x0e00021c, 0x00000000, 0x0000000d, 0x00000000, 0x00000000, 0x00000000,
|
||||
0x27bdffe0, 0x3c1cc000, 0xafbf0018, 0xaf80680c, 0x0e00004c, 0x241b2105,
|
||||
0x97850000, 0x97870002, 0x9782002c, 0x9783002e, 0x3c040800, 0x248409c0,
|
||||
0xafa00014, 0x00021400, 0x00621825, 0x00052c00, 0xafa30010, 0x8f860010,
|
||||
0x00e52825, 0x0e000060, 0x24070102, 0x3c02ac00, 0x34420100, 0x3c03ac01,
|
||||
0x34630100, 0xaf820490, 0x3c02ffff, 0xaf820494, 0xaf830498, 0xaf82049c,
|
||||
0x24020001, 0xaf825ce0, 0x0e00003f, 0xaf825d00, 0x0e000140, 0x00000000,
|
||||
0x8fbf0018, 0x03e00008, 0x27bd0020, 0x2402ffff, 0xaf825404, 0x8f835400,
|
||||
0x34630400, 0xaf835400, 0xaf825404, 0x3c020800, 0x24420034, 0xaf82541c,
|
||||
0x03e00008, 0xaf805400, 0x00000000, 0x00000000, 0x3c020800, 0x34423000,
|
||||
0x3c030800, 0x34633000, 0x3c040800, 0x348437ff, 0x3c010800, 0xac220a64,
|
||||
0x24020040, 0x3c010800, 0xac220a68, 0x3c010800, 0xac200a60, 0xac600000,
|
||||
0x24630004, 0x0083102b, 0x5040fffd, 0xac600000, 0x03e00008, 0x00000000,
|
||||
0x00804821, 0x8faa0010, 0x3c020800, 0x8c420a60, 0x3c040800, 0x8c840a68,
|
||||
0x8fab0014, 0x24430001, 0x0044102b, 0x3c010800, 0xac230a60, 0x14400003,
|
||||
0x00004021, 0x3c010800, 0xac200a60, 0x3c020800, 0x8c420a60, 0x3c030800,
|
||||
0x8c630a64, 0x91240000, 0x00021140, 0x00431021, 0x00481021, 0x25080001,
|
||||
0xa0440000, 0x29020008, 0x1440fff4, 0x25290001, 0x3c020800, 0x8c420a60,
|
||||
0x3c030800, 0x8c630a64, 0x8f84680c, 0x00021140, 0x00431021, 0xac440008,
|
||||
0xac45000c, 0xac460010, 0xac470014, 0xac4a0018, 0x03e00008, 0xac4b001c,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 0,
|
||||
0x02000008, 0x00000000, 0x0a0001e3, 0x3c0a0001, 0x0a0001e3, 0x3c0a0002,
|
||||
0x0a0001e3, 0x00000000, 0x0a0001e3, 0x00000000, 0x0a0001e3, 0x00000000,
|
||||
0x0a0001e3, 0x00000000, 0x0a0001e3, 0x00000000, 0x0a0001e3, 0x00000000,
|
||||
0x0a0001e3, 0x00000000, 0x0a0001e3, 0x00000000, 0x0a0001e3, 0x00000000,
|
||||
0x0a0001e3, 0x3c0a0007, 0x0a0001e3, 0x3c0a0008, 0x0a0001e3, 0x3c0a0009,
|
||||
0x0a0001e3, 0x00000000, 0x0a0001e3, 0x00000000, 0x0a0001e3, 0x3c0a000b,
|
||||
0x0a0001e3, 0x3c0a000c, 0x0a0001e3, 0x3c0a000d, 0x0a0001e3, 0x00000000,
|
||||
0x0a0001e3, 0x00000000, 0x0a0001e3, 0x3c0a000e, 0x0a0001e3, 0x00000000,
|
||||
0x0a0001e3, 0x00000000, 0x0a0001e3, 0x00000000, 0x0a0001e3, 0x00000000,
|
||||
0x0a0001e3, 0x00000000, 0x0a0001e3, 0x00000000, 0x0a0001e3, 0x00000000,
|
||||
0x0a0001e3, 0x00000000, 0x0a0001e3, 0x3c0a0013, 0x0a0001e3, 0x3c0a0014,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
0x27bdffe0, 0x00001821, 0x00001021, 0xafbf0018, 0xafb10014, 0xafb00010,
|
||||
0x3c010800, 0x00220821, 0xac200a70, 0x3c010800, 0x00220821, 0xac200a74,
|
||||
0x3c010800, 0x00220821, 0xac200a78, 0x24630001, 0x1860fff5, 0x2442000c,
|
||||
0x24110001, 0x8f906810, 0x32020004, 0x14400005, 0x24040001, 0x3c020800,
|
||||
0x8c420a78, 0x18400003, 0x00002021, 0x0e000182, 0x00000000, 0x32020001,
|
||||
0x10400003, 0x00000000, 0x0e000169, 0x00000000, 0x0a000153, 0xaf915028,
|
||||
0x8fbf0018, 0x8fb10014, 0x8fb00010, 0x03e00008, 0x27bd0020, 0x3c050800,
|
||||
0x8ca50a70, 0x3c060800, 0x8cc60a80, 0x3c070800, 0x8ce70a78, 0x27bdffe0,
|
||||
0x3c040800, 0x248409d0, 0xafbf0018, 0xafa00010, 0x0e000060, 0xafa00014,
|
||||
0x0e00017b, 0x00002021, 0x8fbf0018, 0x03e00008, 0x27bd0020, 0x24020001,
|
||||
0x8f836810, 0x00821004, 0x00021027, 0x00621824, 0x03e00008, 0xaf836810,
|
||||
0x27bdffd8, 0xafbf0024, 0x1080002e, 0xafb00020, 0x8f825cec, 0xafa20018,
|
||||
0x8f825cec, 0x3c100800, 0x26100a78, 0xafa2001c, 0x34028000, 0xaf825cec,
|
||||
0x8e020000, 0x18400016, 0x00000000, 0x3c020800, 0x94420a74, 0x8fa3001c,
|
||||
0x000221c0, 0xac830004, 0x8fa2001c, 0x3c010800, 0x0e000201, 0xac220a74,
|
||||
0x10400005, 0x00000000, 0x8e020000, 0x24420001, 0x0a0001df, 0xae020000,
|
||||
0x3c020800, 0x8c420a70, 0x00021c02, 0x000321c0, 0x0a0001c5, 0xafa2001c,
|
||||
0x0e000201, 0x00000000, 0x1040001f, 0x00000000, 0x8e020000, 0x8fa3001c,
|
||||
0x24420001, 0x3c010800, 0xac230a70, 0x3c010800, 0xac230a74, 0x0a0001df,
|
||||
0xae020000, 0x3c100800, 0x26100a78, 0x8e020000, 0x18400028, 0x00000000,
|
||||
0x0e000201, 0x00000000, 0x14400024, 0x00000000, 0x8e020000, 0x3c030800,
|
||||
0x8c630a70, 0x2442ffff, 0xafa3001c, 0x18400006, 0xae020000, 0x00031402,
|
||||
0x000221c0, 0x8c820004, 0x3c010800, 0xac220a70, 0x97a2001e, 0x2442ff00,
|
||||
0x2c420300, 0x1440000b, 0x24024000, 0x3c040800, 0x248409dc, 0xafa00010,
|
||||
0xafa00014, 0x8fa6001c, 0x24050008, 0x0e000060, 0x00003821, 0x0a0001df,
|
||||
0x00000000, 0xaf825cf8, 0x3c020800, 0x8c420a40, 0x8fa3001c, 0x24420001,
|
||||
0xaf835cf8, 0x3c010800, 0xac220a40, 0x8fbf0024, 0x8fb00020, 0x03e00008,
|
||||
0x27bd0028, 0x27bdffe0, 0x3c040800, 0x248409e8, 0x00002821, 0x00003021,
|
||||
0x00003821, 0xafbf0018, 0xafa00010, 0x0e000060, 0xafa00014, 0x8fbf0018,
|
||||
0x03e00008, 0x27bd0020, 0x8f82680c, 0x8f85680c, 0x00021827, 0x0003182b,
|
||||
0x00031823, 0x00431024, 0x00441021, 0x00a2282b, 0x10a00006, 0x00000000,
|
||||
0x00401821, 0x8f82680c, 0x0043102b, 0x1440fffd, 0x00000000, 0x03e00008,
|
||||
0x00000000, 0x3c040800, 0x8c840000, 0x3c030800, 0x8c630a40, 0x0064102b,
|
||||
0x54400002, 0x00831023, 0x00641023, 0x2c420008, 0x03e00008, 0x38420001,
|
||||
0x27bdffe0, 0x00802821, 0x3c040800, 0x24840a00, 0x00003021, 0x00003821,
|
||||
0xafbf0018, 0xafa00010, 0x0e000060, 0xafa00014, 0x0a000216, 0x00000000,
|
||||
0x8fbf0018, 0x03e00008, 0x27bd0020, 0x00000000, 0x27bdffe0, 0x3c1cc000,
|
||||
0xafbf0018, 0x0e00004c, 0xaf80680c, 0x3c040800, 0x24840a10, 0x03802821,
|
||||
0x00003021, 0x00003821, 0xafa00010, 0x0e000060, 0xafa00014, 0x2402ffff,
|
||||
0xaf825404, 0x3c0200aa, 0x0e000234, 0xaf825434, 0x8fbf0018, 0x03e00008,
|
||||
0x27bd0020, 0x00000000, 0x00000000, 0x00000000, 0x27bdffe8, 0xafb00010,
|
||||
0x24100001, 0xafbf0014, 0x3c01c003, 0xac200000, 0x8f826810, 0x30422000,
|
||||
0x10400003, 0x00000000, 0x0e000246, 0x00000000, 0x0a00023a, 0xaf905428,
|
||||
0x8fbf0014, 0x8fb00010, 0x03e00008, 0x27bd0018, 0x27bdfff8, 0x8f845d0c,
|
||||
0x3c0200ff, 0x3c030800, 0x8c630a50, 0x3442fff8, 0x00821024, 0x1043001e,
|
||||
0x3c0500ff, 0x34a5fff8, 0x3c06c003, 0x3c074000, 0x00851824, 0x8c620010,
|
||||
0x3c010800, 0xac230a50, 0x30420008, 0x10400005, 0x00871025, 0x8cc20000,
|
||||
0x24420001, 0xacc20000, 0x00871025, 0xaf825d0c, 0x8fa20000, 0x24420001,
|
||||
0xafa20000, 0x8fa20000, 0x8fa20000, 0x24420001, 0xafa20000, 0x8fa20000,
|
||||
0x8f845d0c, 0x3c030800, 0x8c630a50, 0x00851024, 0x1443ffe8, 0x00851824,
|
||||
0x27bd0008, 0x03e00008, 0x00000000, 0x00000000, 0x00000000
|
||||
};
|
||||
|
||||
static const u32 tg3FwRodata[(TG3_FW_RODATA_LEN / sizeof(u32)) + 1] = {
|
||||
0x35373031, 0x726c7341, 0x00000000, 0x00000000, 0x53774576, 0x656e7430,
|
||||
0x00000000, 0x726c7045, 0x76656e74, 0x31000000, 0x556e6b6e, 0x45766e74,
|
||||
0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x66617461, 0x6c457272,
|
||||
0x00000000, 0x00000000, 0x4d61696e, 0x43707542, 0x00000000, 0x00000000,
|
||||
0x00000000
|
||||
};
|
||||
|
||||
#if 0 /* All zeros, don't eat up space with it. */
|
||||
u32 tg3FwData[(TG3_FW_DATA_LEN / sizeof(u32)) + 1] = {
|
||||
0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
|
||||
0x00000000, 0x00000000, 0x00000000, 0x00000000
|
||||
};
|
||||
#endif
|
||||
|
||||
#define RX_CPU_SCRATCH_BASE 0x30000
|
||||
#define RX_CPU_SCRATCH_SIZE 0x04000
|
||||
#define TX_CPU_SCRATCH_BASE 0x34000
|
||||
|
@ -6383,15 +6268,9 @@ static int tg3_halt_cpu(struct tg3 *tp, u32 offset)
|
|||
}
|
||||
|
||||
struct fw_info {
|
||||
unsigned int text_base;
|
||||
unsigned int text_len;
|
||||
const u32 *text_data;
|
||||
unsigned int rodata_base;
|
||||
unsigned int rodata_len;
|
||||
const u32 *rodata_data;
|
||||
unsigned int data_base;
|
||||
unsigned int data_len;
|
||||
const u32 *data_data;
|
||||
unsigned int fw_base;
|
||||
unsigned int fw_len;
|
||||
const __be32 *fw_data;
|
||||
};
|
||||
|
||||
/* tp->lock is held. */
|
||||
|
@ -6428,24 +6307,11 @@ static int tg3_load_firmware_cpu(struct tg3 *tp, u32 cpu_base, u32 cpu_scratch_b
|
|||
write_op(tp, cpu_scratch_base + i, 0);
|
||||
tw32(cpu_base + CPU_STATE, 0xffffffff);
|
||||
tw32(cpu_base + CPU_MODE, tr32(cpu_base+CPU_MODE)|CPU_MODE_HALT);
|
||||
for (i = 0; i < (info->text_len / sizeof(u32)); i++)
|
||||
for (i = 0; i < (info->fw_len / sizeof(u32)); i++)
|
||||
write_op(tp, (cpu_scratch_base +
|
||||
(info->text_base & 0xffff) +
|
||||
(info->fw_base & 0xffff) +
|
||||
(i * sizeof(u32))),
|
||||
(info->text_data ?
|
||||
info->text_data[i] : 0));
|
||||
for (i = 0; i < (info->rodata_len / sizeof(u32)); i++)
|
||||
write_op(tp, (cpu_scratch_base +
|
||||
(info->rodata_base & 0xffff) +
|
||||
(i * sizeof(u32))),
|
||||
(info->rodata_data ?
|
||||
info->rodata_data[i] : 0));
|
||||
for (i = 0; i < (info->data_len / sizeof(u32)); i++)
|
||||
write_op(tp, (cpu_scratch_base +
|
||||
(info->data_base & 0xffff) +
|
||||
(i * sizeof(u32))),
|
||||
(info->data_data ?
|
||||
info->data_data[i] : 0));
|
||||
be32_to_cpu(info->fw_data[i]));
|
||||
|
||||
err = 0;
|
||||
|
||||
|
@ -6457,17 +6323,20 @@ out:
|
|||
static int tg3_load_5701_a0_firmware_fix(struct tg3 *tp)
|
||||
{
|
||||
struct fw_info info;
|
||||
const __be32 *fw_data;
|
||||
int err, i;
|
||||
|
||||
info.text_base = TG3_FW_TEXT_ADDR;
|
||||
info.text_len = TG3_FW_TEXT_LEN;
|
||||
info.text_data = &tg3FwText[0];
|
||||
info.rodata_base = TG3_FW_RODATA_ADDR;
|
||||
info.rodata_len = TG3_FW_RODATA_LEN;
|
||||
info.rodata_data = &tg3FwRodata[0];
|
||||
info.data_base = TG3_FW_DATA_ADDR;
|
||||
info.data_len = TG3_FW_DATA_LEN;
|
||||
info.data_data = NULL;
|
||||
fw_data = (void *)tp->fw->data;
|
||||
|
||||
/* Firmware blob starts with version numbers, followed by
|
||||
start address and length. We are setting complete length.
|
||||
length = end_address_of_bss - start_address_of_text.
|
||||
Remainder is the blob to be loaded contiguously
|
||||
from start address. */
|
||||
|
||||
info.fw_base = be32_to_cpu(fw_data[1]);
|
||||
info.fw_len = tp->fw->size - 12;
|
||||
info.fw_data = &fw_data[3];
|
||||
|
||||
err = tg3_load_firmware_cpu(tp, RX_CPU_BASE,
|
||||
RX_CPU_SCRATCH_BASE, RX_CPU_SCRATCH_SIZE,
|
||||
|
@ -6483,21 +6352,21 @@ static int tg3_load_5701_a0_firmware_fix(struct tg3 *tp)
|
|||
|
||||
/* Now startup only the RX cpu. */
|
||||
tw32(RX_CPU_BASE + CPU_STATE, 0xffffffff);
|
||||
tw32_f(RX_CPU_BASE + CPU_PC, TG3_FW_TEXT_ADDR);
|
||||
tw32_f(RX_CPU_BASE + CPU_PC, info.fw_base);
|
||||
|
||||
for (i = 0; i < 5; i++) {
|
||||
if (tr32(RX_CPU_BASE + CPU_PC) == TG3_FW_TEXT_ADDR)
|
||||
if (tr32(RX_CPU_BASE + CPU_PC) == info.fw_base)
|
||||
break;
|
||||
tw32(RX_CPU_BASE + CPU_STATE, 0xffffffff);
|
||||
tw32(RX_CPU_BASE + CPU_MODE, CPU_MODE_HALT);
|
||||
tw32_f(RX_CPU_BASE + CPU_PC, TG3_FW_TEXT_ADDR);
|
||||
tw32_f(RX_CPU_BASE + CPU_PC, info.fw_base);
|
||||
udelay(1000);
|
||||
}
|
||||
if (i >= 5) {
|
||||
printk(KERN_ERR PFX "tg3_load_firmware fails for %s "
|
||||
"to set RX CPU PC, is %08x should be %08x\n",
|
||||
tp->dev->name, tr32(RX_CPU_BASE + CPU_PC),
|
||||
TG3_FW_TEXT_ADDR);
|
||||
info.fw_base);
|
||||
return -ENODEV;
|
||||
}
|
||||
tw32(RX_CPU_BASE + CPU_STATE, 0xffffffff);
|
||||
|
@ -6506,547 +6375,36 @@ static int tg3_load_5701_a0_firmware_fix(struct tg3 *tp)
|
|||
return 0;
|
||||
}
|
||||
|
||||
|
||||
#define TG3_TSO_FW_RELEASE_MAJOR 0x1
|
||||
#define TG3_TSO_FW_RELASE_MINOR 0x6
|
||||
#define TG3_TSO_FW_RELEASE_FIX 0x0
|
||||
#define TG3_TSO_FW_START_ADDR 0x08000000
|
||||
#define TG3_TSO_FW_TEXT_ADDR 0x08000000
|
||||
#define TG3_TSO_FW_TEXT_LEN 0x1aa0
|
||||
#define TG3_TSO_FW_RODATA_ADDR 0x08001aa0
|
||||
#define TG3_TSO_FW_RODATA_LEN 0x60
|
||||
#define TG3_TSO_FW_DATA_ADDR 0x08001b20
|
||||
#define TG3_TSO_FW_DATA_LEN 0x30
|
||||
#define TG3_TSO_FW_SBSS_ADDR 0x08001b50
|
||||
#define TG3_TSO_FW_SBSS_LEN 0x2c
|
||||
#define TG3_TSO_FW_BSS_ADDR 0x08001b80
|
||||
#define TG3_TSO_FW_BSS_LEN 0x894
|
||||
|
||||
static const u32 tg3TsoFwText[(TG3_TSO_FW_TEXT_LEN / 4) + 1] = {
|
||||
0x0e000003, 0x00000000, 0x08001b24, 0x00000000, 0x10000003, 0x00000000,
|
||||
0x0000000d, 0x0000000d, 0x3c1d0800, 0x37bd4000, 0x03a0f021, 0x3c100800,
|
||||
0x26100000, 0x0e000010, 0x00000000, 0x0000000d, 0x27bdffe0, 0x3c04fefe,
|
||||
0xafbf0018, 0x0e0005d8, 0x34840002, 0x0e000668, 0x00000000, 0x3c030800,
|
||||
0x90631b68, 0x24020002, 0x3c040800, 0x24841aac, 0x14620003, 0x24050001,
|
||||
0x3c040800, 0x24841aa0, 0x24060006, 0x00003821, 0xafa00010, 0x0e00067c,
|
||||
0xafa00014, 0x8f625c50, 0x34420001, 0xaf625c50, 0x8f625c90, 0x34420001,
|
||||
0xaf625c90, 0x2402ffff, 0x0e000034, 0xaf625404, 0x8fbf0018, 0x03e00008,
|
||||
0x27bd0020, 0x00000000, 0x00000000, 0x00000000, 0x27bdffe0, 0xafbf001c,
|
||||
0xafb20018, 0xafb10014, 0x0e00005b, 0xafb00010, 0x24120002, 0x24110001,
|
||||
0x8f706820, 0x32020100, 0x10400003, 0x00000000, 0x0e0000bb, 0x00000000,
|
||||
0x8f706820, 0x32022000, 0x10400004, 0x32020001, 0x0e0001f0, 0x24040001,
|
||||
0x32020001, 0x10400003, 0x00000000, 0x0e0000a3, 0x00000000, 0x3c020800,
|
||||
0x90421b98, 0x14520003, 0x00000000, 0x0e0004c0, 0x00000000, 0x0a00003c,
|
||||
0xaf715028, 0x8fbf001c, 0x8fb20018, 0x8fb10014, 0x8fb00010, 0x03e00008,
|
||||
0x27bd0020, 0x27bdffe0, 0x3c040800, 0x24841ac0, 0x00002821, 0x00003021,
|
||||
0x00003821, 0xafbf0018, 0xafa00010, 0x0e00067c, 0xafa00014, 0x3c040800,
|
||||
0x248423d8, 0xa4800000, 0x3c010800, 0xa0201b98, 0x3c010800, 0xac201b9c,
|
||||
0x3c010800, 0xac201ba0, 0x3c010800, 0xac201ba4, 0x3c010800, 0xac201bac,
|
||||
0x3c010800, 0xac201bb8, 0x3c010800, 0xac201bbc, 0x8f624434, 0x3c010800,
|
||||
0xac221b88, 0x8f624438, 0x3c010800, 0xac221b8c, 0x8f624410, 0xac80f7a8,
|
||||
0x3c010800, 0xac201b84, 0x3c010800, 0xac2023e0, 0x3c010800, 0xac2023c8,
|
||||
0x3c010800, 0xac2023cc, 0x3c010800, 0xac202400, 0x3c010800, 0xac221b90,
|
||||
0x8f620068, 0x24030007, 0x00021702, 0x10430005, 0x00000000, 0x8f620068,
|
||||
0x00021702, 0x14400004, 0x24020001, 0x3c010800, 0x0a000097, 0xac20240c,
|
||||
0xac820034, 0x3c040800, 0x24841acc, 0x3c050800, 0x8ca5240c, 0x00003021,
|
||||
0x00003821, 0xafa00010, 0x0e00067c, 0xafa00014, 0x8fbf0018, 0x03e00008,
|
||||
0x27bd0020, 0x27bdffe0, 0x3c040800, 0x24841ad8, 0x00002821, 0x00003021,
|
||||
0x00003821, 0xafbf0018, 0xafa00010, 0x0e00067c, 0xafa00014, 0x0e00005b,
|
||||
0x00000000, 0x0e0000b4, 0x00002021, 0x8fbf0018, 0x03e00008, 0x27bd0020,
|
||||
0x24020001, 0x8f636820, 0x00821004, 0x00021027, 0x00621824, 0x03e00008,
|
||||
0xaf636820, 0x27bdffd0, 0xafbf002c, 0xafb60028, 0xafb50024, 0xafb40020,
|
||||
0xafb3001c, 0xafb20018, 0xafb10014, 0xafb00010, 0x8f675c5c, 0x3c030800,
|
||||
0x24631bbc, 0x8c620000, 0x14470005, 0x3c0200ff, 0x3c020800, 0x90421b98,
|
||||
0x14400119, 0x3c0200ff, 0x3442fff8, 0x00e28824, 0xac670000, 0x00111902,
|
||||
0x306300ff, 0x30e20003, 0x000211c0, 0x00622825, 0x00a04021, 0x00071602,
|
||||
0x3c030800, 0x90631b98, 0x3044000f, 0x14600036, 0x00804821, 0x24020001,
|
||||
0x3c010800, 0xa0221b98, 0x00051100, 0x00821025, 0x3c010800, 0xac201b9c,
|
||||
0x3c010800, 0xac201ba0, 0x3c010800, 0xac201ba4, 0x3c010800, 0xac201bac,
|
||||
0x3c010800, 0xac201bb8, 0x3c010800, 0xac201bb0, 0x3c010800, 0xac201bb4,
|
||||
0x3c010800, 0xa42223d8, 0x9622000c, 0x30437fff, 0x3c010800, 0xa4222410,
|
||||
0x30428000, 0x3c010800, 0xa4231bc6, 0x10400005, 0x24020001, 0x3c010800,
|
||||
0xac2223f4, 0x0a000102, 0x2406003e, 0x24060036, 0x3c010800, 0xac2023f4,
|
||||
0x9622000a, 0x3c030800, 0x94631bc6, 0x3c010800, 0xac2023f0, 0x3c010800,
|
||||
0xac2023f8, 0x00021302, 0x00021080, 0x00c21021, 0x00621821, 0x3c010800,
|
||||
0xa42223d0, 0x3c010800, 0x0a000115, 0xa4231b96, 0x9622000c, 0x3c010800,
|
||||
0xa42223ec, 0x3c040800, 0x24841b9c, 0x8c820000, 0x00021100, 0x3c010800,
|
||||
0x00220821, 0xac311bc8, 0x8c820000, 0x00021100, 0x3c010800, 0x00220821,
|
||||
0xac271bcc, 0x8c820000, 0x25030001, 0x306601ff, 0x00021100, 0x3c010800,
|
||||
0x00220821, 0xac261bd0, 0x8c820000, 0x00021100, 0x3c010800, 0x00220821,
|
||||
0xac291bd4, 0x96230008, 0x3c020800, 0x8c421bac, 0x00432821, 0x3c010800,
|
||||
0xac251bac, 0x9622000a, 0x30420004, 0x14400018, 0x00061100, 0x8f630c14,
|
||||
0x3063000f, 0x2c620002, 0x1440000b, 0x3c02c000, 0x8f630c14, 0x3c020800,
|
||||
0x8c421b40, 0x3063000f, 0x24420001, 0x3c010800, 0xac221b40, 0x2c620002,
|
||||
0x1040fff7, 0x3c02c000, 0x00e21825, 0xaf635c5c, 0x8f625c50, 0x30420002,
|
||||
0x10400014, 0x00000000, 0x0a000147, 0x00000000, 0x3c030800, 0x8c631b80,
|
||||
0x3c040800, 0x94841b94, 0x01221025, 0x3c010800, 0xa42223da, 0x24020001,
|
||||
0x3c010800, 0xac221bb8, 0x24630001, 0x0085202a, 0x3c010800, 0x10800003,
|
||||
0xac231b80, 0x3c010800, 0xa4251b94, 0x3c060800, 0x24c61b9c, 0x8cc20000,
|
||||
0x24420001, 0xacc20000, 0x28420080, 0x14400005, 0x00000000, 0x0e000656,
|
||||
0x24040002, 0x0a0001e6, 0x00000000, 0x3c020800, 0x8c421bb8, 0x10400078,
|
||||
0x24020001, 0x3c050800, 0x90a51b98, 0x14a20072, 0x00000000, 0x3c150800,
|
||||
0x96b51b96, 0x3c040800, 0x8c841bac, 0x32a3ffff, 0x0083102a, 0x1440006c,
|
||||
0x00000000, 0x14830003, 0x00000000, 0x3c010800, 0xac2523f0, 0x1060005c,
|
||||
0x00009021, 0x24d60004, 0x0060a021, 0x24d30014, 0x8ec20000, 0x00028100,
|
||||
0x3c110800, 0x02308821, 0x0e000625, 0x8e311bc8, 0x00402821, 0x10a00054,
|
||||
0x00000000, 0x9628000a, 0x31020040, 0x10400005, 0x2407180c, 0x8e22000c,
|
||||
0x2407188c, 0x00021400, 0xaca20018, 0x3c030800, 0x00701821, 0x8c631bd0,
|
||||
0x3c020800, 0x00501021, 0x8c421bd4, 0x00031d00, 0x00021400, 0x00621825,
|
||||
0xaca30014, 0x8ec30004, 0x96220008, 0x00432023, 0x3242ffff, 0x3083ffff,
|
||||
0x00431021, 0x0282102a, 0x14400002, 0x02b23023, 0x00803021, 0x8e620000,
|
||||
0x30c4ffff, 0x00441021, 0xae620000, 0x8e220000, 0xaca20000, 0x8e220004,
|
||||
0x8e63fff4, 0x00431021, 0xaca20004, 0xa4a6000e, 0x8e62fff4, 0x00441021,
|
||||
0xae62fff4, 0x96230008, 0x0043102a, 0x14400005, 0x02469021, 0x8e62fff0,
|
||||
0xae60fff4, 0x24420001, 0xae62fff0, 0xaca00008, 0x3242ffff, 0x14540008,
|
||||
0x24020305, 0x31020080, 0x54400001, 0x34e70010, 0x24020905, 0xa4a2000c,
|
||||
0x0a0001cb, 0x34e70020, 0xa4a2000c, 0x3c020800, 0x8c4223f0, 0x10400003,
|
||||
0x3c024b65, 0x0a0001d3, 0x34427654, 0x3c02b49a, 0x344289ab, 0xaca2001c,
|
||||
0x30e2ffff, 0xaca20010, 0x0e0005a2, 0x00a02021, 0x3242ffff, 0x0054102b,
|
||||
0x1440ffa9, 0x00000000, 0x24020002, 0x3c010800, 0x0a0001e6, 0xa0221b98,
|
||||
0x8ec2083c, 0x24420001, 0x0a0001e6, 0xaec2083c, 0x0e0004c0, 0x00000000,
|
||||
0x8fbf002c, 0x8fb60028, 0x8fb50024, 0x8fb40020, 0x8fb3001c, 0x8fb20018,
|
||||
0x8fb10014, 0x8fb00010, 0x03e00008, 0x27bd0030, 0x27bdffd0, 0xafbf0028,
|
||||
0xafb30024, 0xafb20020, 0xafb1001c, 0xafb00018, 0x8f725c9c, 0x3c0200ff,
|
||||
0x3442fff8, 0x3c070800, 0x24e71bb4, 0x02428824, 0x9623000e, 0x8ce20000,
|
||||
0x00431021, 0xace20000, 0x8e220010, 0x30420020, 0x14400011, 0x00809821,
|
||||
0x0e00063b, 0x02202021, 0x3c02c000, 0x02421825, 0xaf635c9c, 0x8f625c90,
|
||||
0x30420002, 0x1040011e, 0x00000000, 0xaf635c9c, 0x8f625c90, 0x30420002,
|
||||
0x10400119, 0x00000000, 0x0a00020d, 0x00000000, 0x8e240008, 0x8e230014,
|
||||
0x00041402, 0x000231c0, 0x00031502, 0x304201ff, 0x2442ffff, 0x3042007f,
|
||||
0x00031942, 0x30637800, 0x00021100, 0x24424000, 0x00624821, 0x9522000a,
|
||||
0x3084ffff, 0x30420008, 0x104000b0, 0x000429c0, 0x3c020800, 0x8c422400,
|
||||
0x14400024, 0x24c50008, 0x94c20014, 0x3c010800, 0xa42223d0, 0x8cc40010,
|
||||
0x00041402, 0x3c010800, 0xa42223d2, 0x3c010800, 0xa42423d4, 0x94c2000e,
|
||||
0x3083ffff, 0x00431023, 0x3c010800, 0xac222408, 0x94c2001a, 0x3c010800,
|
||||
0xac262400, 0x3c010800, 0xac322404, 0x3c010800, 0xac2223fc, 0x3c02c000,
|
||||
0x02421825, 0xaf635c9c, 0x8f625c90, 0x30420002, 0x104000e5, 0x00000000,
|
||||
0xaf635c9c, 0x8f625c90, 0x30420002, 0x104000e0, 0x00000000, 0x0a000246,
|
||||
0x00000000, 0x94c2000e, 0x3c030800, 0x946323d4, 0x00434023, 0x3103ffff,
|
||||
0x2c620008, 0x1040001c, 0x00000000, 0x94c20014, 0x24420028, 0x00a22821,
|
||||
0x00031042, 0x1840000b, 0x00002021, 0x24e60848, 0x00403821, 0x94a30000,
|
||||
0x8cc20000, 0x24840001, 0x00431021, 0xacc20000, 0x0087102a, 0x1440fff9,
|
||||
0x24a50002, 0x31020001, 0x1040001f, 0x3c024000, 0x3c040800, 0x248423fc,
|
||||
0xa0a00001, 0x94a30000, 0x8c820000, 0x00431021, 0x0a000285, 0xac820000,
|
||||
0x8f626800, 0x3c030010, 0x00431024, 0x10400009, 0x00000000, 0x94c2001a,
|
||||
0x3c030800, 0x8c6323fc, 0x00431021, 0x3c010800, 0xac2223fc, 0x0a000286,
|
||||
0x3c024000, 0x94c2001a, 0x94c4001c, 0x3c030800, 0x8c6323fc, 0x00441023,
|
||||
0x00621821, 0x3c010800, 0xac2323fc, 0x3c024000, 0x02421825, 0xaf635c9c,
|
||||
0x8f625c90, 0x30420002, 0x1440fffc, 0x00000000, 0x9522000a, 0x30420010,
|
||||
0x1040009b, 0x00000000, 0x3c030800, 0x946323d4, 0x3c070800, 0x24e72400,
|
||||
0x8ce40000, 0x8f626800, 0x24630030, 0x00832821, 0x3c030010, 0x00431024,
|
||||
0x1440000a, 0x00000000, 0x94a20004, 0x3c040800, 0x8c842408, 0x3c030800,
|
||||
0x8c6323fc, 0x00441023, 0x00621821, 0x3c010800, 0xac2323fc, 0x3c040800,
|
||||
0x8c8423fc, 0x00041c02, 0x3082ffff, 0x00622021, 0x00041402, 0x00822021,
|
||||
0x00041027, 0xa4a20006, 0x3c030800, 0x8c632404, 0x3c0200ff, 0x3442fff8,
|
||||
0x00628824, 0x96220008, 0x24050001, 0x24034000, 0x000231c0, 0x00801021,
|
||||
0xa4c2001a, 0xa4c0001c, 0xace00000, 0x3c010800, 0xac251b60, 0xaf635cb8,
|
||||
0x8f625cb0, 0x30420002, 0x10400003, 0x00000000, 0x3c010800, 0xac201b60,
|
||||
0x8e220008, 0xaf625cb8, 0x8f625cb0, 0x30420002, 0x10400003, 0x00000000,
|
||||
0x3c010800, 0xac201b60, 0x3c020800, 0x8c421b60, 0x1040ffec, 0x00000000,
|
||||
0x3c040800, 0x0e00063b, 0x8c842404, 0x0a00032a, 0x00000000, 0x3c030800,
|
||||
0x90631b98, 0x24020002, 0x14620003, 0x3c034b65, 0x0a0002e1, 0x00008021,
|
||||
0x8e22001c, 0x34637654, 0x10430002, 0x24100002, 0x24100001, 0x00c02021,
|
||||
0x0e000350, 0x02003021, 0x24020003, 0x3c010800, 0xa0221b98, 0x24020002,
|
||||
0x1202000a, 0x24020001, 0x3c030800, 0x8c6323f0, 0x10620006, 0x00000000,
|
||||
0x3c020800, 0x944223d8, 0x00021400, 0x0a00031f, 0xae220014, 0x3c040800,
|
||||
0x248423da, 0x94820000, 0x00021400, 0xae220014, 0x3c020800, 0x8c421bbc,
|
||||
0x3c03c000, 0x3c010800, 0xa0201b98, 0x00431025, 0xaf625c5c, 0x8f625c50,
|
||||
0x30420002, 0x10400009, 0x00000000, 0x2484f7e2, 0x8c820000, 0x00431025,
|
||||
0xaf625c5c, 0x8f625c50, 0x30420002, 0x1440fffa, 0x00000000, 0x3c020800,
|
||||
0x24421b84, 0x8c430000, 0x24630001, 0xac430000, 0x8f630c14, 0x3063000f,
|
||||
0x2c620002, 0x1440000c, 0x3c024000, 0x8f630c14, 0x3c020800, 0x8c421b40,
|
||||
0x3063000f, 0x24420001, 0x3c010800, 0xac221b40, 0x2c620002, 0x1040fff7,
|
||||
0x00000000, 0x3c024000, 0x02421825, 0xaf635c9c, 0x8f625c90, 0x30420002,
|
||||
0x1440fffc, 0x00000000, 0x12600003, 0x00000000, 0x0e0004c0, 0x00000000,
|
||||
0x8fbf0028, 0x8fb30024, 0x8fb20020, 0x8fb1001c, 0x8fb00018, 0x03e00008,
|
||||
0x27bd0030, 0x8f634450, 0x3c040800, 0x24841b88, 0x8c820000, 0x00031c02,
|
||||
0x0043102b, 0x14400007, 0x3c038000, 0x8c840004, 0x8f624450, 0x00021c02,
|
||||
0x0083102b, 0x1040fffc, 0x3c038000, 0xaf634444, 0x8f624444, 0x00431024,
|
||||
0x1440fffd, 0x00000000, 0x8f624448, 0x03e00008, 0x3042ffff, 0x3c024000,
|
||||
0x00822025, 0xaf645c38, 0x8f625c30, 0x30420002, 0x1440fffc, 0x00000000,
|
||||
0x03e00008, 0x00000000, 0x27bdffe0, 0x00805821, 0x14c00011, 0x256e0008,
|
||||
0x3c020800, 0x8c4223f4, 0x10400007, 0x24020016, 0x3c010800, 0xa42223d2,
|
||||
0x2402002a, 0x3c010800, 0x0a000364, 0xa42223d4, 0x8d670010, 0x00071402,
|
||||
0x3c010800, 0xa42223d2, 0x3c010800, 0xa42723d4, 0x3c040800, 0x948423d4,
|
||||
0x3c030800, 0x946323d2, 0x95cf0006, 0x3c020800, 0x944223d0, 0x00832023,
|
||||
0x01e2c023, 0x3065ffff, 0x24a20028, 0x01c24821, 0x3082ffff, 0x14c0001a,
|
||||
0x01226021, 0x9582000c, 0x3042003f, 0x3c010800, 0xa42223d6, 0x95820004,
|
||||
0x95830006, 0x3c010800, 0xac2023e4, 0x3c010800, 0xac2023e8, 0x00021400,
|
||||
0x00431025, 0x3c010800, 0xac221bc0, 0x95220004, 0x3c010800, 0xa4221bc4,
|
||||
0x95230002, 0x01e51023, 0x0043102a, 0x10400010, 0x24020001, 0x3c010800,
|
||||
0x0a000398, 0xac2223f8, 0x3c030800, 0x8c6323e8, 0x3c020800, 0x94421bc4,
|
||||
0x00431021, 0xa5220004, 0x3c020800, 0x94421bc0, 0xa5820004, 0x3c020800,
|
||||
0x8c421bc0, 0xa5820006, 0x3c020800, 0x8c4223f0, 0x3c0d0800, 0x8dad23e4,
|
||||
0x3c0a0800, 0x144000e5, 0x8d4a23e8, 0x3c020800, 0x94421bc4, 0x004a1821,
|
||||
0x3063ffff, 0x0062182b, 0x24020002, 0x10c2000d, 0x01435023, 0x3c020800,
|
||||
0x944223d6, 0x30420009, 0x10400008, 0x00000000, 0x9582000c, 0x3042fff6,
|
||||
0xa582000c, 0x3c020800, 0x944223d6, 0x30420009, 0x01a26823, 0x3c020800,
|
||||
0x8c4223f8, 0x1040004a, 0x01203821, 0x3c020800, 0x944223d2, 0x00004021,
|
||||
0xa520000a, 0x01e21023, 0xa5220002, 0x3082ffff, 0x00021042, 0x18400008,
|
||||
0x00003021, 0x00401821, 0x94e20000, 0x25080001, 0x00c23021, 0x0103102a,
|
||||
0x1440fffb, 0x24e70002, 0x00061c02, 0x30c2ffff, 0x00623021, 0x00061402,
|
||||
0x00c23021, 0x00c02821, 0x00061027, 0xa522000a, 0x00003021, 0x2527000c,
|
||||
0x00004021, 0x94e20000, 0x25080001, 0x00c23021, 0x2d020004, 0x1440fffb,
|
||||
0x24e70002, 0x95220002, 0x00004021, 0x91230009, 0x00442023, 0x01803821,
|
||||
0x3082ffff, 0xa4e00010, 0x00621821, 0x00021042, 0x18400010, 0x00c33021,
|
||||
0x00404821, 0x94e20000, 0x24e70002, 0x00c23021, 0x30e2007f, 0x14400006,
|
||||
0x25080001, 0x8d630000, 0x3c02007f, 0x3442ff80, 0x00625824, 0x25670008,
|
||||
0x0109102a, 0x1440fff3, 0x00000000, 0x30820001, 0x10400005, 0x00061c02,
|
||||
0xa0e00001, 0x94e20000, 0x00c23021, 0x00061c02, 0x30c2ffff, 0x00623021,
|
||||
0x00061402, 0x00c23021, 0x0a00047d, 0x30c6ffff, 0x24020002, 0x14c20081,
|
||||
0x00000000, 0x3c020800, 0x8c42240c, 0x14400007, 0x00000000, 0x3c020800,
|
||||
0x944223d2, 0x95230002, 0x01e21023, 0x10620077, 0x00000000, 0x3c020800,
|
||||
0x944223d2, 0x01e21023, 0xa5220002, 0x3c020800, 0x8c42240c, 0x1040001a,
|
||||
0x31e3ffff, 0x8dc70010, 0x3c020800, 0x94421b96, 0x00e04021, 0x00072c02,
|
||||
0x00aa2021, 0x00431023, 0x00823823, 0x00072402, 0x30e2ffff, 0x00823821,
|
||||
0x00071027, 0xa522000a, 0x3102ffff, 0x3c040800, 0x948423d4, 0x00453023,
|
||||
0x00e02821, 0x00641823, 0x006d1821, 0x00c33021, 0x00061c02, 0x30c2ffff,
|
||||
0x0a00047d, 0x00623021, 0x01203821, 0x00004021, 0x3082ffff, 0x00021042,
|
||||
0x18400008, 0x00003021, 0x00401821, 0x94e20000, 0x25080001, 0x00c23021,
|
||||
0x0103102a, 0x1440fffb, 0x24e70002, 0x00061c02, 0x30c2ffff, 0x00623021,
|
||||
0x00061402, 0x00c23021, 0x00c02821, 0x00061027, 0xa522000a, 0x00003021,
|
||||
0x2527000c, 0x00004021, 0x94e20000, 0x25080001, 0x00c23021, 0x2d020004,
|
||||
0x1440fffb, 0x24e70002, 0x95220002, 0x00004021, 0x91230009, 0x00442023,
|
||||
0x01803821, 0x3082ffff, 0xa4e00010, 0x3c040800, 0x948423d4, 0x00621821,
|
||||
0x00c33021, 0x00061c02, 0x30c2ffff, 0x00623021, 0x00061c02, 0x3c020800,
|
||||
0x944223d0, 0x00c34821, 0x00441023, 0x00021fc2, 0x00431021, 0x00021043,
|
||||
0x18400010, 0x00003021, 0x00402021, 0x94e20000, 0x24e70002, 0x00c23021,
|
||||
0x30e2007f, 0x14400006, 0x25080001, 0x8d630000, 0x3c02007f, 0x3442ff80,
|
||||
0x00625824, 0x25670008, 0x0104102a, 0x1440fff3, 0x00000000, 0x3c020800,
|
||||
0x944223ec, 0x00c23021, 0x3122ffff, 0x00c23021, 0x00061c02, 0x30c2ffff,
|
||||
0x00623021, 0x00061402, 0x00c23021, 0x00c04021, 0x00061027, 0xa5820010,
|
||||
0xadc00014, 0x0a00049d, 0xadc00000, 0x8dc70010, 0x00e04021, 0x11400007,
|
||||
0x00072c02, 0x00aa3021, 0x00061402, 0x30c3ffff, 0x00433021, 0x00061402,
|
||||
0x00c22821, 0x00051027, 0xa522000a, 0x3c030800, 0x946323d4, 0x3102ffff,
|
||||
0x01e21021, 0x00433023, 0x00cd3021, 0x00061c02, 0x30c2ffff, 0x00623021,
|
||||
0x00061402, 0x00c23021, 0x00c04021, 0x00061027, 0xa5820010, 0x3102ffff,
|
||||
0x00051c00, 0x00431025, 0xadc20010, 0x3c020800, 0x8c4223f4, 0x10400005,
|
||||
0x2de205eb, 0x14400002, 0x25e2fff2, 0x34028870, 0xa5c20034, 0x3c030800,
|
||||
0x246323e8, 0x8c620000, 0x24420001, 0xac620000, 0x3c040800, 0x8c8423e4,
|
||||
0x3c020800, 0x8c421bc0, 0x3303ffff, 0x00832021, 0x00431821, 0x0062102b,
|
||||
0x3c010800, 0xac2423e4, 0x10400003, 0x2482ffff, 0x3c010800, 0xac2223e4,
|
||||
0x3c010800, 0xac231bc0, 0x03e00008, 0x27bd0020, 0x27bdffb8, 0x3c050800,
|
||||
0x24a51b96, 0xafbf0044, 0xafbe0040, 0xafb7003c, 0xafb60038, 0xafb50034,
|
||||
0xafb40030, 0xafb3002c, 0xafb20028, 0xafb10024, 0xafb00020, 0x94a90000,
|
||||
0x3c020800, 0x944223d0, 0x3c030800, 0x8c631bb0, 0x3c040800, 0x8c841bac,
|
||||
0x01221023, 0x0064182a, 0xa7a9001e, 0x106000be, 0xa7a20016, 0x24be0022,
|
||||
0x97b6001e, 0x24b3001a, 0x24b70016, 0x8fc20000, 0x14400008, 0x00000000,
|
||||
0x8fc2fff8, 0x97a30016, 0x8fc4fff4, 0x00431021, 0x0082202a, 0x148000b0,
|
||||
0x00000000, 0x97d50818, 0x32a2ffff, 0x104000a3, 0x00009021, 0x0040a021,
|
||||
0x00008821, 0x0e000625, 0x00000000, 0x00403021, 0x14c00007, 0x00000000,
|
||||
0x3c020800, 0x8c4223dc, 0x24420001, 0x3c010800, 0x0a000596, 0xac2223dc,
|
||||
0x3c100800, 0x02118021, 0x8e101bc8, 0x9608000a, 0x31020040, 0x10400005,
|
||||
0x2407180c, 0x8e02000c, 0x2407188c, 0x00021400, 0xacc20018, 0x31020080,
|
||||
0x54400001, 0x34e70010, 0x3c020800, 0x00511021, 0x8c421bd0, 0x3c030800,
|
||||
0x00711821, 0x8c631bd4, 0x00021500, 0x00031c00, 0x00431025, 0xacc20014,
|
||||
0x96040008, 0x3242ffff, 0x00821021, 0x0282102a, 0x14400002, 0x02b22823,
|
||||
0x00802821, 0x8e020000, 0x02459021, 0xacc20000, 0x8e020004, 0x00c02021,
|
||||
0x26310010, 0xac820004, 0x30e2ffff, 0xac800008, 0xa485000e, 0xac820010,
|
||||
0x24020305, 0x0e0005a2, 0xa482000c, 0x3242ffff, 0x0054102b, 0x1440ffc5,
|
||||
0x3242ffff, 0x0a00058e, 0x00000000, 0x8e620000, 0x8e63fffc, 0x0043102a,
|
||||
0x10400067, 0x00000000, 0x8e62fff0, 0x00028900, 0x3c100800, 0x02118021,
|
||||
0x0e000625, 0x8e101bc8, 0x00403021, 0x14c00005, 0x00000000, 0x8e62082c,
|
||||
0x24420001, 0x0a000596, 0xae62082c, 0x9608000a, 0x31020040, 0x10400005,
|
||||
0x2407180c, 0x8e02000c, 0x2407188c, 0x00021400, 0xacc20018, 0x3c020800,
|
||||
0x00511021, 0x8c421bd0, 0x3c030800, 0x00711821, 0x8c631bd4, 0x00021500,
|
||||
0x00031c00, 0x00431025, 0xacc20014, 0x8e63fff4, 0x96020008, 0x00432023,
|
||||
0x3242ffff, 0x3083ffff, 0x00431021, 0x02c2102a, 0x10400003, 0x00802821,
|
||||
0x97a9001e, 0x01322823, 0x8e620000, 0x30a4ffff, 0x00441021, 0xae620000,
|
||||
0xa4c5000e, 0x8e020000, 0xacc20000, 0x8e020004, 0x8e63fff4, 0x00431021,
|
||||
0xacc20004, 0x8e63fff4, 0x96020008, 0x00641821, 0x0062102a, 0x14400006,
|
||||
0x02459021, 0x8e62fff0, 0xae60fff4, 0x24420001, 0x0a000571, 0xae62fff0,
|
||||
0xae63fff4, 0xacc00008, 0x3242ffff, 0x10560003, 0x31020004, 0x10400006,
|
||||
0x24020305, 0x31020080, 0x54400001, 0x34e70010, 0x34e70020, 0x24020905,
|
||||
0xa4c2000c, 0x8ee30000, 0x8ee20004, 0x14620007, 0x3c02b49a, 0x8ee20860,
|
||||
0x54400001, 0x34e70400, 0x3c024b65, 0x0a000588, 0x34427654, 0x344289ab,
|
||||
0xacc2001c, 0x30e2ffff, 0xacc20010, 0x0e0005a2, 0x00c02021, 0x3242ffff,
|
||||
0x0056102b, 0x1440ff9b, 0x00000000, 0x8e620000, 0x8e63fffc, 0x0043102a,
|
||||
0x1440ff48, 0x00000000, 0x8fbf0044, 0x8fbe0040, 0x8fb7003c, 0x8fb60038,
|
||||
0x8fb50034, 0x8fb40030, 0x8fb3002c, 0x8fb20028, 0x8fb10024, 0x8fb00020,
|
||||
0x03e00008, 0x27bd0048, 0x27bdffe8, 0xafbf0014, 0xafb00010, 0x8f624450,
|
||||
0x8f634410, 0x0a0005b1, 0x00808021, 0x8f626820, 0x30422000, 0x10400003,
|
||||
0x00000000, 0x0e0001f0, 0x00002021, 0x8f624450, 0x8f634410, 0x3042ffff,
|
||||
0x0043102b, 0x1440fff5, 0x00000000, 0x8f630c14, 0x3063000f, 0x2c620002,
|
||||
0x1440000b, 0x00000000, 0x8f630c14, 0x3c020800, 0x8c421b40, 0x3063000f,
|
||||
0x24420001, 0x3c010800, 0xac221b40, 0x2c620002, 0x1040fff7, 0x00000000,
|
||||
0xaf705c18, 0x8f625c10, 0x30420002, 0x10400009, 0x00000000, 0x8f626820,
|
||||
0x30422000, 0x1040fff8, 0x00000000, 0x0e0001f0, 0x00002021, 0x0a0005c4,
|
||||
0x00000000, 0x8fbf0014, 0x8fb00010, 0x03e00008, 0x27bd0018, 0x00000000,
|
||||
0x00000000, 0x00000000, 0x27bdffe8, 0x3c1bc000, 0xafbf0014, 0xafb00010,
|
||||
0xaf60680c, 0x8f626804, 0x34420082, 0xaf626804, 0x8f634000, 0x24020b50,
|
||||
0x3c010800, 0xac221b54, 0x24020b78, 0x3c010800, 0xac221b64, 0x34630002,
|
||||
0xaf634000, 0x0e000605, 0x00808021, 0x3c010800, 0xa0221b68, 0x304200ff,
|
||||
0x24030002, 0x14430005, 0x00000000, 0x3c020800, 0x8c421b54, 0x0a0005f8,
|
||||
0xac5000c0, 0x3c020800, 0x8c421b54, 0xac5000bc, 0x8f624434, 0x8f634438,
|
||||
0x8f644410, 0x3c010800, 0xac221b5c, 0x3c010800, 0xac231b6c, 0x3c010800,
|
||||
0xac241b58, 0x8fbf0014, 0x8fb00010, 0x03e00008, 0x27bd0018, 0x3c040800,
|
||||
0x8c870000, 0x3c03aa55, 0x3463aa55, 0x3c06c003, 0xac830000, 0x8cc20000,
|
||||
0x14430007, 0x24050002, 0x3c0355aa, 0x346355aa, 0xac830000, 0x8cc20000,
|
||||
0x50430001, 0x24050001, 0x3c020800, 0xac470000, 0x03e00008, 0x00a01021,
|
||||
0x27bdfff8, 0x18800009, 0x00002821, 0x8f63680c, 0x8f62680c, 0x1043fffe,
|
||||
0x00000000, 0x24a50001, 0x00a4102a, 0x1440fff9, 0x00000000, 0x03e00008,
|
||||
0x27bd0008, 0x8f634450, 0x3c020800, 0x8c421b5c, 0x00031c02, 0x0043102b,
|
||||
0x14400008, 0x3c038000, 0x3c040800, 0x8c841b6c, 0x8f624450, 0x00021c02,
|
||||
0x0083102b, 0x1040fffc, 0x3c038000, 0xaf634444, 0x8f624444, 0x00431024,
|
||||
0x1440fffd, 0x00000000, 0x8f624448, 0x03e00008, 0x3042ffff, 0x3082ffff,
|
||||
0x2442e000, 0x2c422001, 0x14400003, 0x3c024000, 0x0a000648, 0x2402ffff,
|
||||
0x00822025, 0xaf645c38, 0x8f625c30, 0x30420002, 0x1440fffc, 0x00001021,
|
||||
0x03e00008, 0x00000000, 0x8f624450, 0x3c030800, 0x8c631b58, 0x0a000651,
|
||||
0x3042ffff, 0x8f624450, 0x3042ffff, 0x0043102b, 0x1440fffc, 0x00000000,
|
||||
0x03e00008, 0x00000000, 0x27bdffe0, 0x00802821, 0x3c040800, 0x24841af0,
|
||||
0x00003021, 0x00003821, 0xafbf0018, 0xafa00010, 0x0e00067c, 0xafa00014,
|
||||
0x0a000660, 0x00000000, 0x8fbf0018, 0x03e00008, 0x27bd0020, 0x00000000,
|
||||
0x00000000, 0x00000000, 0x3c020800, 0x34423000, 0x3c030800, 0x34633000,
|
||||
0x3c040800, 0x348437ff, 0x3c010800, 0xac221b74, 0x24020040, 0x3c010800,
|
||||
0xac221b78, 0x3c010800, 0xac201b70, 0xac600000, 0x24630004, 0x0083102b,
|
||||
0x5040fffd, 0xac600000, 0x03e00008, 0x00000000, 0x00804821, 0x8faa0010,
|
||||
0x3c020800, 0x8c421b70, 0x3c040800, 0x8c841b78, 0x8fab0014, 0x24430001,
|
||||
0x0044102b, 0x3c010800, 0xac231b70, 0x14400003, 0x00004021, 0x3c010800,
|
||||
0xac201b70, 0x3c020800, 0x8c421b70, 0x3c030800, 0x8c631b74, 0x91240000,
|
||||
0x00021140, 0x00431021, 0x00481021, 0x25080001, 0xa0440000, 0x29020008,
|
||||
0x1440fff4, 0x25290001, 0x3c020800, 0x8c421b70, 0x3c030800, 0x8c631b74,
|
||||
0x8f64680c, 0x00021140, 0x00431021, 0xac440008, 0xac45000c, 0xac460010,
|
||||
0xac470014, 0xac4a0018, 0x03e00008, 0xac4b001c, 0x00000000, 0x00000000,
|
||||
};
|
||||
|
||||
static const u32 tg3TsoFwRodata[] = {
|
||||
0x4d61696e, 0x43707542, 0x00000000, 0x4d61696e, 0x43707541, 0x00000000,
|
||||
0x00000000, 0x00000000, 0x73746b6f, 0x66666c64, 0x496e0000, 0x73746b6f,
|
||||
0x66662a2a, 0x00000000, 0x53774576, 0x656e7430, 0x00000000, 0x00000000,
|
||||
0x00000000, 0x00000000, 0x66617461, 0x6c457272, 0x00000000, 0x00000000,
|
||||
0x00000000,
|
||||
};
|
||||
|
||||
static const u32 tg3TsoFwData[] = {
|
||||
0x00000000, 0x73746b6f, 0x66666c64, 0x5f76312e, 0x362e3000, 0x00000000,
|
||||
0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
|
||||
0x00000000,
|
||||
};
|
||||
|
||||
/* 5705 needs a special version of the TSO firmware. */
|
||||
#define TG3_TSO5_FW_RELEASE_MAJOR 0x1
|
||||
#define TG3_TSO5_FW_RELASE_MINOR 0x2
|
||||
#define TG3_TSO5_FW_RELEASE_FIX 0x0
|
||||
#define TG3_TSO5_FW_START_ADDR 0x00010000
|
||||
#define TG3_TSO5_FW_TEXT_ADDR 0x00010000
|
||||
#define TG3_TSO5_FW_TEXT_LEN 0xe90
|
||||
#define TG3_TSO5_FW_RODATA_ADDR 0x00010e90
|
||||
#define TG3_TSO5_FW_RODATA_LEN 0x50
|
||||
#define TG3_TSO5_FW_DATA_ADDR 0x00010f00
|
||||
#define TG3_TSO5_FW_DATA_LEN 0x20
|
||||
#define TG3_TSO5_FW_SBSS_ADDR 0x00010f20
|
||||
#define TG3_TSO5_FW_SBSS_LEN 0x28
|
||||
#define TG3_TSO5_FW_BSS_ADDR 0x00010f50
|
||||
#define TG3_TSO5_FW_BSS_LEN 0x88
|
||||
|
||||
static const u32 tg3Tso5FwText[(TG3_TSO5_FW_TEXT_LEN / 4) + 1] = {
|
||||
0x0c004003, 0x00000000, 0x00010f04, 0x00000000, 0x10000003, 0x00000000,
|
||||
0x0000000d, 0x0000000d, 0x3c1d0001, 0x37bde000, 0x03a0f021, 0x3c100001,
|
||||
0x26100000, 0x0c004010, 0x00000000, 0x0000000d, 0x27bdffe0, 0x3c04fefe,
|
||||
0xafbf0018, 0x0c0042e8, 0x34840002, 0x0c004364, 0x00000000, 0x3c030001,
|
||||
0x90630f34, 0x24020002, 0x3c040001, 0x24840e9c, 0x14620003, 0x24050001,
|
||||
0x3c040001, 0x24840e90, 0x24060002, 0x00003821, 0xafa00010, 0x0c004378,
|
||||
0xafa00014, 0x0c00402c, 0x00000000, 0x8fbf0018, 0x03e00008, 0x27bd0020,
|
||||
0x00000000, 0x00000000, 0x27bdffe0, 0xafbf001c, 0xafb20018, 0xafb10014,
|
||||
0x0c0042d4, 0xafb00010, 0x3c128000, 0x24110001, 0x8f706810, 0x32020400,
|
||||
0x10400007, 0x00000000, 0x8f641008, 0x00921024, 0x14400003, 0x00000000,
|
||||
0x0c004064, 0x00000000, 0x3c020001, 0x90420f56, 0x10510003, 0x32020200,
|
||||
0x1040fff1, 0x00000000, 0x0c0041b4, 0x00000000, 0x08004034, 0x00000000,
|
||||
0x8fbf001c, 0x8fb20018, 0x8fb10014, 0x8fb00010, 0x03e00008, 0x27bd0020,
|
||||
0x27bdffe0, 0x3c040001, 0x24840eb0, 0x00002821, 0x00003021, 0x00003821,
|
||||
0xafbf0018, 0xafa00010, 0x0c004378, 0xafa00014, 0x0000d021, 0x24020130,
|
||||
0xaf625000, 0x3c010001, 0xa4200f50, 0x3c010001, 0xa0200f57, 0x8fbf0018,
|
||||
0x03e00008, 0x27bd0020, 0x00000000, 0x00000000, 0x3c030001, 0x24630f60,
|
||||
0x90620000, 0x27bdfff0, 0x14400003, 0x0080c021, 0x08004073, 0x00004821,
|
||||
0x3c022000, 0x03021024, 0x10400003, 0x24090002, 0x08004073, 0xa0600000,
|
||||
0x24090001, 0x00181040, 0x30431f80, 0x346f8008, 0x1520004b, 0x25eb0028,
|
||||
0x3c040001, 0x00832021, 0x8c848010, 0x3c050001, 0x24a50f7a, 0x00041402,
|
||||
0xa0a20000, 0x3c010001, 0xa0240f7b, 0x3c020001, 0x00431021, 0x94428014,
|
||||
0x3c010001, 0xa0220f7c, 0x3c0c0001, 0x01836021, 0x8d8c8018, 0x304200ff,
|
||||
0x24420008, 0x000220c3, 0x24020001, 0x3c010001, 0xa0220f60, 0x0124102b,
|
||||
0x1040000c, 0x00003821, 0x24a6000e, 0x01602821, 0x8ca20000, 0x8ca30004,
|
||||
0x24a50008, 0x24e70001, 0xacc20000, 0xacc30004, 0x00e4102b, 0x1440fff8,
|
||||
0x24c60008, 0x00003821, 0x3c080001, 0x25080f7b, 0x91060000, 0x3c020001,
|
||||
0x90420f7c, 0x2503000d, 0x00c32821, 0x00461023, 0x00021fc2, 0x00431021,
|
||||
0x00021043, 0x1840000c, 0x00002021, 0x91020001, 0x00461023, 0x00021fc2,
|
||||
0x00431021, 0x00021843, 0x94a20000, 0x24e70001, 0x00822021, 0x00e3102a,
|
||||
0x1440fffb, 0x24a50002, 0x00041c02, 0x3082ffff, 0x00622021, 0x00041402,
|
||||
0x00822021, 0x3c02ffff, 0x01821024, 0x3083ffff, 0x00431025, 0x3c010001,
|
||||
0x080040fa, 0xac220f80, 0x3c050001, 0x24a50f7c, 0x90a20000, 0x3c0c0001,
|
||||
0x01836021, 0x8d8c8018, 0x000220c2, 0x1080000e, 0x00003821, 0x01603021,
|
||||
0x24a5000c, 0x8ca20000, 0x8ca30004, 0x24a50008, 0x24e70001, 0xacc20000,
|
||||
0xacc30004, 0x00e4102b, 0x1440fff8, 0x24c60008, 0x3c050001, 0x24a50f7c,
|
||||
0x90a20000, 0x30430007, 0x24020004, 0x10620011, 0x28620005, 0x10400005,
|
||||
0x24020002, 0x10620008, 0x000710c0, 0x080040fa, 0x00000000, 0x24020006,
|
||||
0x1062000e, 0x000710c0, 0x080040fa, 0x00000000, 0x00a21821, 0x9463000c,
|
||||
0x004b1021, 0x080040fa, 0xa4430000, 0x000710c0, 0x00a21821, 0x8c63000c,
|
||||
0x004b1021, 0x080040fa, 0xac430000, 0x00a21821, 0x8c63000c, 0x004b2021,
|
||||
0x00a21021, 0xac830000, 0x94420010, 0xa4820004, 0x95e70006, 0x3c020001,
|
||||
0x90420f7c, 0x3c030001, 0x90630f7a, 0x00e2c823, 0x3c020001, 0x90420f7b,
|
||||
0x24630028, 0x01e34021, 0x24420028, 0x15200012, 0x01e23021, 0x94c2000c,
|
||||
0x3c010001, 0xa4220f78, 0x94c20004, 0x94c30006, 0x3c010001, 0xa4200f76,
|
||||
0x3c010001, 0xa4200f72, 0x00021400, 0x00431025, 0x3c010001, 0xac220f6c,
|
||||
0x95020004, 0x3c010001, 0x08004124, 0xa4220f70, 0x3c020001, 0x94420f70,
|
||||
0x3c030001, 0x94630f72, 0x00431021, 0xa5020004, 0x3c020001, 0x94420f6c,
|
||||
0xa4c20004, 0x3c020001, 0x8c420f6c, 0xa4c20006, 0x3c040001, 0x94840f72,
|
||||
0x3c020001, 0x94420f70, 0x3c0a0001, 0x954a0f76, 0x00441821, 0x3063ffff,
|
||||
0x0062182a, 0x24020002, 0x1122000b, 0x00832023, 0x3c030001, 0x94630f78,
|
||||
0x30620009, 0x10400006, 0x3062fff6, 0xa4c2000c, 0x3c020001, 0x94420f78,
|
||||
0x30420009, 0x01425023, 0x24020001, 0x1122001b, 0x29220002, 0x50400005,
|
||||
0x24020002, 0x11200007, 0x31a2ffff, 0x08004197, 0x00000000, 0x1122001d,
|
||||
0x24020016, 0x08004197, 0x31a2ffff, 0x3c0e0001, 0x95ce0f80, 0x10800005,
|
||||
0x01806821, 0x01c42021, 0x00041c02, 0x3082ffff, 0x00627021, 0x000e1027,
|
||||
0xa502000a, 0x3c030001, 0x90630f7b, 0x31a2ffff, 0x00e21021, 0x0800418d,
|
||||
0x00432023, 0x3c020001, 0x94420f80, 0x00442021, 0x00041c02, 0x3082ffff,
|
||||
0x00622021, 0x00807021, 0x00041027, 0x08004185, 0xa502000a, 0x3c050001,
|
||||
0x24a50f7a, 0x90a30000, 0x14620002, 0x24e2fff2, 0xa5e20034, 0x90a20000,
|
||||
0x00e21023, 0xa5020002, 0x3c030001, 0x94630f80, 0x3c020001, 0x94420f5a,
|
||||
0x30e5ffff, 0x00641821, 0x00451023, 0x00622023, 0x00041c02, 0x3082ffff,
|
||||
0x00622021, 0x00041027, 0xa502000a, 0x3c030001, 0x90630f7c, 0x24620001,
|
||||
0x14a20005, 0x00807021, 0x01631021, 0x90420000, 0x08004185, 0x00026200,
|
||||
0x24620002, 0x14a20003, 0x306200fe, 0x004b1021, 0x944c0000, 0x3c020001,
|
||||
0x94420f82, 0x3183ffff, 0x3c040001, 0x90840f7b, 0x00431021, 0x00e21021,
|
||||
0x00442023, 0x008a2021, 0x00041c02, 0x3082ffff, 0x00622021, 0x00041402,
|
||||
0x00822021, 0x00806821, 0x00041027, 0xa4c20010, 0x31a2ffff, 0x000e1c00,
|
||||
0x00431025, 0x3c040001, 0x24840f72, 0xade20010, 0x94820000, 0x3c050001,
|
||||
0x94a50f76, 0x3c030001, 0x8c630f6c, 0x24420001, 0x00b92821, 0xa4820000,
|
||||
0x3322ffff, 0x00622021, 0x0083182b, 0x3c010001, 0xa4250f76, 0x10600003,
|
||||
0x24a2ffff, 0x3c010001, 0xa4220f76, 0x3c024000, 0x03021025, 0x3c010001,
|
||||
0xac240f6c, 0xaf621008, 0x03e00008, 0x27bd0010, 0x3c030001, 0x90630f56,
|
||||
0x27bdffe8, 0x24020001, 0xafbf0014, 0x10620026, 0xafb00010, 0x8f620cf4,
|
||||
0x2442ffff, 0x3042007f, 0x00021100, 0x8c434000, 0x3c010001, 0xac230f64,
|
||||
0x8c434008, 0x24444000, 0x8c5c4004, 0x30620040, 0x14400002, 0x24020088,
|
||||
0x24020008, 0x3c010001, 0xa4220f68, 0x30620004, 0x10400005, 0x24020001,
|
||||
0x3c010001, 0xa0220f57, 0x080041d5, 0x00031402, 0x3c010001, 0xa0200f57,
|
||||
0x00031402, 0x3c010001, 0xa4220f54, 0x9483000c, 0x24020001, 0x3c010001,
|
||||
0xa4200f50, 0x3c010001, 0xa0220f56, 0x3c010001, 0xa4230f62, 0x24020001,
|
||||
0x1342001e, 0x00000000, 0x13400005, 0x24020003, 0x13420067, 0x00000000,
|
||||
0x080042cf, 0x00000000, 0x3c020001, 0x94420f62, 0x241a0001, 0x3c010001,
|
||||
0xa4200f5e, 0x3c010001, 0xa4200f52, 0x304407ff, 0x00021bc2, 0x00031823,
|
||||
0x3063003e, 0x34630036, 0x00021242, 0x3042003c, 0x00621821, 0x3c010001,
|
||||
0xa4240f58, 0x00832021, 0x24630030, 0x3c010001, 0xa4240f5a, 0x3c010001,
|
||||
0xa4230f5c, 0x3c060001, 0x24c60f52, 0x94c50000, 0x94c30002, 0x3c040001,
|
||||
0x94840f5a, 0x00651021, 0x0044102a, 0x10400013, 0x3c108000, 0x00a31021,
|
||||
0xa4c20000, 0x3c02a000, 0xaf620cf4, 0x3c010001, 0xa0200f56, 0x8f641008,
|
||||
0x00901024, 0x14400003, 0x00000000, 0x0c004064, 0x00000000, 0x8f620cf4,
|
||||
0x00501024, 0x104000b7, 0x00000000, 0x0800420f, 0x00000000, 0x3c030001,
|
||||
0x94630f50, 0x00851023, 0xa4c40000, 0x00621821, 0x3042ffff, 0x3c010001,
|
||||
0xa4230f50, 0xaf620ce8, 0x3c020001, 0x94420f68, 0x34420024, 0xaf620cec,
|
||||
0x94c30002, 0x3c020001, 0x94420f50, 0x14620012, 0x3c028000, 0x3c108000,
|
||||
0x3c02a000, 0xaf620cf4, 0x3c010001, 0xa0200f56, 0x8f641008, 0x00901024,
|
||||
0x14400003, 0x00000000, 0x0c004064, 0x00000000, 0x8f620cf4, 0x00501024,
|
||||
0x1440fff7, 0x00000000, 0x080042cf, 0x241a0003, 0xaf620cf4, 0x3c108000,
|
||||
0x8f641008, 0x00901024, 0x14400003, 0x00000000, 0x0c004064, 0x00000000,
|
||||
0x8f620cf4, 0x00501024, 0x1440fff7, 0x00000000, 0x080042cf, 0x241a0003,
|
||||
0x3c070001, 0x24e70f50, 0x94e20000, 0x03821021, 0xaf620ce0, 0x3c020001,
|
||||
0x8c420f64, 0xaf620ce4, 0x3c050001, 0x94a50f54, 0x94e30000, 0x3c040001,
|
||||
0x94840f58, 0x3c020001, 0x94420f5e, 0x00a32823, 0x00822023, 0x30a6ffff,
|
||||
0x3083ffff, 0x00c3102b, 0x14400043, 0x00000000, 0x3c020001, 0x94420f5c,
|
||||
0x00021400, 0x00621025, 0xaf620ce8, 0x94e20000, 0x3c030001, 0x94630f54,
|
||||
0x00441021, 0xa4e20000, 0x3042ffff, 0x14430021, 0x3c020008, 0x3c020001,
|
||||
0x90420f57, 0x10400006, 0x3c03000c, 0x3c020001, 0x94420f68, 0x34630624,
|
||||
0x0800427c, 0x0000d021, 0x3c020001, 0x94420f68, 0x3c030008, 0x34630624,
|
||||
0x00431025, 0xaf620cec, 0x3c108000, 0x3c02a000, 0xaf620cf4, 0x3c010001,
|
||||
0xa0200f56, 0x8f641008, 0x00901024, 0x14400003, 0x00000000, 0x0c004064,
|
||||
0x00000000, 0x8f620cf4, 0x00501024, 0x10400015, 0x00000000, 0x08004283,
|
||||
0x00000000, 0x3c030001, 0x94630f68, 0x34420624, 0x3c108000, 0x00621825,
|
||||
0x3c028000, 0xaf630cec, 0xaf620cf4, 0x8f641008, 0x00901024, 0x14400003,
|
||||
0x00000000, 0x0c004064, 0x00000000, 0x8f620cf4, 0x00501024, 0x1440fff7,
|
||||
0x00000000, 0x3c010001, 0x080042cf, 0xa4200f5e, 0x3c020001, 0x94420f5c,
|
||||
0x00021400, 0x00c21025, 0xaf620ce8, 0x3c020001, 0x90420f57, 0x10400009,
|
||||
0x3c03000c, 0x3c020001, 0x94420f68, 0x34630624, 0x0000d021, 0x00431025,
|
||||
0xaf620cec, 0x080042c1, 0x3c108000, 0x3c020001, 0x94420f68, 0x3c030008,
|
||||
0x34630604, 0x00431025, 0xaf620cec, 0x3c020001, 0x94420f5e, 0x00451021,
|
||||
0x3c010001, 0xa4220f5e, 0x3c108000, 0x3c02a000, 0xaf620cf4, 0x3c010001,
|
||||
0xa0200f56, 0x8f641008, 0x00901024, 0x14400003, 0x00000000, 0x0c004064,
|
||||
0x00000000, 0x8f620cf4, 0x00501024, 0x1440fff7, 0x00000000, 0x8fbf0014,
|
||||
0x8fb00010, 0x03e00008, 0x27bd0018, 0x00000000, 0x27bdffe0, 0x3c040001,
|
||||
0x24840ec0, 0x00002821, 0x00003021, 0x00003821, 0xafbf0018, 0xafa00010,
|
||||
0x0c004378, 0xafa00014, 0x0000d021, 0x24020130, 0xaf625000, 0x3c010001,
|
||||
0xa4200f50, 0x3c010001, 0xa0200f57, 0x8fbf0018, 0x03e00008, 0x27bd0020,
|
||||
0x27bdffe8, 0x3c1bc000, 0xafbf0014, 0xafb00010, 0xaf60680c, 0x8f626804,
|
||||
0x34420082, 0xaf626804, 0x8f634000, 0x24020b50, 0x3c010001, 0xac220f20,
|
||||
0x24020b78, 0x3c010001, 0xac220f30, 0x34630002, 0xaf634000, 0x0c004315,
|
||||
0x00808021, 0x3c010001, 0xa0220f34, 0x304200ff, 0x24030002, 0x14430005,
|
||||
0x00000000, 0x3c020001, 0x8c420f20, 0x08004308, 0xac5000c0, 0x3c020001,
|
||||
0x8c420f20, 0xac5000bc, 0x8f624434, 0x8f634438, 0x8f644410, 0x3c010001,
|
||||
0xac220f28, 0x3c010001, 0xac230f38, 0x3c010001, 0xac240f24, 0x8fbf0014,
|
||||
0x8fb00010, 0x03e00008, 0x27bd0018, 0x03e00008, 0x24020001, 0x27bdfff8,
|
||||
0x18800009, 0x00002821, 0x8f63680c, 0x8f62680c, 0x1043fffe, 0x00000000,
|
||||
0x24a50001, 0x00a4102a, 0x1440fff9, 0x00000000, 0x03e00008, 0x27bd0008,
|
||||
0x8f634450, 0x3c020001, 0x8c420f28, 0x00031c02, 0x0043102b, 0x14400008,
|
||||
0x3c038000, 0x3c040001, 0x8c840f38, 0x8f624450, 0x00021c02, 0x0083102b,
|
||||
0x1040fffc, 0x3c038000, 0xaf634444, 0x8f624444, 0x00431024, 0x1440fffd,
|
||||
0x00000000, 0x8f624448, 0x03e00008, 0x3042ffff, 0x3082ffff, 0x2442e000,
|
||||
0x2c422001, 0x14400003, 0x3c024000, 0x08004347, 0x2402ffff, 0x00822025,
|
||||
0xaf645c38, 0x8f625c30, 0x30420002, 0x1440fffc, 0x00001021, 0x03e00008,
|
||||
0x00000000, 0x8f624450, 0x3c030001, 0x8c630f24, 0x08004350, 0x3042ffff,
|
||||
0x8f624450, 0x3042ffff, 0x0043102b, 0x1440fffc, 0x00000000, 0x03e00008,
|
||||
0x00000000, 0x27bdffe0, 0x00802821, 0x3c040001, 0x24840ed0, 0x00003021,
|
||||
0x00003821, 0xafbf0018, 0xafa00010, 0x0c004378, 0xafa00014, 0x0800435f,
|
||||
0x00000000, 0x8fbf0018, 0x03e00008, 0x27bd0020, 0x3c020001, 0x3442d600,
|
||||
0x3c030001, 0x3463d600, 0x3c040001, 0x3484ddff, 0x3c010001, 0xac220f40,
|
||||
0x24020040, 0x3c010001, 0xac220f44, 0x3c010001, 0xac200f3c, 0xac600000,
|
||||
0x24630004, 0x0083102b, 0x5040fffd, 0xac600000, 0x03e00008, 0x00000000,
|
||||
0x00804821, 0x8faa0010, 0x3c020001, 0x8c420f3c, 0x3c040001, 0x8c840f44,
|
||||
0x8fab0014, 0x24430001, 0x0044102b, 0x3c010001, 0xac230f3c, 0x14400003,
|
||||
0x00004021, 0x3c010001, 0xac200f3c, 0x3c020001, 0x8c420f3c, 0x3c030001,
|
||||
0x8c630f40, 0x91240000, 0x00021140, 0x00431021, 0x00481021, 0x25080001,
|
||||
0xa0440000, 0x29020008, 0x1440fff4, 0x25290001, 0x3c020001, 0x8c420f3c,
|
||||
0x3c030001, 0x8c630f40, 0x8f64680c, 0x00021140, 0x00431021, 0xac440008,
|
||||
0xac45000c, 0xac460010, 0xac470014, 0xac4a0018, 0x03e00008, 0xac4b001c,
|
||||
0x00000000, 0x00000000, 0x00000000,
|
||||
};
|
||||
|
||||
static const u32 tg3Tso5FwRodata[(TG3_TSO5_FW_RODATA_LEN / 4) + 1] = {
|
||||
0x4d61696e, 0x43707542, 0x00000000, 0x4d61696e, 0x43707541, 0x00000000,
|
||||
0x00000000, 0x00000000, 0x73746b6f, 0x66666c64, 0x00000000, 0x00000000,
|
||||
0x73746b6f, 0x66666c64, 0x00000000, 0x00000000, 0x66617461, 0x6c457272,
|
||||
0x00000000, 0x00000000, 0x00000000,
|
||||
};
|
||||
|
||||
static const u32 tg3Tso5FwData[(TG3_TSO5_FW_DATA_LEN / 4) + 1] = {
|
||||
0x00000000, 0x73746b6f, 0x66666c64, 0x5f76312e, 0x322e3000, 0x00000000,
|
||||
0x00000000, 0x00000000, 0x00000000,
|
||||
};
|
||||
|
||||
/* tp->lock is held. */
|
||||
static int tg3_load_tso_firmware(struct tg3 *tp)
|
||||
{
|
||||
struct fw_info info;
|
||||
const __be32 *fw_data;
|
||||
unsigned long cpu_base, cpu_scratch_base, cpu_scratch_size;
|
||||
int err, i;
|
||||
|
||||
if (tp->tg3_flags2 & TG3_FLG2_HW_TSO)
|
||||
return 0;
|
||||
|
||||
fw_data = (void *)tp->fw->data;
|
||||
|
||||
/* Firmware blob starts with version numbers, followed by
|
||||
start address and length. We are setting complete length.
|
||||
length = end_address_of_bss - start_address_of_text.
|
||||
Remainder is the blob to be loaded contiguously
|
||||
from start address. */
|
||||
|
||||
info.fw_base = be32_to_cpu(fw_data[1]);
|
||||
cpu_scratch_size = tp->fw_len;
|
||||
info.fw_len = tp->fw->size - 12;
|
||||
info.fw_data = &fw_data[3];
|
||||
|
||||
if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5705) {
|
||||
info.text_base = TG3_TSO5_FW_TEXT_ADDR;
|
||||
info.text_len = TG3_TSO5_FW_TEXT_LEN;
|
||||
info.text_data = &tg3Tso5FwText[0];
|
||||
info.rodata_base = TG3_TSO5_FW_RODATA_ADDR;
|
||||
info.rodata_len = TG3_TSO5_FW_RODATA_LEN;
|
||||
info.rodata_data = &tg3Tso5FwRodata[0];
|
||||
info.data_base = TG3_TSO5_FW_DATA_ADDR;
|
||||
info.data_len = TG3_TSO5_FW_DATA_LEN;
|
||||
info.data_data = &tg3Tso5FwData[0];
|
||||
cpu_base = RX_CPU_BASE;
|
||||
cpu_scratch_base = NIC_SRAM_MBUF_POOL_BASE5705;
|
||||
cpu_scratch_size = (info.text_len +
|
||||
info.rodata_len +
|
||||
info.data_len +
|
||||
TG3_TSO5_FW_SBSS_LEN +
|
||||
TG3_TSO5_FW_BSS_LEN);
|
||||
} else {
|
||||
info.text_base = TG3_TSO_FW_TEXT_ADDR;
|
||||
info.text_len = TG3_TSO_FW_TEXT_LEN;
|
||||
info.text_data = &tg3TsoFwText[0];
|
||||
info.rodata_base = TG3_TSO_FW_RODATA_ADDR;
|
||||
info.rodata_len = TG3_TSO_FW_RODATA_LEN;
|
||||
info.rodata_data = &tg3TsoFwRodata[0];
|
||||
info.data_base = TG3_TSO_FW_DATA_ADDR;
|
||||
info.data_len = TG3_TSO_FW_DATA_LEN;
|
||||
info.data_data = &tg3TsoFwData[0];
|
||||
cpu_base = TX_CPU_BASE;
|
||||
cpu_scratch_base = TX_CPU_SCRATCH_BASE;
|
||||
cpu_scratch_size = TX_CPU_SCRATCH_SIZE;
|
||||
|
@ -7060,21 +6418,21 @@ static int tg3_load_tso_firmware(struct tg3 *tp)
|
|||
|
||||
/* Now startup the cpu. */
|
||||
tw32(cpu_base + CPU_STATE, 0xffffffff);
|
||||
tw32_f(cpu_base + CPU_PC, info.text_base);
|
||||
tw32_f(cpu_base + CPU_PC, info.fw_base);
|
||||
|
||||
for (i = 0; i < 5; i++) {
|
||||
if (tr32(cpu_base + CPU_PC) == info.text_base)
|
||||
if (tr32(cpu_base + CPU_PC) == info.fw_base)
|
||||
break;
|
||||
tw32(cpu_base + CPU_STATE, 0xffffffff);
|
||||
tw32(cpu_base + CPU_MODE, CPU_MODE_HALT);
|
||||
tw32_f(cpu_base + CPU_PC, info.text_base);
|
||||
tw32_f(cpu_base + CPU_PC, info.fw_base);
|
||||
udelay(1000);
|
||||
}
|
||||
if (i >= 5) {
|
||||
printk(KERN_ERR PFX "tg3_load_tso_firmware fails for %s "
|
||||
"to set CPU PC, is %08x should be %08x\n",
|
||||
tp->dev->name, tr32(cpu_base + CPU_PC),
|
||||
info.text_base);
|
||||
info.fw_base);
|
||||
return -ENODEV;
|
||||
}
|
||||
tw32(cpu_base + CPU_STATE, 0xffffffff);
|
||||
|
@ -7299,11 +6657,7 @@ static int tg3_reset_hw(struct tg3 *tp, int reset_phy)
|
|||
else if (tp->tg3_flags2 & TG3_FLG2_TSO_CAPABLE) {
|
||||
int fw_len;
|
||||
|
||||
fw_len = (TG3_TSO5_FW_TEXT_LEN +
|
||||
TG3_TSO5_FW_RODATA_LEN +
|
||||
TG3_TSO5_FW_DATA_LEN +
|
||||
TG3_TSO5_FW_SBSS_LEN +
|
||||
TG3_TSO5_FW_BSS_LEN);
|
||||
fw_len = tp->fw_len;
|
||||
fw_len = (fw_len + (0x80 - 1)) & ~(0x80 - 1);
|
||||
tw32(BUFMGR_MB_POOL_ADDR,
|
||||
NIC_SRAM_MBUF_POOL_BASE5705 + fw_len);
|
||||
|
@ -13580,6 +12934,7 @@ static int __devinit tg3_init_one(struct pci_dev *pdev,
|
|||
struct net_device *dev;
|
||||
struct tg3 *tp;
|
||||
int err, pm_cap;
|
||||
const char *fw_name = NULL;
|
||||
char str[40];
|
||||
u64 dma_mask, persist_dma_mask;
|
||||
|
||||
|
@ -13735,6 +13090,9 @@ static int __devinit tg3_init_one(struct pci_dev *pdev,
|
|||
|
||||
tg3_init_bufmgr_config(tp);
|
||||
|
||||
if (tp->pci_chip_rev_id == CHIPREV_ID_5701_A0)
|
||||
fw_name = FIRMWARE_TG3;
|
||||
|
||||
if (tp->tg3_flags2 & TG3_FLG2_HW_TSO) {
|
||||
tp->tg3_flags2 |= TG3_FLG2_TSO_CAPABLE;
|
||||
}
|
||||
|
@ -13747,6 +13105,37 @@ static int __devinit tg3_init_one(struct pci_dev *pdev,
|
|||
} else {
|
||||
tp->tg3_flags2 |= TG3_FLG2_TSO_CAPABLE | TG3_FLG2_TSO_BUG;
|
||||
}
|
||||
if (tp->tg3_flags2 & TG3_FLG2_TSO_CAPABLE) {
|
||||
if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5705)
|
||||
fw_name = FIRMWARE_TG3TSO5;
|
||||
else
|
||||
fw_name = FIRMWARE_TG3TSO;
|
||||
}
|
||||
|
||||
if (fw_name) {
|
||||
const __be32 *fw_data;
|
||||
|
||||
err = request_firmware(&tp->fw, fw_name, &tp->pdev->dev);
|
||||
if (err) {
|
||||
printk(KERN_ERR "tg3: Failed to load firmware \"%s\"\n",
|
||||
fw_name);
|
||||
goto err_out_iounmap;
|
||||
}
|
||||
|
||||
fw_data = (void *)tp->fw->data;
|
||||
|
||||
/* Firmware blob starts with version numbers, followed by
|
||||
start address and _full_ length including BSS sections
|
||||
(which must be longer than the actual data, of course */
|
||||
|
||||
tp->fw_len = be32_to_cpu(fw_data[2]); /* includes bss */
|
||||
if (tp->fw_len < (tp->fw->size - 12)) {
|
||||
printk(KERN_ERR "tg3: bogus length %d in \"%s\"\n",
|
||||
tp->fw_len, fw_name);
|
||||
err = -EINVAL;
|
||||
goto err_out_fw;
|
||||
}
|
||||
}
|
||||
|
||||
/* TSO is on by default on chips that support hardware TSO.
|
||||
* Firmware TSO on older chips gives lower performance, so it
|
||||
|
@ -13778,7 +13167,7 @@ static int __devinit tg3_init_one(struct pci_dev *pdev,
|
|||
if (err) {
|
||||
printk(KERN_ERR PFX "Could not obtain valid ethernet address, "
|
||||
"aborting.\n");
|
||||
goto err_out_iounmap;
|
||||
goto err_out_fw;
|
||||
}
|
||||
|
||||
if (tp->tg3_flags3 & TG3_FLG3_ENABLE_APE) {
|
||||
|
@ -13787,7 +13176,7 @@ static int __devinit tg3_init_one(struct pci_dev *pdev,
|
|||
printk(KERN_ERR PFX "Cannot map APE registers, "
|
||||
"aborting.\n");
|
||||
err = -ENOMEM;
|
||||
goto err_out_iounmap;
|
||||
goto err_out_fw;
|
||||
}
|
||||
|
||||
tg3_ape_lock_init(tp);
|
||||
|
@ -13867,6 +13256,10 @@ err_out_apeunmap:
|
|||
tp->aperegs = NULL;
|
||||
}
|
||||
|
||||
err_out_fw:
|
||||
if (tp->fw)
|
||||
release_firmware(tp->fw);
|
||||
|
||||
err_out_iounmap:
|
||||
if (tp->regs) {
|
||||
iounmap(tp->regs);
|
||||
|
@ -13892,6 +13285,9 @@ static void __devexit tg3_remove_one(struct pci_dev *pdev)
|
|||
if (dev) {
|
||||
struct tg3 *tp = netdev_priv(dev);
|
||||
|
||||
if (tp->fw)
|
||||
release_firmware(tp->fw);
|
||||
|
||||
flush_scheduled_work();
|
||||
|
||||
if (tp->tg3_flags3 & TG3_FLG3_USE_PHYLIB) {
|
||||
|
|
|
@ -2762,6 +2762,10 @@ struct tg3 {
|
|||
#define SST_25VF0X0_PAGE_SIZE 4098
|
||||
|
||||
struct ethtool_coalesce coal;
|
||||
|
||||
/* firmware info */
|
||||
const struct firmware *fw;
|
||||
u32 fw_len; /* includes BSS */
|
||||
};
|
||||
|
||||
#endif /* !(_T3_H) */
|
||||
|
|
|
@ -213,7 +213,7 @@ static int check_filter(struct tap_filter *filter, const struct sk_buff *skb)
|
|||
|
||||
/* Network device part of the driver */
|
||||
|
||||
static unsigned int tun_net_id;
|
||||
static int tun_net_id;
|
||||
struct tun_net {
|
||||
struct list_head dev_list;
|
||||
};
|
||||
|
|
|
@ -643,7 +643,6 @@ struct qeth_card_options {
|
|||
int macaddr_mode;
|
||||
int fake_broadcast;
|
||||
int add_hhlen;
|
||||
int fake_ll;
|
||||
int layer2;
|
||||
enum qeth_large_send_types large_send;
|
||||
int performance_stats;
|
||||
|
|
|
@ -287,8 +287,15 @@ int qeth_set_large_send(struct qeth_card *card,
|
|||
card->options.large_send = type;
|
||||
switch (card->options.large_send) {
|
||||
case QETH_LARGE_SEND_EDDP:
|
||||
card->dev->features |= NETIF_F_TSO | NETIF_F_SG |
|
||||
if (card->info.type != QETH_CARD_TYPE_IQD) {
|
||||
card->dev->features |= NETIF_F_TSO | NETIF_F_SG |
|
||||
NETIF_F_HW_CSUM;
|
||||
} else {
|
||||
card->dev->features &= ~(NETIF_F_TSO | NETIF_F_SG |
|
||||
NETIF_F_HW_CSUM);
|
||||
card->options.large_send = QETH_LARGE_SEND_NO;
|
||||
rc = -EOPNOTSUPP;
|
||||
}
|
||||
break;
|
||||
case QETH_LARGE_SEND_TSO:
|
||||
if (qeth_is_supported(card, IPA_OUTBOUND_TSO)) {
|
||||
|
@ -572,6 +579,10 @@ static void qeth_send_control_data_cb(struct qeth_channel *channel,
|
|||
card = CARD_FROM_CDEV(channel->ccwdev);
|
||||
if (qeth_check_idx_response(iob->data)) {
|
||||
qeth_clear_ipacmd_list(card);
|
||||
if (((iob->data[2] & 0xc0) == 0xc0) && iob->data[4] == 0xf6)
|
||||
dev_err(&card->gdev->dev,
|
||||
"The qeth device is not configured "
|
||||
"for the OSI layer required by z/VM\n");
|
||||
qeth_schedule_recovery(card);
|
||||
goto out;
|
||||
}
|
||||
|
@ -1072,7 +1083,6 @@ static void qeth_set_intial_options(struct qeth_card *card)
|
|||
card->options.macaddr_mode = QETH_TR_MACADDR_NONCANONICAL;
|
||||
card->options.fake_broadcast = 0;
|
||||
card->options.add_hhlen = DEFAULT_ADD_HHLEN;
|
||||
card->options.fake_ll = 0;
|
||||
card->options.performance_stats = 0;
|
||||
card->options.rx_sg_cb = QETH_RX_SG_CB;
|
||||
}
|
||||
|
@ -1682,6 +1692,7 @@ int qeth_send_control_data(struct qeth_card *card, int len,
|
|||
unsigned long flags;
|
||||
struct qeth_reply *reply = NULL;
|
||||
unsigned long timeout;
|
||||
struct qeth_ipa_cmd *cmd;
|
||||
|
||||
QETH_DBF_TEXT(TRACE, 2, "sendctl");
|
||||
|
||||
|
@ -1728,17 +1739,34 @@ int qeth_send_control_data(struct qeth_card *card, int len,
|
|||
wake_up(&card->wait_q);
|
||||
return rc;
|
||||
}
|
||||
while (!atomic_read(&reply->received)) {
|
||||
if (time_after(jiffies, timeout)) {
|
||||
spin_lock_irqsave(&reply->card->lock, flags);
|
||||
list_del_init(&reply->list);
|
||||
spin_unlock_irqrestore(&reply->card->lock, flags);
|
||||
reply->rc = -ETIME;
|
||||
atomic_inc(&reply->received);
|
||||
wake_up(&reply->wait_q);
|
||||
}
|
||||
cpu_relax();
|
||||
};
|
||||
|
||||
/* we have only one long running ipassist, since we can ensure
|
||||
process context of this command we can sleep */
|
||||
cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
|
||||
if ((cmd->hdr.command == IPA_CMD_SETIP) &&
|
||||
(cmd->hdr.prot_version == QETH_PROT_IPV4)) {
|
||||
if (!wait_event_timeout(reply->wait_q,
|
||||
atomic_read(&reply->received), timeout))
|
||||
goto time_err;
|
||||
} else {
|
||||
while (!atomic_read(&reply->received)) {
|
||||
if (time_after(jiffies, timeout))
|
||||
goto time_err;
|
||||
cpu_relax();
|
||||
};
|
||||
}
|
||||
|
||||
rc = reply->rc;
|
||||
qeth_put_reply(reply);
|
||||
return rc;
|
||||
|
||||
time_err:
|
||||
spin_lock_irqsave(&reply->card->lock, flags);
|
||||
list_del_init(&reply->list);
|
||||
spin_unlock_irqrestore(&reply->card->lock, flags);
|
||||
reply->rc = -ETIME;
|
||||
atomic_inc(&reply->received);
|
||||
wake_up(&reply->wait_q);
|
||||
rc = reply->rc;
|
||||
qeth_put_reply(reply);
|
||||
return rc;
|
||||
|
@ -2250,7 +2278,8 @@ void qeth_print_status_message(struct qeth_card *card)
|
|||
}
|
||||
/* fallthrough */
|
||||
case QETH_CARD_TYPE_IQD:
|
||||
if (card->info.guestlan) {
|
||||
if ((card->info.guestlan) ||
|
||||
(card->info.mcl_level[0] & 0x80)) {
|
||||
card->info.mcl_level[0] = (char) _ebcasc[(__u8)
|
||||
card->info.mcl_level[0]];
|
||||
card->info.mcl_level[1] = (char) _ebcasc[(__u8)
|
||||
|
|
|
@ -1126,9 +1126,11 @@ static int qeth_l2_recover(void *ptr)
|
|||
dev_info(&card->gdev->dev,
|
||||
"Device successfully recovered!\n");
|
||||
else {
|
||||
rtnl_lock();
|
||||
dev_close(card->dev);
|
||||
rtnl_unlock();
|
||||
if (card->dev) {
|
||||
rtnl_lock();
|
||||
dev_close(card->dev);
|
||||
rtnl_unlock();
|
||||
}
|
||||
dev_warn(&card->gdev->dev, "The qeth device driver "
|
||||
"failed to recover an error on the device\n");
|
||||
}
|
||||
|
|
|
@ -1047,7 +1047,7 @@ static int qeth_l3_setadapter_parms(struct qeth_card *card)
|
|||
rc = qeth_setadpparms_change_macaddr(card);
|
||||
if (rc)
|
||||
dev_warn(&card->gdev->dev, "Reading the adapter MAC"
|
||||
" address failed\n", rc);
|
||||
" address failed\n");
|
||||
}
|
||||
|
||||
if ((card->info.link_type == QETH_LINK_TYPE_HSTR) ||
|
||||
|
@ -1207,12 +1207,9 @@ static int qeth_l3_start_ipa_source_mac(struct qeth_card *card)
|
|||
|
||||
QETH_DBF_TEXT(TRACE, 3, "stsrcmac");
|
||||
|
||||
if (!card->options.fake_ll)
|
||||
return -EOPNOTSUPP;
|
||||
|
||||
if (!qeth_is_supported(card, IPA_SOURCE_MAC)) {
|
||||
dev_info(&card->gdev->dev,
|
||||
"Inbound source address not supported on %s\n",
|
||||
"Inbound source MAC-address not supported on %s\n",
|
||||
QETH_CARD_IFNAME(card));
|
||||
return -EOPNOTSUPP;
|
||||
}
|
||||
|
@ -1221,7 +1218,7 @@ static int qeth_l3_start_ipa_source_mac(struct qeth_card *card)
|
|||
IPA_CMD_ASS_START, 0);
|
||||
if (rc)
|
||||
dev_warn(&card->gdev->dev,
|
||||
"Starting proxy ARP support for %s failed\n",
|
||||
"Starting source MAC-address support for %s failed\n",
|
||||
QETH_CARD_IFNAME(card));
|
||||
return rc;
|
||||
}
|
||||
|
@ -1921,8 +1918,13 @@ static inline __u16 qeth_l3_rebuild_skb(struct qeth_card *card,
|
|||
memcpy(tg_addr, card->dev->dev_addr,
|
||||
card->dev->addr_len);
|
||||
}
|
||||
card->dev->header_ops->create(skb, card->dev, prot, tg_addr,
|
||||
"FAKELL", card->dev->addr_len);
|
||||
if (hdr->hdr.l3.ext_flags & QETH_HDR_EXT_SRC_MAC_ADDR)
|
||||
card->dev->header_ops->create(skb, card->dev, prot,
|
||||
tg_addr, &hdr->hdr.l3.dest_addr[2],
|
||||
card->dev->addr_len);
|
||||
else
|
||||
card->dev->header_ops->create(skb, card->dev, prot,
|
||||
tg_addr, "FAKELL", card->dev->addr_len);
|
||||
}
|
||||
|
||||
#ifdef CONFIG_TR
|
||||
|
@ -2080,9 +2082,11 @@ static int qeth_l3_stop_card(struct qeth_card *card, int recovery_mode)
|
|||
if (recovery_mode)
|
||||
qeth_l3_stop(card->dev);
|
||||
else {
|
||||
rtnl_lock();
|
||||
dev_close(card->dev);
|
||||
rtnl_unlock();
|
||||
if (card->dev) {
|
||||
rtnl_lock();
|
||||
dev_close(card->dev);
|
||||
rtnl_unlock();
|
||||
}
|
||||
}
|
||||
if (!card->use_hard_stop) {
|
||||
rc = qeth_send_stoplan(card);
|
||||
|
|
|
@ -20,6 +20,15 @@ fw-external-y := $(subst ",,$(CONFIG_EXTRA_FIRMWARE))
|
|||
# accurate. In the latter case it doesn't matter -- it'll use $(fw-shipped-all).
|
||||
# But be aware that the config file might not be included at all.
|
||||
|
||||
ifdef CONFIG_ACENIC_OMIT_TIGON_I
|
||||
acenic-objs := acenic/tg2.bin
|
||||
fw-shipped- += acenic/tg1.bin
|
||||
else
|
||||
acenic-objs := acenic/tg1.bin acenic/tg2.bin
|
||||
endif
|
||||
fw-shipped-$(CONFIG_ACENIC) += $(acenic-objs)
|
||||
fw-shipped-$(CONFIG_ADAPTEC_STARFIRE) += adaptec/starfire_rx.bin \
|
||||
adaptec/starfire_tx.bin
|
||||
fw-shipped-$(CONFIG_ATARI_DSP56K) += dsp56k/bootstrap.bin
|
||||
fw-shipped-$(CONFIG_ATM_AMBASSADOR) += atmsar11.fw
|
||||
fw-shipped-$(CONFIG_CASSINI) += sun/cassini.bin
|
||||
|
@ -38,6 +47,8 @@ fw-shipped-$(CONFIG_SND_SB16_CSP) += sb16/mulaw_main.csp sb16/alaw_main.csp \
|
|||
sb16/ima_adpcm_capture.csp
|
||||
fw-shipped-$(CONFIG_SND_YMFPCI) += yamaha/ds1_ctrl.fw yamaha/ds1_dsp.fw \
|
||||
yamaha/ds1e_ctrl.fw
|
||||
fw-shipped-$(CONFIG_TIGON3) += tigon/tg3.bin tigon/tg3_tso.bin \
|
||||
tigon/tg3_tso5.bin
|
||||
fw-shipped-$(CONFIG_USB_DABUSB) += dabusb/firmware.fw dabusb/bitstream.bin
|
||||
fw-shipped-$(CONFIG_USB_EMI26) += emi26/loader.fw emi26/firmware.fw \
|
||||
emi26/bitstream.fw
|
||||
|
|
|
@ -360,3 +360,52 @@ License: GPLv2 or OpenIB.org BSD license, no source visible
|
|||
|
||||
--------------------------------------------------------------------------
|
||||
|
||||
Driver: acenic -- Alteon AceNIC Gigabit Ethernet card
|
||||
|
||||
File: acenic/tg1.bin
|
||||
File: acenic/tg2.bin
|
||||
|
||||
Licence: Unknown
|
||||
|
||||
Found in hex form in kernel source, but source allegedly available at
|
||||
http://alteon.shareable.org/
|
||||
|
||||
--------------------------------------------------------------------------
|
||||
|
||||
Driver: tigon3 -- Broadcom Tigon3 based gigabit Ethernet cards
|
||||
|
||||
File: tigon/tg3.bin
|
||||
File: tigon/tg3_tso.bin
|
||||
File: tigon/tg3_tso5.bin
|
||||
|
||||
Licence:
|
||||
* Firmware is:
|
||||
* Derived from proprietary unpublished source code,
|
||||
* Copyright (C) 2000-2003 Broadcom Corporation.
|
||||
*
|
||||
* Permission is hereby granted for the distribution of this firmware
|
||||
* data in hexadecimal or equivalent format, provided this copyright
|
||||
* notice is accompanying it.
|
||||
|
||||
Found in hex form in kernel source.
|
||||
|
||||
--------------------------------------------------------------------------
|
||||
|
||||
Driver: ADAPTEC_STARFIRE - Adaptec Starfire/DuraLAN support
|
||||
|
||||
File: adaptec/starfire_rx.bin
|
||||
File: adaptec/starfire_tx.bin
|
||||
|
||||
Licence: Allegedly GPLv2, but no source visible.
|
||||
|
||||
Found in hex form in kernel source, with the following notice:
|
||||
|
||||
BECAUSE THE PROGRAM IS LICENSED FREE OF CHARGE IT IS LICENSED "AS IS" AND
|
||||
THERE IS NO WARRANTY FOR THE PROGRAM, INCLUDING BUT NOT LIMITED TO THE
|
||||
IMPLIED WARRANTIES OF MERCHANTIBILITY OR FITNESS FOR A PARTICULAR PURPOSE
|
||||
(TO THE EXTENT PERMITTED BY APPLICABLE LAW). USE OF THE PROGRAM IS AT YOUR
|
||||
OWN RISK. IN NO EVENT WILL ADAPTEC OR ITS LICENSORS BE LIABLE TO YOU FOR
|
||||
DAMAGES, INCLUDING ANY GENERAL, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES
|
||||
ARISING OUT OF THE USE OR INABILITY TO USE THE PROGRAM.
|
||||
|
||||
--------------------------------------------------------------------------
|
||||
|
|
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
|
@ -0,0 +1,53 @@
|
|||
:10000000010003DC00000000040004210000008661
|
||||
:10001000800000150000180E8100001500006664C5
|
||||
:100020001A0040AB00000B06142000110000000075
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
:1000800000000010000000000000801500000000CB
|
||||
:100090000000003E00000000000000100000000012
|
||||
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|
||||
:1000B000030080150000000086008015000000008D
|
||||
:1000C00082000015000080000100001C00000000FC
|
||||
:1000D000000050A00000010C4E20D011000060086C
|
||||
:1000E0001420D012000040080000F09000007000C2
|
||||
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|
||||
:10010000001080150000000000A2C1500000400057
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
:100150000000C42000000540360140180000422D78
|
||||
:100160001420001100000000009244600000018390
|
||||
:100170003200001F0000003402AC00150000000235
|
||||
:1001800000A601100000000842200011000000003D
|
||||
:1001900000924060000001030000001E000000000B
|
||||
:1001A00000000020000001000000001E0000000010
|
||||
:1001B00000924460000000860000408000000000C3
|
||||
:1001C0000092C0700000000000924060000001003A
|
||||
:1001D0000000C8900000500000A6C1100000000000
|
||||
:1001E00000B0C09000000012021C001500000000CA
|
||||
:1001F0003200001F0000003400924460000005102F
|
||||
:100200004421001100000000420000110000000025
|
||||
:1002100083000015000000400092446000000508C3
|
||||
:100220004501401800004545008080500000000056
|
||||
:10023000622080120000000082000015000008000B
|
||||
:100240001520001100000000000000100000000058
|
||||
:10025000000000100000000000000010000000007E
|
||||
:10026000000000100000000000000010000000006E
|
||||
:10027000800000150000EEA4810000150000005F62
|
||||
:1002800000000060000000000000412000000000AD
|
||||
:1002900000004A000000400000924460000001900D
|
||||
:1002A0005601401A000059561400001100000000C9
|
||||
:1002B0000093405000000018009300500000001808
|
||||
:1002C0003601403A0000002D000643A9000000005E
|
||||
:1002D0000000C420000001405601401A0000595699
|
||||
:1002E00014000011000000000000001000000000D9
|
||||
:1002F0000000001000000000000642A900000000FD
|
||||
:1003000000024420000001835601401A00005956A3
|
||||
:1003100082000015000020001520001100000000E0
|
||||
:1003200082000015000000101520001100000000E0
|
||||
:1003300082000015000000101520001100000000D0
|
||||
:00000001FF
|
|
@ -0,0 +1,53 @@
|
|||
:10000000010003DC00000000040004210000008661
|
||||
:10001000800000150000180E8100001500006664C5
|
||||
:100020001A0040AB00000B06142000110000000075
|
||||
:10003000142040220000AAAA14204022000003003D
|
||||
:1000400014204022000000001A0040AB00000B14F6
|
||||
:1000500014200011000000008300001500000002C1
|
||||
:10006000040000210000000000000010000000005B
|
||||
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|
||||
:1000800000000010000000000000801500000000CB
|
||||
:100090000000003E00000000000000100000000012
|
||||
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|
||||
:1000B000030080150000000086008015000000008D
|
||||
:1000C00082000015000080000100001C00000000FC
|
||||
:1000D000000050A00000010C4E20D011000060086C
|
||||
:1000E0001420D012000040080000F09000007000C2
|
||||
:1000F0000000C8B0000030000000404000000000D8
|
||||
:10010000001080150000000000A2C1500000400057
|
||||
:1001100000A400B000000014000000200000000057
|
||||
:100120002500400D0000252500047220000031004C
|
||||
:10013000009340700000000000000020000000005C
|
||||
:1001400000924460000001842B20C01100000000D8
|
||||
:100150000000C42000000540360140180000422D78
|
||||
:100160001420001100000000009244600000018390
|
||||
:100170003200001F0000003402AC00150000000235
|
||||
:1001800000A601100000000842200011000000003D
|
||||
:1001900000924060000001030000001E000000000B
|
||||
:1001A00000000020000001000000001E0000000010
|
||||
:1001B00000924460000000860000408000000000C3
|
||||
:1001C0000092C0700000000000924060000001003A
|
||||
:1001D0000000C8900000500000A6C1100000000000
|
||||
:1001E00000B0C09000000012021C001500000000CA
|
||||
:1001F0003200001F0000003400924460000005102F
|
||||
:100200004421001100000000420000110000000025
|
||||
:1002100083000015000000400092446000000508C3
|
||||
:100220004501401800004545008080500000000056
|
||||
:10023000622080120000000082000015000008000B
|
||||
:100240001520001100000000000000100000000058
|
||||
:10025000000000100000000000000010000000007E
|
||||
:10026000000000100000000000000010000000006E
|
||||
:10027000800000150000EEA4810000150000005F62
|
||||
:1002800000000060000000000000412000000000AD
|
||||
:1002900000004A000000400000924460000001900D
|
||||
:1002A0005601401A000059561400001100000000C9
|
||||
:1002B0000093405000000018009300500000001808
|
||||
:1002C0003601403A0000002D000643A9000000005E
|
||||
:1002D0000000C420000001405601401A0000595699
|
||||
:1002E00014000011000000000000001000000000D9
|
||||
:1002F0000000001000000000000642A900000000FD
|
||||
:1003000000024420000001835601401A00005956A3
|
||||
:1003100082000015000020001520001100000000E0
|
||||
:1003200082000015000000101520001100000000E0
|
||||
:1003300082000015000000101520001100000000D0
|
||||
:00000001FF
|
|
@ -0,0 +1,175 @@
|
|||
:10000000000000000800000000000A80000000005E
|
||||
:1000100010000003000000000000000D0000000DB3
|
||||
:100020003C1D080037BD3FFC03A0F0213C10080038
|
||||
:10003000261000000E000018000000000000000D57
|
||||
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|
||||
:10005000261000340E00021C000000000000000DFD
|
||||
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|
||||
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|
||||
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|
||||
:100090009783002E3C040800248409C0AFA00014FC
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
:10014000344230003C030800346330003C040800B3
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
:00000001FF
|
||||
* Firmware is:
|
||||
* Derived from proprietary unpublished source code,
|
||||
* Copyright (C) 2000-2003 Broadcom Corporation.
|
||||
*
|
||||
* Permission is hereby granted for the distribution of this firmware
|
||||
* data in hexadecimal or equivalent format, provided this copyright
|
||||
* notice is accompanying it.
|
|
@ -0,0 +1,446 @@
|
|||
:100000000106000008000000000024140E00000398
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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||||
* Firmware is:
|
||||
* Derived from proprietary unpublished source code,
|
||||
* Copyright (C) 2000-2003 Broadcom Corporation.
|
||||
*
|
||||
* Permission is hereby granted for the distribution of this firmware
|
||||
* data in hexadecimal or equivalent format, provided this copyright
|
||||
* notice is accompanying it.
|
|
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||||
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|
||||
:10099000000000003C02000194420F5C00021400C1
|
||||
:1009A00000621025AF620CE894E200003C030001F5
|
||||
:1009B00094630F5400441021A4E200003042FFFF72
|
||||
:1009C000144300213C0200083C02000190420F57F2
|
||||
:1009D000104000063C03000C3C02000194420F68EA
|
||||
:1009E000346306240800427C0000D0213C02000150
|
||||
:1009F00094420F683C03000834630624004310252A
|
||||
:100A0000AF620CEC3C1080003C02A000AF620CF422
|
||||
:100A10003C010001A0200F568F64100800901024A4
|
||||
:100A200014400003000000000C00406400000000BF
|
||||
:100A30008F620CF4005010241040001500000000DC
|
||||
:100A400008004283000000003C03000194630F682B
|
||||
:100A5000344206243C108000006218253C028000CD
|
||||
:100A6000AF630CECAF620CF48F641008009010249C
|
||||
:100A700014400003000000000C004064000000006F
|
||||
:100A80008F620CF4005010241440FFF700000000A7
|
||||
:100A90003C010001080042CFA4200F5E3C0200018F
|
||||
:100AA00094420F5C0002140000C21025AF620CE8F3
|
||||
:100AB0003C02000190420F57104000093C03000C1B
|
||||
:100AC0003C02000194420F68346306240000D021E8
|
||||
:100AD00000431025AF620CEC080042C13C108000BE
|
||||
:100AE0003C02000194420F683C0300083463060492
|
||||
:100AF00000431025AF620CEC3C02000194420F5EF3
|
||||
:100B0000004510213C010001A4220F5E3C10800032
|
||||
:100B10003C02A000AF620CF43C010001A0200F5683
|
||||
:100B20008F6410080090102414400003000000009F
|
||||
:100B30000C004064000000008F620CF40050102490
|
||||
:100B40001440FFF7000000008FBF00148FB00010AA
|
||||
:100B500003E0000827BD00180000000027BDFFE0EB
|
||||
:100B60003C04000124840EC0000028210000302134
|
||||
:100B700000003821AFBF0018AFA000100C00437870
|
||||
:100B8000AFA000140000D02124020130AF62500059
|
||||
:100B90003C010001A4200F503C010001A0200F5790
|
||||
:100BA0008FBF001803E0000827BD002027BDFFE825
|
||||
:100BB0003C1BC000AFBF0014AFB00010AF60680CAA
|
||||
:100BC0008F62680434420082AF6268048F63400021
|
||||
:100BD00024020B503C010001AC220F2024020B78B0
|
||||
:100BE0003C010001AC220F3034630002AF634000CF
|
||||
:100BF0000C004315008080213C010001A0220F342D
|
||||
:100C0000304200FF240300021443000500000000EE
|
||||
:100C10003C0200018C420F2008004308AC5000C089
|
||||
:100C20003C0200018C420F20AC5000BC8F62443467
|
||||
:100C30008F6344388F6444103C010001AC220F28BC
|
||||
:100C40003C010001AC230F383C010001AC240F240F
|
||||
:100C50008FBF00148FB0001003E0000827BD0018FC
|
||||
:100C600003E000082402000127BDFFF818800009F6
|
||||
:100C7000000028218F63680C8F62680C1043FFFE10
|
||||
:100C80000000000024A5000100A4102A1440FFF970
|
||||
:100C90000000000003E0000827BD00088F634450F7
|
||||
:100CA0003C0200018C420F2800031C020043102B61
|
||||
:100CB000144000083C0380003C0400018C840F3881
|
||||
:100CC0008F62445000021C020083102B1040FFFC76
|
||||
:100CD0003C038000AF6344448F62444400431024CB
|
||||
:100CE0001440FFFD000000008F62444803E000084C
|
||||
:100CF0003042FFFF3082FFFF2442E0002C422001FF
|
||||
:100D0000144000033C024000080043472402FFFF58
|
||||
:100D100000822025AF645C388F625C303042000274
|
||||
:100D20001440FFFC0000102103E000080000000058
|
||||
:100D30008F6244503C0300018C630F240800435031
|
||||
:100D40003042FFFF8F6244503042FFFF0043102BC0
|
||||
:100D50001440FFFC0000000003E000080000000059
|
||||
:100D600027BDFFE0008028213C04000124840ED030
|
||||
:100D70000000302100003821AFBF0018AFA00010E4
|
||||
:100D80000C004378AFA000140800435F000000008F
|
||||
:100D90008FBF001803E0000827BD00203C020001BF
|
||||
:100DA0003442D6003C0300013463D6003C04000109
|
||||
:100DB0003484DDFF3C010001AC220F4024020040DE
|
||||
:100DC0003C010001AC220F443C010001AC200F3C6F
|
||||
:100DD000AC600000246300040083102B5040FFFD32
|
||||
:100DE000AC60000003E00008000000000080482123
|
||||
:100DF0008FAA00103C0200018C420F3C3C04000111
|
||||
:100E00008C840F448FAB0014244300010044102B4A
|
||||
:100E10003C010001AC230F3C1440000300004021C2
|
||||
:100E20003C010001AC200F3C3C0200018C420F3C15
|
||||
:100E30003C0300018C630F4091240000000211402C
|
||||
:100E4000004310210048102125080001A0440000A3
|
||||
:100E5000290200081440FFF4252900013C0200018A
|
||||
:100E60008C420F3C3C0300018C630F408F64680C84
|
||||
:100E70000002114000431021AC440008AC45000CB6
|
||||
:100E8000AC460010AC470014AC4A001803E0000860
|
||||
:100E9000AC4B001C00000000000000004D61696EBA
|
||||
:100EA00043707542000000004D61696E43707541EA
|
||||
:100EB00000000000000000000000000073746B6F71
|
||||
:100EC00066666C64000000000000000073746B6FC5
|
||||
:100ED00066666C64000000000000000066617461DA
|
||||
:100EE0006C4572720000000000000000000000006D
|
||||
:100EF00000000000000000000000000000000000F2
|
||||
:100F000000000000000000000000000000000000E1
|
||||
:100F100073746B6F66666C645F76312E322E3000B0
|
||||
:0C0F2000000000000000000000000000C5
|
||||
:00000001FF
|
||||
* Firmware is:
|
||||
* Derived from proprietary unpublished source code,
|
||||
* Copyright (C) 2000-2003 Broadcom Corporation.
|
||||
*
|
||||
* Permission is hereby granted for the distribution of this firmware
|
||||
* data in hexadecimal or equivalent format, provided this copyright
|
||||
* notice is accompanying it.
|
||||
/* 5705 needs a special version of the TSO firmware. */
|
|
@ -313,10 +313,11 @@ struct napi_struct {
|
|||
#ifdef CONFIG_NETPOLL
|
||||
spinlock_t poll_lock;
|
||||
int poll_owner;
|
||||
struct net_device *dev;
|
||||
#endif
|
||||
struct net_device *dev;
|
||||
struct list_head dev_list;
|
||||
struct sk_buff *gro_list;
|
||||
struct sk_buff *skb;
|
||||
};
|
||||
|
||||
enum
|
||||
|
@ -990,6 +991,9 @@ struct napi_gro_cb {
|
|||
|
||||
/* Number of segments aggregated. */
|
||||
int count;
|
||||
|
||||
/* Free the skb? */
|
||||
int free;
|
||||
};
|
||||
|
||||
#define NAPI_GRO_CB(skb) ((struct napi_gro_cb *)(skb)->cb)
|
||||
|
@ -1011,6 +1015,14 @@ struct packet_type {
|
|||
struct list_head list;
|
||||
};
|
||||
|
||||
struct napi_gro_fraginfo {
|
||||
skb_frag_t frags[MAX_SKB_FRAGS];
|
||||
unsigned int nr_frags;
|
||||
unsigned int ip_summed;
|
||||
unsigned int len;
|
||||
__wsum csum;
|
||||
};
|
||||
|
||||
#include <linux/interrupt.h>
|
||||
#include <linux/notifier.h>
|
||||
|
||||
|
@ -1363,6 +1375,8 @@ extern int netif_receive_skb(struct sk_buff *skb);
|
|||
extern void napi_gro_flush(struct napi_struct *napi);
|
||||
extern int napi_gro_receive(struct napi_struct *napi,
|
||||
struct sk_buff *skb);
|
||||
extern int napi_gro_frags(struct napi_struct *napi,
|
||||
struct napi_gro_fraginfo *info);
|
||||
extern void netif_nit_deliver(struct sk_buff *skb);
|
||||
extern int dev_valid_name(const char *name);
|
||||
extern int dev_ioctl(struct net *net, unsigned int cmd, void __user *);
|
||||
|
|
|
@ -155,9 +155,9 @@ static inline struct neighbour * ndisc_get_neigh(struct net_device *dev, const s
|
|||
{
|
||||
|
||||
if (dev)
|
||||
return __neigh_lookup(&nd_tbl, addr, dev, 1);
|
||||
return __neigh_lookup_errno(&nd_tbl, addr, dev);
|
||||
|
||||
return NULL;
|
||||
return ERR_PTR(-ENODEV);
|
||||
}
|
||||
|
||||
|
||||
|
|
210
net/can/bcm.c
210
net/can/bcm.c
|
@ -70,7 +70,7 @@
|
|||
|
||||
#define CAN_BCM_VERSION CAN_VERSION
|
||||
static __initdata const char banner[] = KERN_INFO
|
||||
"can: broadcast manager protocol (rev " CAN_BCM_VERSION ")\n";
|
||||
"can: broadcast manager protocol (rev " CAN_BCM_VERSION " t)\n";
|
||||
|
||||
MODULE_DESCRIPTION("PF_CAN broadcast manager protocol");
|
||||
MODULE_LICENSE("Dual BSD/GPL");
|
||||
|
@ -90,6 +90,7 @@ struct bcm_op {
|
|||
unsigned long frames_abs, frames_filtered;
|
||||
struct timeval ival1, ival2;
|
||||
struct hrtimer timer, thrtimer;
|
||||
struct tasklet_struct tsklet, thrtsklet;
|
||||
ktime_t rx_stamp, kt_ival1, kt_ival2, kt_lastmsg;
|
||||
int rx_ifindex;
|
||||
int count;
|
||||
|
@ -341,6 +342,23 @@ static void bcm_send_to_user(struct bcm_op *op, struct bcm_msg_head *head,
|
|||
}
|
||||
}
|
||||
|
||||
static void bcm_tx_timeout_tsklet(unsigned long data)
|
||||
{
|
||||
struct bcm_op *op = (struct bcm_op *)data;
|
||||
struct bcm_msg_head msg_head;
|
||||
|
||||
/* create notification to user */
|
||||
msg_head.opcode = TX_EXPIRED;
|
||||
msg_head.flags = op->flags;
|
||||
msg_head.count = op->count;
|
||||
msg_head.ival1 = op->ival1;
|
||||
msg_head.ival2 = op->ival2;
|
||||
msg_head.can_id = op->can_id;
|
||||
msg_head.nframes = 0;
|
||||
|
||||
bcm_send_to_user(op, &msg_head, NULL, 0);
|
||||
}
|
||||
|
||||
/*
|
||||
* bcm_tx_timeout_handler - performes cyclic CAN frame transmissions
|
||||
*/
|
||||
|
@ -352,20 +370,8 @@ static enum hrtimer_restart bcm_tx_timeout_handler(struct hrtimer *hrtimer)
|
|||
if (op->kt_ival1.tv64 && (op->count > 0)) {
|
||||
|
||||
op->count--;
|
||||
if (!op->count && (op->flags & TX_COUNTEVT)) {
|
||||
struct bcm_msg_head msg_head;
|
||||
|
||||
/* create notification to user */
|
||||
msg_head.opcode = TX_EXPIRED;
|
||||
msg_head.flags = op->flags;
|
||||
msg_head.count = op->count;
|
||||
msg_head.ival1 = op->ival1;
|
||||
msg_head.ival2 = op->ival2;
|
||||
msg_head.can_id = op->can_id;
|
||||
msg_head.nframes = 0;
|
||||
|
||||
bcm_send_to_user(op, &msg_head, NULL, 0);
|
||||
}
|
||||
if (!op->count && (op->flags & TX_COUNTEVT))
|
||||
tasklet_schedule(&op->tsklet);
|
||||
}
|
||||
|
||||
if (op->kt_ival1.tv64 && (op->count > 0)) {
|
||||
|
@ -402,6 +408,9 @@ static void bcm_rx_changed(struct bcm_op *op, struct can_frame *data)
|
|||
if (op->frames_filtered > ULONG_MAX/100)
|
||||
op->frames_filtered = op->frames_abs = 0;
|
||||
|
||||
/* this element is not throttled anymore */
|
||||
data->can_dlc &= (BCM_CAN_DLC_MASK|RX_RECV);
|
||||
|
||||
head.opcode = RX_CHANGED;
|
||||
head.flags = op->flags;
|
||||
head.count = op->count;
|
||||
|
@ -420,37 +429,32 @@ static void bcm_rx_changed(struct bcm_op *op, struct can_frame *data)
|
|||
*/
|
||||
static void bcm_rx_update_and_send(struct bcm_op *op,
|
||||
struct can_frame *lastdata,
|
||||
struct can_frame *rxdata)
|
||||
const struct can_frame *rxdata)
|
||||
{
|
||||
memcpy(lastdata, rxdata, CFSIZ);
|
||||
|
||||
/* mark as used */
|
||||
lastdata->can_dlc |= RX_RECV;
|
||||
/* mark as used and throttled by default */
|
||||
lastdata->can_dlc |= (RX_RECV|RX_THR);
|
||||
|
||||
/* throtteling mode inactive OR data update already on the run ? */
|
||||
if (!op->kt_ival2.tv64 || hrtimer_callback_running(&op->thrtimer)) {
|
||||
/* throtteling mode inactive ? */
|
||||
if (!op->kt_ival2.tv64) {
|
||||
/* send RX_CHANGED to the user immediately */
|
||||
bcm_rx_changed(op, rxdata);
|
||||
bcm_rx_changed(op, lastdata);
|
||||
return;
|
||||
}
|
||||
|
||||
if (hrtimer_active(&op->thrtimer)) {
|
||||
/* mark as 'throttled' */
|
||||
lastdata->can_dlc |= RX_THR;
|
||||
/* with active throttling timer we are just done here */
|
||||
if (hrtimer_active(&op->thrtimer))
|
||||
return;
|
||||
}
|
||||
|
||||
if (!op->kt_lastmsg.tv64) {
|
||||
/* send first RX_CHANGED to the user immediately */
|
||||
bcm_rx_changed(op, rxdata);
|
||||
op->kt_lastmsg = ktime_get();
|
||||
return;
|
||||
}
|
||||
/* first receiption with enabled throttling mode */
|
||||
if (!op->kt_lastmsg.tv64)
|
||||
goto rx_changed_settime;
|
||||
|
||||
/* got a second frame inside a potential throttle period? */
|
||||
if (ktime_us_delta(ktime_get(), op->kt_lastmsg) <
|
||||
ktime_to_us(op->kt_ival2)) {
|
||||
/* mark as 'throttled' and start timer */
|
||||
lastdata->can_dlc |= RX_THR;
|
||||
/* do not send the saved data - only start throttle timer */
|
||||
hrtimer_start(&op->thrtimer,
|
||||
ktime_add(op->kt_lastmsg, op->kt_ival2),
|
||||
HRTIMER_MODE_ABS);
|
||||
|
@ -458,7 +462,8 @@ static void bcm_rx_update_and_send(struct bcm_op *op,
|
|||
}
|
||||
|
||||
/* the gap was that big, that throttling was not needed here */
|
||||
bcm_rx_changed(op, rxdata);
|
||||
rx_changed_settime:
|
||||
bcm_rx_changed(op, lastdata);
|
||||
op->kt_lastmsg = ktime_get();
|
||||
}
|
||||
|
||||
|
@ -467,7 +472,7 @@ static void bcm_rx_update_and_send(struct bcm_op *op,
|
|||
* received data stored in op->last_frames[]
|
||||
*/
|
||||
static void bcm_rx_cmp_to_index(struct bcm_op *op, int index,
|
||||
struct can_frame *rxdata)
|
||||
const struct can_frame *rxdata)
|
||||
{
|
||||
/*
|
||||
* no one uses the MSBs of can_dlc for comparation,
|
||||
|
@ -511,14 +516,12 @@ static void bcm_rx_starttimer(struct bcm_op *op)
|
|||
hrtimer_start(&op->timer, op->kt_ival1, HRTIMER_MODE_REL);
|
||||
}
|
||||
|
||||
/*
|
||||
* bcm_rx_timeout_handler - when the (cyclic) CAN frame receiption timed out
|
||||
*/
|
||||
static enum hrtimer_restart bcm_rx_timeout_handler(struct hrtimer *hrtimer)
|
||||
static void bcm_rx_timeout_tsklet(unsigned long data)
|
||||
{
|
||||
struct bcm_op *op = container_of(hrtimer, struct bcm_op, timer);
|
||||
struct bcm_op *op = (struct bcm_op *)data;
|
||||
struct bcm_msg_head msg_head;
|
||||
|
||||
/* create notification to user */
|
||||
msg_head.opcode = RX_TIMEOUT;
|
||||
msg_head.flags = op->flags;
|
||||
msg_head.count = op->count;
|
||||
|
@ -528,6 +531,17 @@ static enum hrtimer_restart bcm_rx_timeout_handler(struct hrtimer *hrtimer)
|
|||
msg_head.nframes = 0;
|
||||
|
||||
bcm_send_to_user(op, &msg_head, NULL, 0);
|
||||
}
|
||||
|
||||
/*
|
||||
* bcm_rx_timeout_handler - when the (cyclic) CAN frame receiption timed out
|
||||
*/
|
||||
static enum hrtimer_restart bcm_rx_timeout_handler(struct hrtimer *hrtimer)
|
||||
{
|
||||
struct bcm_op *op = container_of(hrtimer, struct bcm_op, timer);
|
||||
|
||||
/* schedule before NET_RX_SOFTIRQ */
|
||||
tasklet_hi_schedule(&op->tsklet);
|
||||
|
||||
/* no restart of the timer is done here! */
|
||||
|
||||
|
@ -541,9 +555,25 @@ static enum hrtimer_restart bcm_rx_timeout_handler(struct hrtimer *hrtimer)
|
|||
}
|
||||
|
||||
/*
|
||||
* bcm_rx_thr_flush - Check for throttled data and send it to the userspace
|
||||
* bcm_rx_do_flush - helper for bcm_rx_thr_flush
|
||||
*/
|
||||
static int bcm_rx_thr_flush(struct bcm_op *op)
|
||||
static inline int bcm_rx_do_flush(struct bcm_op *op, int update, int index)
|
||||
{
|
||||
if ((op->last_frames) && (op->last_frames[index].can_dlc & RX_THR)) {
|
||||
if (update)
|
||||
bcm_rx_changed(op, &op->last_frames[index]);
|
||||
return 1;
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*
|
||||
* bcm_rx_thr_flush - Check for throttled data and send it to the userspace
|
||||
*
|
||||
* update == 0 : just check if throttled data is available (any irq context)
|
||||
* update == 1 : check and send throttled data to userspace (soft_irq context)
|
||||
*/
|
||||
static int bcm_rx_thr_flush(struct bcm_op *op, int update)
|
||||
{
|
||||
int updated = 0;
|
||||
|
||||
|
@ -551,27 +581,25 @@ static int bcm_rx_thr_flush(struct bcm_op *op)
|
|||
int i;
|
||||
|
||||
/* for MUX filter we start at index 1 */
|
||||
for (i = 1; i < op->nframes; i++) {
|
||||
if ((op->last_frames) &&
|
||||
(op->last_frames[i].can_dlc & RX_THR)) {
|
||||
op->last_frames[i].can_dlc &= ~RX_THR;
|
||||
bcm_rx_changed(op, &op->last_frames[i]);
|
||||
updated++;
|
||||
}
|
||||
}
|
||||
for (i = 1; i < op->nframes; i++)
|
||||
updated += bcm_rx_do_flush(op, update, i);
|
||||
|
||||
} else {
|
||||
/* for RX_FILTER_ID and simple filter */
|
||||
if (op->last_frames && (op->last_frames[0].can_dlc & RX_THR)) {
|
||||
op->last_frames[0].can_dlc &= ~RX_THR;
|
||||
bcm_rx_changed(op, &op->last_frames[0]);
|
||||
updated++;
|
||||
}
|
||||
updated += bcm_rx_do_flush(op, update, 0);
|
||||
}
|
||||
|
||||
return updated;
|
||||
}
|
||||
|
||||
static void bcm_rx_thr_tsklet(unsigned long data)
|
||||
{
|
||||
struct bcm_op *op = (struct bcm_op *)data;
|
||||
|
||||
/* push the changed data to the userspace */
|
||||
bcm_rx_thr_flush(op, 1);
|
||||
}
|
||||
|
||||
/*
|
||||
* bcm_rx_thr_handler - the time for blocked content updates is over now:
|
||||
* Check for throttled data and send it to the userspace
|
||||
|
@ -580,7 +608,9 @@ static enum hrtimer_restart bcm_rx_thr_handler(struct hrtimer *hrtimer)
|
|||
{
|
||||
struct bcm_op *op = container_of(hrtimer, struct bcm_op, thrtimer);
|
||||
|
||||
if (bcm_rx_thr_flush(op)) {
|
||||
tasklet_schedule(&op->thrtsklet);
|
||||
|
||||
if (bcm_rx_thr_flush(op, 0)) {
|
||||
hrtimer_forward(hrtimer, ktime_get(), op->kt_ival2);
|
||||
return HRTIMER_RESTART;
|
||||
} else {
|
||||
|
@ -596,48 +626,38 @@ static enum hrtimer_restart bcm_rx_thr_handler(struct hrtimer *hrtimer)
|
|||
static void bcm_rx_handler(struct sk_buff *skb, void *data)
|
||||
{
|
||||
struct bcm_op *op = (struct bcm_op *)data;
|
||||
struct can_frame rxframe;
|
||||
const struct can_frame *rxframe = (struct can_frame *)skb->data;
|
||||
int i;
|
||||
|
||||
/* disable timeout */
|
||||
hrtimer_cancel(&op->timer);
|
||||
|
||||
if (skb->len == sizeof(rxframe)) {
|
||||
memcpy(&rxframe, skb->data, sizeof(rxframe));
|
||||
/* save rx timestamp */
|
||||
op->rx_stamp = skb->tstamp;
|
||||
/* save originator for recvfrom() */
|
||||
op->rx_ifindex = skb->dev->ifindex;
|
||||
/* update statistics */
|
||||
op->frames_abs++;
|
||||
kfree_skb(skb);
|
||||
if (op->can_id != rxframe->can_id)
|
||||
goto rx_freeskb;
|
||||
|
||||
} else {
|
||||
kfree_skb(skb);
|
||||
return;
|
||||
}
|
||||
|
||||
if (op->can_id != rxframe.can_id)
|
||||
return;
|
||||
/* save rx timestamp */
|
||||
op->rx_stamp = skb->tstamp;
|
||||
/* save originator for recvfrom() */
|
||||
op->rx_ifindex = skb->dev->ifindex;
|
||||
/* update statistics */
|
||||
op->frames_abs++;
|
||||
|
||||
if (op->flags & RX_RTR_FRAME) {
|
||||
/* send reply for RTR-request (placed in op->frames[0]) */
|
||||
bcm_can_tx(op);
|
||||
return;
|
||||
goto rx_freeskb;
|
||||
}
|
||||
|
||||
if (op->flags & RX_FILTER_ID) {
|
||||
/* the easiest case */
|
||||
bcm_rx_update_and_send(op, &op->last_frames[0], &rxframe);
|
||||
bcm_rx_starttimer(op);
|
||||
return;
|
||||
bcm_rx_update_and_send(op, &op->last_frames[0], rxframe);
|
||||
goto rx_freeskb_starttimer;
|
||||
}
|
||||
|
||||
if (op->nframes == 1) {
|
||||
/* simple compare with index 0 */
|
||||
bcm_rx_cmp_to_index(op, 0, &rxframe);
|
||||
bcm_rx_starttimer(op);
|
||||
return;
|
||||
bcm_rx_cmp_to_index(op, 0, rxframe);
|
||||
goto rx_freeskb_starttimer;
|
||||
}
|
||||
|
||||
if (op->nframes > 1) {
|
||||
|
@ -649,15 +669,19 @@ static void bcm_rx_handler(struct sk_buff *skb, void *data)
|
|||
*/
|
||||
|
||||
for (i = 1; i < op->nframes; i++) {
|
||||
if ((GET_U64(&op->frames[0]) & GET_U64(&rxframe)) ==
|
||||
if ((GET_U64(&op->frames[0]) & GET_U64(rxframe)) ==
|
||||
(GET_U64(&op->frames[0]) &
|
||||
GET_U64(&op->frames[i]))) {
|
||||
bcm_rx_cmp_to_index(op, i, &rxframe);
|
||||
bcm_rx_cmp_to_index(op, i, rxframe);
|
||||
break;
|
||||
}
|
||||
}
|
||||
bcm_rx_starttimer(op);
|
||||
}
|
||||
|
||||
rx_freeskb_starttimer:
|
||||
bcm_rx_starttimer(op);
|
||||
rx_freeskb:
|
||||
kfree_skb(skb);
|
||||
}
|
||||
|
||||
/*
|
||||
|
@ -681,6 +705,12 @@ static void bcm_remove_op(struct bcm_op *op)
|
|||
hrtimer_cancel(&op->timer);
|
||||
hrtimer_cancel(&op->thrtimer);
|
||||
|
||||
if (op->tsklet.func)
|
||||
tasklet_kill(&op->tsklet);
|
||||
|
||||
if (op->thrtsklet.func)
|
||||
tasklet_kill(&op->thrtsklet);
|
||||
|
||||
if ((op->frames) && (op->frames != &op->sframe))
|
||||
kfree(op->frames);
|
||||
|
||||
|
@ -891,6 +921,10 @@ static int bcm_tx_setup(struct bcm_msg_head *msg_head, struct msghdr *msg,
|
|||
hrtimer_init(&op->timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL);
|
||||
op->timer.function = bcm_tx_timeout_handler;
|
||||
|
||||
/* initialize tasklet for tx countevent notification */
|
||||
tasklet_init(&op->tsklet, bcm_tx_timeout_tsklet,
|
||||
(unsigned long) op);
|
||||
|
||||
/* currently unused in tx_ops */
|
||||
hrtimer_init(&op->thrtimer, CLOCK_MONOTONIC, HRTIMER_MODE_REL);
|
||||
|
||||
|
@ -1054,9 +1088,17 @@ static int bcm_rx_setup(struct bcm_msg_head *msg_head, struct msghdr *msg,
|
|||
hrtimer_init(&op->timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL);
|
||||
op->timer.function = bcm_rx_timeout_handler;
|
||||
|
||||
/* initialize tasklet for rx timeout notification */
|
||||
tasklet_init(&op->tsklet, bcm_rx_timeout_tsklet,
|
||||
(unsigned long) op);
|
||||
|
||||
hrtimer_init(&op->thrtimer, CLOCK_MONOTONIC, HRTIMER_MODE_REL);
|
||||
op->thrtimer.function = bcm_rx_thr_handler;
|
||||
|
||||
/* initialize tasklet for rx throttle handling */
|
||||
tasklet_init(&op->thrtsklet, bcm_rx_thr_tsklet,
|
||||
(unsigned long) op);
|
||||
|
||||
/* add this bcm_op to the list of the rx_ops */
|
||||
list_add(&op->list, &bo->rx_ops);
|
||||
|
||||
|
@ -1102,7 +1144,7 @@ static int bcm_rx_setup(struct bcm_msg_head *msg_head, struct msghdr *msg,
|
|||
*/
|
||||
op->kt_lastmsg = ktime_set(0, 0);
|
||||
hrtimer_cancel(&op->thrtimer);
|
||||
bcm_rx_thr_flush(op);
|
||||
bcm_rx_thr_flush(op, 1);
|
||||
}
|
||||
|
||||
if ((op->flags & STARTTIMER) && op->kt_ival1.tv64)
|
||||
|
|
|
@ -132,6 +132,9 @@
|
|||
/* Instead of increasing this, you should create a hash table. */
|
||||
#define MAX_GRO_SKBS 8
|
||||
|
||||
/* This should be increased if a protocol with a bigger head is added. */
|
||||
#define GRO_MAX_HEAD (MAX_HEADER + 128)
|
||||
|
||||
/*
|
||||
* The list of packet types we will receive (as opposed to discard)
|
||||
* and the routines to invoke.
|
||||
|
@ -2345,7 +2348,7 @@ static int napi_gro_complete(struct sk_buff *skb)
|
|||
struct list_head *head = &ptype_base[ntohs(type) & PTYPE_HASH_MASK];
|
||||
int err = -ENOENT;
|
||||
|
||||
if (!skb_shinfo(skb)->frag_list)
|
||||
if (NAPI_GRO_CB(skb)->count == 1)
|
||||
goto out;
|
||||
|
||||
rcu_read_lock();
|
||||
|
@ -2365,6 +2368,7 @@ static int napi_gro_complete(struct sk_buff *skb)
|
|||
}
|
||||
|
||||
out:
|
||||
skb_shinfo(skb)->gso_size = 0;
|
||||
__skb_push(skb, -skb_network_offset(skb));
|
||||
return netif_receive_skb(skb);
|
||||
}
|
||||
|
@ -2383,7 +2387,7 @@ void napi_gro_flush(struct napi_struct *napi)
|
|||
}
|
||||
EXPORT_SYMBOL(napi_gro_flush);
|
||||
|
||||
int napi_gro_receive(struct napi_struct *napi, struct sk_buff *skb)
|
||||
static int __napi_gro_receive(struct napi_struct *napi, struct sk_buff *skb)
|
||||
{
|
||||
struct sk_buff **pp = NULL;
|
||||
struct packet_type *ptype;
|
||||
|
@ -2392,6 +2396,7 @@ int napi_gro_receive(struct napi_struct *napi, struct sk_buff *skb)
|
|||
int count = 0;
|
||||
int same_flow;
|
||||
int mac_len;
|
||||
int free;
|
||||
|
||||
if (!(skb->dev->features & NETIF_F_GRO))
|
||||
goto normal;
|
||||
|
@ -2408,6 +2413,7 @@ int napi_gro_receive(struct napi_struct *napi, struct sk_buff *skb)
|
|||
skb->mac_len = mac_len;
|
||||
NAPI_GRO_CB(skb)->same_flow = 0;
|
||||
NAPI_GRO_CB(skb)->flush = 0;
|
||||
NAPI_GRO_CB(skb)->free = 0;
|
||||
|
||||
for (p = napi->gro_list; p; p = p->next) {
|
||||
count++;
|
||||
|
@ -2427,6 +2433,7 @@ int napi_gro_receive(struct napi_struct *napi, struct sk_buff *skb)
|
|||
goto normal;
|
||||
|
||||
same_flow = NAPI_GRO_CB(skb)->same_flow;
|
||||
free = NAPI_GRO_CB(skb)->free;
|
||||
|
||||
if (pp) {
|
||||
struct sk_buff *nskb = *pp;
|
||||
|
@ -2446,17 +2453,91 @@ int napi_gro_receive(struct napi_struct *napi, struct sk_buff *skb)
|
|||
}
|
||||
|
||||
NAPI_GRO_CB(skb)->count = 1;
|
||||
skb_shinfo(skb)->gso_size = skb->len;
|
||||
skb->next = napi->gro_list;
|
||||
napi->gro_list = skb;
|
||||
|
||||
ok:
|
||||
return NET_RX_SUCCESS;
|
||||
return free;
|
||||
|
||||
normal:
|
||||
return netif_receive_skb(skb);
|
||||
return -1;
|
||||
}
|
||||
|
||||
int napi_gro_receive(struct napi_struct *napi, struct sk_buff *skb)
|
||||
{
|
||||
switch (__napi_gro_receive(napi, skb)) {
|
||||
case -1:
|
||||
return netif_receive_skb(skb);
|
||||
|
||||
case 1:
|
||||
kfree_skb(skb);
|
||||
break;
|
||||
}
|
||||
|
||||
return NET_RX_SUCCESS;
|
||||
}
|
||||
EXPORT_SYMBOL(napi_gro_receive);
|
||||
|
||||
int napi_gro_frags(struct napi_struct *napi, struct napi_gro_fraginfo *info)
|
||||
{
|
||||
struct net_device *dev = napi->dev;
|
||||
struct sk_buff *skb = napi->skb;
|
||||
int err = NET_RX_DROP;
|
||||
|
||||
napi->skb = NULL;
|
||||
|
||||
if (!skb) {
|
||||
skb = netdev_alloc_skb(dev, GRO_MAX_HEAD + NET_IP_ALIGN);
|
||||
if (!skb)
|
||||
goto out;
|
||||
|
||||
skb_reserve(skb, NET_IP_ALIGN);
|
||||
}
|
||||
|
||||
BUG_ON(info->nr_frags > MAX_SKB_FRAGS);
|
||||
skb_shinfo(skb)->nr_frags = info->nr_frags;
|
||||
memcpy(skb_shinfo(skb)->frags, info->frags, sizeof(info->frags));
|
||||
|
||||
skb->data_len = info->len;
|
||||
skb->len += info->len;
|
||||
skb->truesize += info->len;
|
||||
|
||||
if (!pskb_may_pull(skb, ETH_HLEN))
|
||||
goto reuse;
|
||||
|
||||
err = NET_RX_SUCCESS;
|
||||
|
||||
skb->protocol = eth_type_trans(skb, dev);
|
||||
|
||||
skb->ip_summed = info->ip_summed;
|
||||
skb->csum = info->csum;
|
||||
|
||||
switch (__napi_gro_receive(napi, skb)) {
|
||||
case -1:
|
||||
return netif_receive_skb(skb);
|
||||
|
||||
case 0:
|
||||
goto out;
|
||||
}
|
||||
|
||||
reuse:
|
||||
skb_shinfo(skb)->nr_frags = 0;
|
||||
|
||||
skb->len -= skb->data_len;
|
||||
skb->truesize -= skb->data_len;
|
||||
skb->data_len = 0;
|
||||
|
||||
__skb_pull(skb, skb_headlen(skb));
|
||||
skb_reserve(skb, NET_IP_ALIGN - skb_headroom(skb));
|
||||
|
||||
napi->skb = skb;
|
||||
|
||||
out:
|
||||
return err;
|
||||
}
|
||||
EXPORT_SYMBOL(napi_gro_frags);
|
||||
|
||||
static int process_backlog(struct napi_struct *napi, int quota)
|
||||
{
|
||||
int work = 0;
|
||||
|
@ -2535,11 +2616,12 @@ void netif_napi_add(struct net_device *dev, struct napi_struct *napi,
|
|||
{
|
||||
INIT_LIST_HEAD(&napi->poll_list);
|
||||
napi->gro_list = NULL;
|
||||
napi->skb = NULL;
|
||||
napi->poll = poll;
|
||||
napi->weight = weight;
|
||||
list_add(&napi->dev_list, &dev->napi_list);
|
||||
#ifdef CONFIG_NETPOLL
|
||||
napi->dev = dev;
|
||||
#ifdef CONFIG_NETPOLL
|
||||
spin_lock_init(&napi->poll_lock);
|
||||
napi->poll_owner = -1;
|
||||
#endif
|
||||
|
@ -2552,6 +2634,7 @@ void netif_napi_del(struct napi_struct *napi)
|
|||
struct sk_buff *skb, *next;
|
||||
|
||||
list_del_init(&napi->dev_list);
|
||||
kfree(napi->skb);
|
||||
|
||||
for (skb = napi->gro_list; skb; skb = next) {
|
||||
next = skb->next;
|
||||
|
|
|
@ -2594,6 +2594,17 @@ int skb_gro_receive(struct sk_buff **head, struct sk_buff *skb)
|
|||
|
||||
if (skb_shinfo(p)->frag_list)
|
||||
goto merge;
|
||||
else if (!skb_headlen(p) && !skb_headlen(skb) &&
|
||||
skb_shinfo(p)->nr_frags + skb_shinfo(skb)->nr_frags <
|
||||
MAX_SKB_FRAGS) {
|
||||
memcpy(skb_shinfo(p)->frags + skb_shinfo(p)->nr_frags,
|
||||
skb_shinfo(skb)->frags,
|
||||
skb_shinfo(skb)->nr_frags * sizeof(skb_frag_t));
|
||||
|
||||
skb_shinfo(p)->nr_frags += skb_shinfo(skb)->nr_frags;
|
||||
NAPI_GRO_CB(skb)->free = 1;
|
||||
goto done;
|
||||
}
|
||||
|
||||
headroom = skb_headroom(p);
|
||||
nskb = netdev_alloc_skb(p->dev, headroom);
|
||||
|
@ -2613,6 +2624,7 @@ int skb_gro_receive(struct sk_buff **head, struct sk_buff *skb)
|
|||
|
||||
*NAPI_GRO_CB(nskb) = *NAPI_GRO_CB(p);
|
||||
skb_shinfo(nskb)->frag_list = p;
|
||||
skb_shinfo(nskb)->gso_size = skb_shinfo(p)->gso_size;
|
||||
skb_header_release(p);
|
||||
nskb->prev = p;
|
||||
|
||||
|
@ -2627,11 +2639,12 @@ int skb_gro_receive(struct sk_buff **head, struct sk_buff *skb)
|
|||
p = nskb;
|
||||
|
||||
merge:
|
||||
NAPI_GRO_CB(p)->count++;
|
||||
p->prev->next = skb;
|
||||
p->prev = skb;
|
||||
skb_header_release(skb);
|
||||
|
||||
done:
|
||||
NAPI_GRO_CB(p)->count++;
|
||||
p->data_len += skb->len;
|
||||
p->truesize += skb->len;
|
||||
p->len += skb->len;
|
||||
|
|
|
@ -191,7 +191,7 @@ static int dcbnl_reply(u8 value, u8 event, u8 cmd, u8 attr, u32 pid,
|
|||
return 0;
|
||||
nlmsg_failure:
|
||||
err:
|
||||
kfree(dcbnl_skb);
|
||||
kfree_skb(dcbnl_skb);
|
||||
return ret;
|
||||
}
|
||||
|
||||
|
@ -272,7 +272,7 @@ static int dcbnl_getpfccfg(struct net_device *netdev, struct nlattr **tb,
|
|||
return 0;
|
||||
nlmsg_failure:
|
||||
err:
|
||||
kfree(dcbnl_skb);
|
||||
kfree_skb(dcbnl_skb);
|
||||
err_out:
|
||||
return -EINVAL;
|
||||
}
|
||||
|
@ -314,7 +314,7 @@ static int dcbnl_getperm_hwaddr(struct net_device *netdev, struct nlattr **tb,
|
|||
|
||||
nlmsg_failure:
|
||||
err:
|
||||
kfree(dcbnl_skb);
|
||||
kfree_skb(dcbnl_skb);
|
||||
err_out:
|
||||
return -EINVAL;
|
||||
}
|
||||
|
@ -380,7 +380,7 @@ static int dcbnl_getcap(struct net_device *netdev, struct nlattr **tb,
|
|||
return 0;
|
||||
nlmsg_failure:
|
||||
err:
|
||||
kfree(dcbnl_skb);
|
||||
kfree_skb(dcbnl_skb);
|
||||
err_out:
|
||||
return -EINVAL;
|
||||
}
|
||||
|
@ -458,7 +458,7 @@ static int dcbnl_getnumtcs(struct net_device *netdev, struct nlattr **tb,
|
|||
return 0;
|
||||
nlmsg_failure:
|
||||
err:
|
||||
kfree(dcbnl_skb);
|
||||
kfree_skb(dcbnl_skb);
|
||||
err_out:
|
||||
return ret;
|
||||
}
|
||||
|
@ -687,7 +687,7 @@ err_pg:
|
|||
nla_nest_cancel(dcbnl_skb, pg_nest);
|
||||
nlmsg_failure:
|
||||
err:
|
||||
kfree(dcbnl_skb);
|
||||
kfree_skb(dcbnl_skb);
|
||||
err_out:
|
||||
ret = -EINVAL;
|
||||
return ret;
|
||||
|
@ -949,7 +949,7 @@ err_bcn:
|
|||
nla_nest_cancel(dcbnl_skb, bcn_nest);
|
||||
nlmsg_failure:
|
||||
err:
|
||||
kfree(dcbnl_skb);
|
||||
kfree_skb(dcbnl_skb);
|
||||
err_out:
|
||||
ret = -EINVAL;
|
||||
return ret;
|
||||
|
|
|
@ -1,7 +1,6 @@
|
|||
menuconfig IP_DCCP
|
||||
tristate "The DCCP Protocol (EXPERIMENTAL)"
|
||||
depends on INET && EXPERIMENTAL
|
||||
select IP_DCCP_CCID2
|
||||
---help---
|
||||
Datagram Congestion Control Protocol (RFC 4340)
|
||||
|
||||
|
@ -25,9 +24,6 @@ config INET_DCCP_DIAG
|
|||
def_tristate y if (IP_DCCP = y && INET_DIAG = y)
|
||||
def_tristate m
|
||||
|
||||
config IP_DCCP_ACKVEC
|
||||
bool
|
||||
|
||||
source "net/dccp/ccids/Kconfig"
|
||||
|
||||
menu "DCCP Kernel Hacking"
|
||||
|
|
|
@ -2,14 +2,23 @@ obj-$(CONFIG_IP_DCCP) += dccp.o dccp_ipv4.o
|
|||
|
||||
dccp-y := ccid.o feat.o input.o minisocks.o options.o output.o proto.o timer.o
|
||||
|
||||
#
|
||||
# CCID algorithms to be used by dccp.ko
|
||||
#
|
||||
# CCID-2 is default (RFC 4340, p. 77) and has Ack Vectors as dependency
|
||||
dccp-y += ccids/ccid2.o ackvec.o
|
||||
dccp-$(CONFIG_IP_DCCP_CCID3) += ccids/ccid3.o
|
||||
dccp-$(CONFIG_IP_DCCP_TFRC_LIB) += ccids/lib/tfrc.o \
|
||||
ccids/lib/tfrc_equation.o \
|
||||
ccids/lib/packet_history.o \
|
||||
ccids/lib/loss_interval.o
|
||||
|
||||
dccp_ipv4-y := ipv4.o
|
||||
|
||||
# build dccp_ipv6 as module whenever either IPv6 or DCCP is a module
|
||||
obj-$(subst y,$(CONFIG_IP_DCCP),$(CONFIG_IPV6)) += dccp_ipv6.o
|
||||
dccp_ipv6-y := ipv6.o
|
||||
|
||||
dccp-$(CONFIG_IP_DCCP_ACKVEC) += ackvec.o
|
||||
|
||||
obj-$(CONFIG_INET_DCCP_DIAG) += dccp_diag.o
|
||||
obj-$(CONFIG_NET_DCCPPROBE) += dccp_probe.o
|
||||
|
||||
|
@ -17,5 +26,3 @@ dccp-$(CONFIG_SYSCTL) += sysctl.o
|
|||
|
||||
dccp_diag-y := diag.o
|
||||
dccp_probe-y := probe.o
|
||||
|
||||
obj-y += ccids/
|
||||
|
|
|
@ -84,7 +84,6 @@ struct dccp_ackvec_record {
|
|||
struct sock;
|
||||
struct sk_buff;
|
||||
|
||||
#ifdef CONFIG_IP_DCCP_ACKVEC
|
||||
extern int dccp_ackvec_init(void);
|
||||
extern void dccp_ackvec_exit(void);
|
||||
|
||||
|
@ -106,52 +105,4 @@ static inline int dccp_ackvec_pending(const struct dccp_ackvec *av)
|
|||
{
|
||||
return av->av_vec_len;
|
||||
}
|
||||
#else /* CONFIG_IP_DCCP_ACKVEC */
|
||||
static inline int dccp_ackvec_init(void)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
static inline void dccp_ackvec_exit(void)
|
||||
{
|
||||
}
|
||||
|
||||
static inline struct dccp_ackvec *dccp_ackvec_alloc(const gfp_t priority)
|
||||
{
|
||||
return NULL;
|
||||
}
|
||||
|
||||
static inline void dccp_ackvec_free(struct dccp_ackvec *av)
|
||||
{
|
||||
}
|
||||
|
||||
static inline int dccp_ackvec_add(struct dccp_ackvec *av, const struct sock *sk,
|
||||
const u64 ackno, const u8 state)
|
||||
{
|
||||
return -1;
|
||||
}
|
||||
|
||||
static inline void dccp_ackvec_check_rcv_ackno(struct dccp_ackvec *av,
|
||||
struct sock *sk, const u64 ackno)
|
||||
{
|
||||
}
|
||||
|
||||
static inline int dccp_ackvec_parse(struct sock *sk, const struct sk_buff *skb,
|
||||
const u64 *ackno, const u8 opt,
|
||||
const u8 *value, const u8 len)
|
||||
{
|
||||
return -1;
|
||||
}
|
||||
|
||||
static inline int dccp_insert_option_ackvec(const struct sock *sk,
|
||||
const struct sk_buff *skb)
|
||||
{
|
||||
return -1;
|
||||
}
|
||||
|
||||
static inline int dccp_ackvec_pending(const struct dccp_ackvec *av)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
#endif /* CONFIG_IP_DCCP_ACKVEC */
|
||||
#endif /* _ACKVEC_H */
|
||||
|
|
262
net/dccp/ccid.c
262
net/dccp/ccid.c
|
@ -12,56 +12,70 @@
|
|||
*/
|
||||
|
||||
#include "ccid.h"
|
||||
#include "ccids/lib/tfrc.h"
|
||||
|
||||
static u8 builtin_ccids[] = {
|
||||
DCCPC_CCID2, /* CCID2 is supported by default */
|
||||
#if defined(CONFIG_IP_DCCP_CCID3) || defined(CONFIG_IP_DCCP_CCID3_MODULE)
|
||||
DCCPC_CCID3,
|
||||
static struct ccid_operations *ccids[] = {
|
||||
&ccid2_ops,
|
||||
#ifdef CONFIG_IP_DCCP_CCID3
|
||||
&ccid3_ops,
|
||||
#endif
|
||||
};
|
||||
|
||||
static struct ccid_operations *ccids[CCID_MAX];
|
||||
#if defined(CONFIG_SMP) || defined(CONFIG_PREEMPT)
|
||||
static atomic_t ccids_lockct = ATOMIC_INIT(0);
|
||||
static DEFINE_SPINLOCK(ccids_lock);
|
||||
static struct ccid_operations *ccid_by_number(const u8 id)
|
||||
{
|
||||
int i;
|
||||
|
||||
/*
|
||||
* The strategy is: modifications ccids vector are short, do not sleep and
|
||||
* veeery rare, but read access should be free of any exclusive locks.
|
||||
for (i = 0; i < ARRAY_SIZE(ccids); i++)
|
||||
if (ccids[i]->ccid_id == id)
|
||||
return ccids[i];
|
||||
return NULL;
|
||||
}
|
||||
|
||||
/* check that up to @array_len members in @ccid_array are supported */
|
||||
bool ccid_support_check(u8 const *ccid_array, u8 array_len)
|
||||
{
|
||||
while (array_len > 0)
|
||||
if (ccid_by_number(ccid_array[--array_len]) == NULL)
|
||||
return false;
|
||||
return true;
|
||||
}
|
||||
|
||||
/**
|
||||
* ccid_get_builtin_ccids - Populate a list of built-in CCIDs
|
||||
* @ccid_array: pointer to copy into
|
||||
* @array_len: value to return length into
|
||||
* This function allocates memory - caller must see that it is freed after use.
|
||||
*/
|
||||
static void ccids_write_lock(void)
|
||||
int ccid_get_builtin_ccids(u8 **ccid_array, u8 *array_len)
|
||||
{
|
||||
spin_lock(&ccids_lock);
|
||||
while (atomic_read(&ccids_lockct) != 0) {
|
||||
spin_unlock(&ccids_lock);
|
||||
yield();
|
||||
spin_lock(&ccids_lock);
|
||||
}
|
||||
*ccid_array = kmalloc(ARRAY_SIZE(ccids), gfp_any());
|
||||
if (*ccid_array == NULL)
|
||||
return -ENOBUFS;
|
||||
|
||||
for (*array_len = 0; *array_len < ARRAY_SIZE(ccids); *array_len += 1)
|
||||
(*ccid_array)[*array_len] = ccids[*array_len]->ccid_id;
|
||||
return 0;
|
||||
}
|
||||
|
||||
static inline void ccids_write_unlock(void)
|
||||
int ccid_getsockopt_builtin_ccids(struct sock *sk, int len,
|
||||
char __user *optval, int __user *optlen)
|
||||
{
|
||||
spin_unlock(&ccids_lock);
|
||||
}
|
||||
u8 *ccid_array, array_len;
|
||||
int err = 0;
|
||||
|
||||
static inline void ccids_read_lock(void)
|
||||
{
|
||||
atomic_inc(&ccids_lockct);
|
||||
smp_mb__after_atomic_inc();
|
||||
spin_unlock_wait(&ccids_lock);
|
||||
}
|
||||
if (len < ARRAY_SIZE(ccids))
|
||||
return -EINVAL;
|
||||
|
||||
static inline void ccids_read_unlock(void)
|
||||
{
|
||||
atomic_dec(&ccids_lockct);
|
||||
}
|
||||
if (ccid_get_builtin_ccids(&ccid_array, &array_len))
|
||||
return -ENOBUFS;
|
||||
|
||||
#else
|
||||
#define ccids_write_lock() do { } while(0)
|
||||
#define ccids_write_unlock() do { } while(0)
|
||||
#define ccids_read_lock() do { } while(0)
|
||||
#define ccids_read_unlock() do { } while(0)
|
||||
#endif
|
||||
if (put_user(array_len, optlen) ||
|
||||
copy_to_user(optval, ccid_array, array_len))
|
||||
err = -EFAULT;
|
||||
|
||||
kfree(ccid_array);
|
||||
return err;
|
||||
}
|
||||
|
||||
static struct kmem_cache *ccid_kmem_cache_create(int obj_size, const char *fmt,...)
|
||||
{
|
||||
|
@ -93,48 +107,7 @@ static void ccid_kmem_cache_destroy(struct kmem_cache *slab)
|
|||
}
|
||||
}
|
||||
|
||||
/* check that up to @array_len members in @ccid_array are supported */
|
||||
bool ccid_support_check(u8 const *ccid_array, u8 array_len)
|
||||
{
|
||||
u8 i, j, found;
|
||||
|
||||
for (i = 0, found = 0; i < array_len; i++, found = 0) {
|
||||
for (j = 0; !found && j < ARRAY_SIZE(builtin_ccids); j++)
|
||||
found = (ccid_array[i] == builtin_ccids[j]);
|
||||
if (!found)
|
||||
return false;
|
||||
}
|
||||
return true;
|
||||
}
|
||||
|
||||
/**
|
||||
* ccid_get_builtin_ccids - Provide copy of `builtin' CCID array
|
||||
* @ccid_array: pointer to copy into
|
||||
* @array_len: value to return length into
|
||||
* This function allocates memory - caller must see that it is freed after use.
|
||||
*/
|
||||
int ccid_get_builtin_ccids(u8 **ccid_array, u8 *array_len)
|
||||
{
|
||||
*ccid_array = kmemdup(builtin_ccids, sizeof(builtin_ccids), gfp_any());
|
||||
if (*ccid_array == NULL)
|
||||
return -ENOBUFS;
|
||||
*array_len = ARRAY_SIZE(builtin_ccids);
|
||||
return 0;
|
||||
}
|
||||
|
||||
int ccid_getsockopt_builtin_ccids(struct sock *sk, int len,
|
||||
char __user *optval, int __user *optlen)
|
||||
{
|
||||
if (len < sizeof(builtin_ccids))
|
||||
return -EINVAL;
|
||||
|
||||
if (put_user(sizeof(builtin_ccids), optlen) ||
|
||||
copy_to_user(optval, builtin_ccids, sizeof(builtin_ccids)))
|
||||
return -EFAULT;
|
||||
return 0;
|
||||
}
|
||||
|
||||
int ccid_register(struct ccid_operations *ccid_ops)
|
||||
static int ccid_activate(struct ccid_operations *ccid_ops)
|
||||
{
|
||||
int err = -ENOBUFS;
|
||||
|
||||
|
@ -152,79 +125,40 @@ int ccid_register(struct ccid_operations *ccid_ops)
|
|||
if (ccid_ops->ccid_hc_tx_slab == NULL)
|
||||
goto out_free_rx_slab;
|
||||
|
||||
ccids_write_lock();
|
||||
err = -EEXIST;
|
||||
if (ccids[ccid_ops->ccid_id] == NULL) {
|
||||
ccids[ccid_ops->ccid_id] = ccid_ops;
|
||||
err = 0;
|
||||
}
|
||||
ccids_write_unlock();
|
||||
if (err != 0)
|
||||
goto out_free_tx_slab;
|
||||
|
||||
pr_info("CCID: Registered CCID %d (%s)\n",
|
||||
pr_info("CCID: Activated CCID %d (%s)\n",
|
||||
ccid_ops->ccid_id, ccid_ops->ccid_name);
|
||||
err = 0;
|
||||
out:
|
||||
return err;
|
||||
out_free_tx_slab:
|
||||
ccid_kmem_cache_destroy(ccid_ops->ccid_hc_tx_slab);
|
||||
ccid_ops->ccid_hc_tx_slab = NULL;
|
||||
goto out;
|
||||
out_free_rx_slab:
|
||||
ccid_kmem_cache_destroy(ccid_ops->ccid_hc_rx_slab);
|
||||
ccid_ops->ccid_hc_rx_slab = NULL;
|
||||
goto out;
|
||||
}
|
||||
|
||||
EXPORT_SYMBOL_GPL(ccid_register);
|
||||
|
||||
int ccid_unregister(struct ccid_operations *ccid_ops)
|
||||
static void ccid_deactivate(struct ccid_operations *ccid_ops)
|
||||
{
|
||||
ccids_write_lock();
|
||||
ccids[ccid_ops->ccid_id] = NULL;
|
||||
ccids_write_unlock();
|
||||
|
||||
ccid_kmem_cache_destroy(ccid_ops->ccid_hc_tx_slab);
|
||||
ccid_ops->ccid_hc_tx_slab = NULL;
|
||||
ccid_kmem_cache_destroy(ccid_ops->ccid_hc_rx_slab);
|
||||
ccid_ops->ccid_hc_rx_slab = NULL;
|
||||
|
||||
pr_info("CCID: Unregistered CCID %d (%s)\n",
|
||||
pr_info("CCID: Deactivated CCID %d (%s)\n",
|
||||
ccid_ops->ccid_id, ccid_ops->ccid_name);
|
||||
return 0;
|
||||
}
|
||||
|
||||
EXPORT_SYMBOL_GPL(ccid_unregister);
|
||||
|
||||
struct ccid *ccid_new(unsigned char id, struct sock *sk, int rx, gfp_t gfp)
|
||||
struct ccid *ccid_new(const u8 id, struct sock *sk, bool rx)
|
||||
{
|
||||
struct ccid_operations *ccid_ops;
|
||||
struct ccid_operations *ccid_ops = ccid_by_number(id);
|
||||
struct ccid *ccid = NULL;
|
||||
|
||||
ccids_read_lock();
|
||||
#ifdef CONFIG_MODULES
|
||||
if (ccids[id] == NULL) {
|
||||
/* We only try to load if in process context */
|
||||
ccids_read_unlock();
|
||||
if (gfp & GFP_ATOMIC)
|
||||
goto out;
|
||||
request_module("net-dccp-ccid-%d", id);
|
||||
ccids_read_lock();
|
||||
}
|
||||
#endif
|
||||
ccid_ops = ccids[id];
|
||||
if (ccid_ops == NULL)
|
||||
goto out_unlock;
|
||||
|
||||
if (!try_module_get(ccid_ops->ccid_owner))
|
||||
goto out_unlock;
|
||||
|
||||
ccids_read_unlock();
|
||||
goto out;
|
||||
|
||||
ccid = kmem_cache_alloc(rx ? ccid_ops->ccid_hc_rx_slab :
|
||||
ccid_ops->ccid_hc_tx_slab, gfp);
|
||||
ccid_ops->ccid_hc_tx_slab, gfp_any());
|
||||
if (ccid == NULL)
|
||||
goto out_module_put;
|
||||
goto out;
|
||||
ccid->ccid_ops = ccid_ops;
|
||||
if (rx) {
|
||||
memset(ccid + 1, 0, ccid_ops->ccid_hc_rx_obj_size);
|
||||
|
@ -239,53 +173,57 @@ struct ccid *ccid_new(unsigned char id, struct sock *sk, int rx, gfp_t gfp)
|
|||
}
|
||||
out:
|
||||
return ccid;
|
||||
out_unlock:
|
||||
ccids_read_unlock();
|
||||
goto out;
|
||||
out_free_ccid:
|
||||
kmem_cache_free(rx ? ccid_ops->ccid_hc_rx_slab :
|
||||
ccid_ops->ccid_hc_tx_slab, ccid);
|
||||
ccid = NULL;
|
||||
out_module_put:
|
||||
module_put(ccid_ops->ccid_owner);
|
||||
goto out;
|
||||
}
|
||||
|
||||
EXPORT_SYMBOL_GPL(ccid_new);
|
||||
|
||||
static void ccid_delete(struct ccid *ccid, struct sock *sk, int rx)
|
||||
{
|
||||
struct ccid_operations *ccid_ops;
|
||||
|
||||
if (ccid == NULL)
|
||||
return;
|
||||
|
||||
ccid_ops = ccid->ccid_ops;
|
||||
if (rx) {
|
||||
if (ccid_ops->ccid_hc_rx_exit != NULL)
|
||||
ccid_ops->ccid_hc_rx_exit(sk);
|
||||
kmem_cache_free(ccid_ops->ccid_hc_rx_slab, ccid);
|
||||
} else {
|
||||
if (ccid_ops->ccid_hc_tx_exit != NULL)
|
||||
ccid_ops->ccid_hc_tx_exit(sk);
|
||||
kmem_cache_free(ccid_ops->ccid_hc_tx_slab, ccid);
|
||||
}
|
||||
ccids_read_lock();
|
||||
if (ccids[ccid_ops->ccid_id] != NULL)
|
||||
module_put(ccid_ops->ccid_owner);
|
||||
ccids_read_unlock();
|
||||
}
|
||||
|
||||
void ccid_hc_rx_delete(struct ccid *ccid, struct sock *sk)
|
||||
{
|
||||
ccid_delete(ccid, sk, 1);
|
||||
if (ccid != NULL) {
|
||||
if (ccid->ccid_ops->ccid_hc_rx_exit != NULL)
|
||||
ccid->ccid_ops->ccid_hc_rx_exit(sk);
|
||||
kmem_cache_free(ccid->ccid_ops->ccid_hc_rx_slab, ccid);
|
||||
}
|
||||
}
|
||||
|
||||
EXPORT_SYMBOL_GPL(ccid_hc_rx_delete);
|
||||
|
||||
void ccid_hc_tx_delete(struct ccid *ccid, struct sock *sk)
|
||||
{
|
||||
ccid_delete(ccid, sk, 0);
|
||||
if (ccid != NULL) {
|
||||
if (ccid->ccid_ops->ccid_hc_tx_exit != NULL)
|
||||
ccid->ccid_ops->ccid_hc_tx_exit(sk);
|
||||
kmem_cache_free(ccid->ccid_ops->ccid_hc_tx_slab, ccid);
|
||||
}
|
||||
}
|
||||
|
||||
EXPORT_SYMBOL_GPL(ccid_hc_tx_delete);
|
||||
int __init ccid_initialize_builtins(void)
|
||||
{
|
||||
int i, err = tfrc_lib_init();
|
||||
|
||||
if (err)
|
||||
return err;
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(ccids); i++) {
|
||||
err = ccid_activate(ccids[i]);
|
||||
if (err)
|
||||
goto unwind_registrations;
|
||||
}
|
||||
return 0;
|
||||
|
||||
unwind_registrations:
|
||||
while(--i >= 0)
|
||||
ccid_deactivate(ccids[i]);
|
||||
tfrc_lib_exit();
|
||||
return err;
|
||||
}
|
||||
|
||||
void ccid_cleanup_builtins(void)
|
||||
{
|
||||
int i;
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(ccids); i++)
|
||||
ccid_deactivate(ccids[i]);
|
||||
tfrc_lib_exit();
|
||||
}
|
||||
|
|
|
@ -29,7 +29,6 @@ struct tcp_info;
|
|||
* @ccid_id: numerical CCID ID (up to %CCID_MAX, cf. table 5 in RFC 4340, 10.)
|
||||
* @ccid_ccmps: the CCMPS including network/transport headers (0 when disabled)
|
||||
* @ccid_name: alphabetical identifier string for @ccid_id
|
||||
* @ccid_owner: module which implements/owns this CCID
|
||||
* @ccid_hc_{r,t}x_slab: memory pool for the receiver/sender half-connection
|
||||
* @ccid_hc_{r,t}x_obj_size: size of the receiver/sender half-connection socket
|
||||
*
|
||||
|
@ -48,7 +47,6 @@ struct ccid_operations {
|
|||
unsigned char ccid_id;
|
||||
__u32 ccid_ccmps;
|
||||
const char *ccid_name;
|
||||
struct module *ccid_owner;
|
||||
struct kmem_cache *ccid_hc_rx_slab,
|
||||
*ccid_hc_tx_slab;
|
||||
__u32 ccid_hc_rx_obj_size,
|
||||
|
@ -90,8 +88,13 @@ struct ccid_operations {
|
|||
int __user *optlen);
|
||||
};
|
||||
|
||||
extern int ccid_register(struct ccid_operations *ccid_ops);
|
||||
extern int ccid_unregister(struct ccid_operations *ccid_ops);
|
||||
extern struct ccid_operations ccid2_ops;
|
||||
#ifdef CONFIG_IP_DCCP_CCID3
|
||||
extern struct ccid_operations ccid3_ops;
|
||||
#endif
|
||||
|
||||
extern int ccid_initialize_builtins(void);
|
||||
extern void ccid_cleanup_builtins(void);
|
||||
|
||||
struct ccid {
|
||||
struct ccid_operations *ccid_ops;
|
||||
|
@ -108,8 +111,7 @@ extern int ccid_get_builtin_ccids(u8 **ccid_array, u8 *array_len);
|
|||
extern int ccid_getsockopt_builtin_ccids(struct sock *sk, int len,
|
||||
char __user *, int __user *);
|
||||
|
||||
extern struct ccid *ccid_new(unsigned char id, struct sock *sk, int rx,
|
||||
gfp_t gfp);
|
||||
extern struct ccid *ccid_new(const u8 id, struct sock *sk, bool rx);
|
||||
|
||||
static inline int ccid_get_current_rx_ccid(struct dccp_sock *dp)
|
||||
{
|
||||
|
|
|
@ -1,80 +1,51 @@
|
|||
menu "DCCP CCIDs Configuration (EXPERIMENTAL)"
|
||||
depends on EXPERIMENTAL
|
||||
|
||||
config IP_DCCP_CCID2
|
||||
tristate "CCID2 (TCP-Like) (EXPERIMENTAL)"
|
||||
def_tristate IP_DCCP
|
||||
select IP_DCCP_ACKVEC
|
||||
---help---
|
||||
CCID 2, TCP-like Congestion Control, denotes Additive Increase,
|
||||
Multiplicative Decrease (AIMD) congestion control with behavior
|
||||
modelled directly on TCP, including congestion window, slow start,
|
||||
timeouts, and so forth [RFC 2581]. CCID 2 achieves maximum
|
||||
bandwidth over the long term, consistent with the use of end-to-end
|
||||
congestion control, but halves its congestion window in response to
|
||||
each congestion event. This leads to the abrupt rate changes
|
||||
typical of TCP. Applications should use CCID 2 if they prefer
|
||||
maximum bandwidth utilization to steadiness of rate. This is often
|
||||
the case for applications that are not playing their data directly
|
||||
to the user. For example, a hypothetical application that
|
||||
transferred files over DCCP, using application-level retransmissions
|
||||
for lost packets, would prefer CCID 2 to CCID 3. On-line games may
|
||||
also prefer CCID 2. See RFC 4341 for further details.
|
||||
|
||||
CCID2 is the default CCID used by DCCP.
|
||||
|
||||
config IP_DCCP_CCID2_DEBUG
|
||||
bool "CCID2 debugging messages"
|
||||
depends on IP_DCCP_CCID2
|
||||
---help---
|
||||
Enable CCID2-specific debugging messages.
|
||||
bool "CCID-2 debugging messages"
|
||||
---help---
|
||||
Enable CCID-2 specific debugging messages.
|
||||
|
||||
When compiling CCID2 as a module, this debugging output can
|
||||
additionally be toggled by setting the ccid2_debug module
|
||||
parameter to 0 or 1.
|
||||
The debugging output can additionally be toggled by setting the
|
||||
ccid2_debug parameter to 0 or 1.
|
||||
|
||||
If in doubt, say N.
|
||||
If in doubt, say N.
|
||||
|
||||
config IP_DCCP_CCID3
|
||||
tristate "CCID3 (TCP-Friendly) (EXPERIMENTAL)"
|
||||
def_tristate IP_DCCP
|
||||
select IP_DCCP_TFRC_LIB
|
||||
bool "CCID-3 (TCP-Friendly) (EXPERIMENTAL)"
|
||||
def_bool y if (IP_DCCP = y || IP_DCCP = m)
|
||||
---help---
|
||||
CCID 3 denotes TCP-Friendly Rate Control (TFRC), an equation-based
|
||||
CCID-3 denotes TCP-Friendly Rate Control (TFRC), an equation-based
|
||||
rate-controlled congestion control mechanism. TFRC is designed to
|
||||
be reasonably fair when competing for bandwidth with TCP-like flows,
|
||||
where a flow is "reasonably fair" if its sending rate is generally
|
||||
within a factor of two of the sending rate of a TCP flow under the
|
||||
same conditions. However, TFRC has a much lower variation of
|
||||
throughput over time compared with TCP, which makes CCID 3 more
|
||||
suitable than CCID 2 for applications such streaming media where a
|
||||
throughput over time compared with TCP, which makes CCID-3 more
|
||||
suitable than CCID-2 for applications such streaming media where a
|
||||
relatively smooth sending rate is of importance.
|
||||
|
||||
CCID 3 is further described in RFC 4342,
|
||||
CCID-3 is further described in RFC 4342,
|
||||
http://www.ietf.org/rfc/rfc4342.txt
|
||||
|
||||
The TFRC congestion control algorithms were initially described in
|
||||
RFC 3448.
|
||||
RFC 5448.
|
||||
|
||||
This text was extracted from RFC 4340 (sec. 10.2),
|
||||
http://www.ietf.org/rfc/rfc4340.txt
|
||||
|
||||
To compile this CCID as a module, choose M here: the module will be
|
||||
called dccp_ccid3.
|
||||
|
||||
If in doubt, say M.
|
||||
If in doubt, say N.
|
||||
|
||||
config IP_DCCP_CCID3_DEBUG
|
||||
bool "CCID3 debugging messages"
|
||||
depends on IP_DCCP_CCID3
|
||||
---help---
|
||||
Enable CCID3-specific debugging messages.
|
||||
bool "CCID-3 debugging messages"
|
||||
depends on IP_DCCP_CCID3
|
||||
---help---
|
||||
Enable CCID-3 specific debugging messages.
|
||||
|
||||
When compiling CCID3 as a module, this debugging output can
|
||||
additionally be toggled by setting the ccid3_debug module
|
||||
parameter to 0 or 1.
|
||||
The debugging output can additionally be toggled by setting the
|
||||
ccid3_debug parameter to 0 or 1.
|
||||
|
||||
If in doubt, say N.
|
||||
If in doubt, say N.
|
||||
|
||||
config IP_DCCP_CCID3_RTO
|
||||
int "Use higher bound for nofeedback timer"
|
||||
|
@ -108,12 +79,8 @@ config IP_DCCP_CCID3_RTO
|
|||
therefore not be performed on WANs.
|
||||
|
||||
config IP_DCCP_TFRC_LIB
|
||||
tristate
|
||||
default n
|
||||
def_bool y if IP_DCCP_CCID3
|
||||
|
||||
config IP_DCCP_TFRC_DEBUG
|
||||
bool
|
||||
depends on IP_DCCP_TFRC_LIB
|
||||
default y if IP_DCCP_CCID3_DEBUG
|
||||
|
||||
def_bool y if IP_DCCP_CCID3_DEBUG
|
||||
endmenu
|
||||
|
|
|
@ -1,9 +0,0 @@
|
|||
obj-$(CONFIG_IP_DCCP_CCID3) += dccp_ccid3.o
|
||||
|
||||
dccp_ccid3-y := ccid3.o
|
||||
|
||||
obj-$(CONFIG_IP_DCCP_CCID2) += dccp_ccid2.o
|
||||
|
||||
dccp_ccid2-y := ccid2.o
|
||||
|
||||
obj-y += lib/
|
|
@ -768,10 +768,9 @@ static void ccid2_hc_rx_packet_recv(struct sock *sk, struct sk_buff *skb)
|
|||
}
|
||||
}
|
||||
|
||||
static struct ccid_operations ccid2 = {
|
||||
struct ccid_operations ccid2_ops = {
|
||||
.ccid_id = DCCPC_CCID2,
|
||||
.ccid_name = "TCP-like",
|
||||
.ccid_owner = THIS_MODULE,
|
||||
.ccid_hc_tx_obj_size = sizeof(struct ccid2_hc_tx_sock),
|
||||
.ccid_hc_tx_init = ccid2_hc_tx_init,
|
||||
.ccid_hc_tx_exit = ccid2_hc_tx_exit,
|
||||
|
@ -784,22 +783,5 @@ static struct ccid_operations ccid2 = {
|
|||
|
||||
#ifdef CONFIG_IP_DCCP_CCID2_DEBUG
|
||||
module_param(ccid2_debug, bool, 0644);
|
||||
MODULE_PARM_DESC(ccid2_debug, "Enable debug messages");
|
||||
MODULE_PARM_DESC(ccid2_debug, "Enable CCID-2 debug messages");
|
||||
#endif
|
||||
|
||||
static __init int ccid2_module_init(void)
|
||||
{
|
||||
return ccid_register(&ccid2);
|
||||
}
|
||||
module_init(ccid2_module_init);
|
||||
|
||||
static __exit void ccid2_module_exit(void)
|
||||
{
|
||||
ccid_unregister(&ccid2);
|
||||
}
|
||||
module_exit(ccid2_module_exit);
|
||||
|
||||
MODULE_AUTHOR("Andrea Bittau <a.bittau@cs.ucl.ac.uk>");
|
||||
MODULE_DESCRIPTION("DCCP TCP-Like (CCID2) CCID");
|
||||
MODULE_LICENSE("GPL");
|
||||
MODULE_ALIAS("net-dccp-ccid-2");
|
||||
|
|
|
@ -940,10 +940,9 @@ static int ccid3_hc_rx_getsockopt(struct sock *sk, const int optname, int len,
|
|||
return 0;
|
||||
}
|
||||
|
||||
static struct ccid_operations ccid3 = {
|
||||
struct ccid_operations ccid3_ops = {
|
||||
.ccid_id = DCCPC_CCID3,
|
||||
.ccid_name = "TCP-Friendly Rate Control",
|
||||
.ccid_owner = THIS_MODULE,
|
||||
.ccid_hc_tx_obj_size = sizeof(struct ccid3_hc_tx_sock),
|
||||
.ccid_hc_tx_init = ccid3_hc_tx_init,
|
||||
.ccid_hc_tx_exit = ccid3_hc_tx_exit,
|
||||
|
@ -964,23 +963,5 @@ static struct ccid_operations ccid3 = {
|
|||
|
||||
#ifdef CONFIG_IP_DCCP_CCID3_DEBUG
|
||||
module_param(ccid3_debug, bool, 0644);
|
||||
MODULE_PARM_DESC(ccid3_debug, "Enable debug messages");
|
||||
MODULE_PARM_DESC(ccid3_debug, "Enable CCID-3 debug messages");
|
||||
#endif
|
||||
|
||||
static __init int ccid3_module_init(void)
|
||||
{
|
||||
return ccid_register(&ccid3);
|
||||
}
|
||||
module_init(ccid3_module_init);
|
||||
|
||||
static __exit void ccid3_module_exit(void)
|
||||
{
|
||||
ccid_unregister(&ccid3);
|
||||
}
|
||||
module_exit(ccid3_module_exit);
|
||||
|
||||
MODULE_AUTHOR("Ian McDonald <ian.mcdonald@jandi.co.nz>, "
|
||||
"Arnaldo Carvalho de Melo <acme@ghostprotocols.net>");
|
||||
MODULE_DESCRIPTION("DCCP TFRC CCID3 CCID");
|
||||
MODULE_LICENSE("GPL");
|
||||
MODULE_ALIAS("net-dccp-ccid-3");
|
||||
|
|
|
@ -1,3 +0,0 @@
|
|||
obj-$(CONFIG_IP_DCCP_TFRC_LIB) += dccp_tfrc_lib.o
|
||||
|
||||
dccp_tfrc_lib-y := tfrc.o tfrc_equation.o packet_history.o loss_interval.o
|
|
@ -60,7 +60,6 @@ void tfrc_lh_cleanup(struct tfrc_loss_hist *lh)
|
|||
lh->ring[LIH_INDEX(lh->counter)] = NULL;
|
||||
}
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(tfrc_lh_cleanup);
|
||||
|
||||
static void tfrc_lh_calc_i_mean(struct tfrc_loss_hist *lh)
|
||||
{
|
||||
|
@ -121,7 +120,6 @@ u8 tfrc_lh_update_i_mean(struct tfrc_loss_hist *lh, struct sk_buff *skb)
|
|||
|
||||
return (lh->i_mean < old_i_mean);
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(tfrc_lh_update_i_mean);
|
||||
|
||||
/* Determine if `new_loss' does begin a new loss interval [RFC 4342, 10.2] */
|
||||
static inline u8 tfrc_lh_is_new_loss(struct tfrc_loss_interval *cur,
|
||||
|
@ -169,7 +167,6 @@ int tfrc_lh_interval_add(struct tfrc_loss_hist *lh, struct tfrc_rx_hist *rh,
|
|||
}
|
||||
return 1;
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(tfrc_lh_interval_add);
|
||||
|
||||
int __init tfrc_li_init(void)
|
||||
{
|
||||
|
|
|
@ -94,7 +94,6 @@ int tfrc_tx_hist_add(struct tfrc_tx_hist_entry **headp, u64 seqno)
|
|||
*headp = entry;
|
||||
return 0;
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(tfrc_tx_hist_add);
|
||||
|
||||
void tfrc_tx_hist_purge(struct tfrc_tx_hist_entry **headp)
|
||||
{
|
||||
|
@ -109,7 +108,6 @@ void tfrc_tx_hist_purge(struct tfrc_tx_hist_entry **headp)
|
|||
|
||||
*headp = NULL;
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(tfrc_tx_hist_purge);
|
||||
|
||||
u32 tfrc_tx_hist_rtt(struct tfrc_tx_hist_entry *head, const u64 seqno,
|
||||
const ktime_t now)
|
||||
|
@ -127,7 +125,6 @@ u32 tfrc_tx_hist_rtt(struct tfrc_tx_hist_entry *head, const u64 seqno,
|
|||
|
||||
return rtt;
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(tfrc_tx_hist_rtt);
|
||||
|
||||
|
||||
/*
|
||||
|
@ -172,7 +169,6 @@ void tfrc_rx_hist_add_packet(struct tfrc_rx_hist *h,
|
|||
|
||||
tfrc_rx_hist_entry_from_skb(entry, skb, ndp);
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(tfrc_rx_hist_add_packet);
|
||||
|
||||
/* has the packet contained in skb been seen before? */
|
||||
int tfrc_rx_hist_duplicate(struct tfrc_rx_hist *h, struct sk_buff *skb)
|
||||
|
@ -189,7 +185,6 @@ int tfrc_rx_hist_duplicate(struct tfrc_rx_hist *h, struct sk_buff *skb)
|
|||
|
||||
return 0;
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(tfrc_rx_hist_duplicate);
|
||||
|
||||
static void tfrc_rx_hist_swap(struct tfrc_rx_hist *h, const u8 a, const u8 b)
|
||||
{
|
||||
|
@ -390,7 +385,6 @@ int tfrc_rx_handle_loss(struct tfrc_rx_hist *h,
|
|||
}
|
||||
return is_new_loss;
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(tfrc_rx_handle_loss);
|
||||
|
||||
int tfrc_rx_hist_alloc(struct tfrc_rx_hist *h)
|
||||
{
|
||||
|
@ -412,7 +406,6 @@ out_free:
|
|||
}
|
||||
return -ENOBUFS;
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(tfrc_rx_hist_alloc);
|
||||
|
||||
void tfrc_rx_hist_purge(struct tfrc_rx_hist *h)
|
||||
{
|
||||
|
@ -424,7 +417,6 @@ void tfrc_rx_hist_purge(struct tfrc_rx_hist *h)
|
|||
h->ring[i] = NULL;
|
||||
}
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(tfrc_rx_hist_purge);
|
||||
|
||||
/**
|
||||
* tfrc_rx_hist_rtt_last_s - reference entry to compute RTT samples against
|
||||
|
@ -495,4 +487,3 @@ keep_ref_for_next_time:
|
|||
|
||||
return sample;
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(tfrc_rx_hist_sample_rtt);
|
||||
|
|
|
@ -1,20 +1,18 @@
|
|||
/*
|
||||
* TFRC: main module holding the pieces of the TFRC library together
|
||||
* TFRC library initialisation
|
||||
*
|
||||
* Copyright (c) 2007 The University of Aberdeen, Scotland, UK
|
||||
* Copyright (c) 2007 Arnaldo Carvalho de Melo <acme@redhat.com>
|
||||
*/
|
||||
#include <linux/module.h>
|
||||
#include <linux/moduleparam.h>
|
||||
#include "tfrc.h"
|
||||
|
||||
#ifdef CONFIG_IP_DCCP_TFRC_DEBUG
|
||||
int tfrc_debug;
|
||||
module_param(tfrc_debug, bool, 0644);
|
||||
MODULE_PARM_DESC(tfrc_debug, "Enable debug messages");
|
||||
MODULE_PARM_DESC(tfrc_debug, "Enable TFRC debug messages");
|
||||
#endif
|
||||
|
||||
static int __init tfrc_module_init(void)
|
||||
int __init tfrc_lib_init(void)
|
||||
{
|
||||
int rc = tfrc_li_init();
|
||||
|
||||
|
@ -38,18 +36,9 @@ out:
|
|||
return rc;
|
||||
}
|
||||
|
||||
static void __exit tfrc_module_exit(void)
|
||||
void __exit tfrc_lib_exit(void)
|
||||
{
|
||||
tfrc_rx_packet_history_exit();
|
||||
tfrc_tx_packet_history_exit();
|
||||
tfrc_li_exit();
|
||||
}
|
||||
|
||||
module_init(tfrc_module_init);
|
||||
module_exit(tfrc_module_exit);
|
||||
|
||||
MODULE_AUTHOR("Gerrit Renker <gerrit@erg.abdn.ac.uk>, "
|
||||
"Ian McDonald <ian.mcdonald@jandi.co.nz>, "
|
||||
"Arnaldo Carvalho de Melo <acme@redhat.com>");
|
||||
MODULE_DESCRIPTION("DCCP TFRC library");
|
||||
MODULE_LICENSE("GPL");
|
||||
|
|
|
@ -17,7 +17,8 @@
|
|||
#include <linux/types.h>
|
||||
#include <linux/math64.h>
|
||||
#include "../../dccp.h"
|
||||
/* internal includes that this module exports: */
|
||||
|
||||
/* internal includes that this library exports: */
|
||||
#include "loss_interval.h"
|
||||
#include "packet_history.h"
|
||||
|
||||
|
@ -66,4 +67,12 @@ extern void tfrc_rx_packet_history_exit(void);
|
|||
|
||||
extern int tfrc_li_init(void);
|
||||
extern void tfrc_li_exit(void);
|
||||
|
||||
#ifdef CONFIG_IP_DCCP_TFRC_LIB
|
||||
extern int tfrc_lib_init(void);
|
||||
extern void tfrc_lib_exit(void);
|
||||
#else
|
||||
#define tfrc_lib_init() (0)
|
||||
#define tfrc_lib_exit()
|
||||
#endif
|
||||
#endif /* _TFRC_H_ */
|
||||
|
|
|
@ -659,8 +659,6 @@ u32 tfrc_calc_x(u16 s, u32 R, u32 p)
|
|||
return scaled_div32(result, f);
|
||||
}
|
||||
|
||||
EXPORT_SYMBOL_GPL(tfrc_calc_x);
|
||||
|
||||
/**
|
||||
* tfrc_calc_x_reverse_lookup - try to find p given f(p)
|
||||
*
|
||||
|
@ -693,5 +691,3 @@ u32 tfrc_calc_x_reverse_lookup(u32 fvalue)
|
|||
index = tfrc_binsearch(fvalue, 0);
|
||||
return (index + 1) * 1000000 / TFRC_CALC_X_ARRSIZE;
|
||||
}
|
||||
|
||||
EXPORT_SYMBOL_GPL(tfrc_calc_x_reverse_lookup);
|
||||
|
|
|
@ -432,10 +432,8 @@ static inline int dccp_ack_pending(const struct sock *sk)
|
|||
{
|
||||
const struct dccp_sock *dp = dccp_sk(sk);
|
||||
return dp->dccps_timestamp_echo != 0 ||
|
||||
#ifdef CONFIG_IP_DCCP_ACKVEC
|
||||
(dp->dccps_hc_rx_ackvec != NULL &&
|
||||
dccp_ackvec_pending(dp->dccps_hc_rx_ackvec)) ||
|
||||
#endif
|
||||
inet_csk_ack_scheduled(sk);
|
||||
}
|
||||
|
||||
|
|
|
@ -34,7 +34,7 @@
|
|||
static int dccp_hdlr_ccid(struct sock *sk, u64 ccid, bool rx)
|
||||
{
|
||||
struct dccp_sock *dp = dccp_sk(sk);
|
||||
struct ccid *new_ccid = ccid_new(ccid, sk, rx, gfp_any());
|
||||
struct ccid *new_ccid = ccid_new(ccid, sk, rx);
|
||||
|
||||
if (new_ccid == NULL)
|
||||
return -ENOMEM;
|
||||
|
@ -1214,8 +1214,6 @@ const char *dccp_feat_typename(const u8 type)
|
|||
return NULL;
|
||||
}
|
||||
|
||||
EXPORT_SYMBOL_GPL(dccp_feat_typename);
|
||||
|
||||
const char *dccp_feat_name(const u8 feat)
|
||||
{
|
||||
static const char *feature_names[] = {
|
||||
|
@ -1240,6 +1238,4 @@ const char *dccp_feat_name(const u8 feat)
|
|||
|
||||
return feature_names[feat];
|
||||
}
|
||||
|
||||
EXPORT_SYMBOL_GPL(dccp_feat_name);
|
||||
#endif /* CONFIG_IP_DCCP_DEBUG */
|
||||
|
|
|
@ -741,5 +741,3 @@ u32 dccp_sample_rtt(struct sock *sk, long delta)
|
|||
|
||||
return delta;
|
||||
}
|
||||
|
||||
EXPORT_SYMBOL_GPL(dccp_sample_rtt);
|
||||
|
|
|
@ -1118,9 +1118,15 @@ static int __init dccp_init(void)
|
|||
if (rc)
|
||||
goto out_ackvec_exit;
|
||||
|
||||
rc = ccid_initialize_builtins();
|
||||
if (rc)
|
||||
goto out_sysctl_exit;
|
||||
|
||||
dccp_timestamping_init();
|
||||
out:
|
||||
return rc;
|
||||
out_sysctl_exit:
|
||||
dccp_sysctl_exit();
|
||||
out_ackvec_exit:
|
||||
dccp_ackvec_exit();
|
||||
out_free_dccp_mib:
|
||||
|
@ -1143,6 +1149,7 @@ out_free_percpu:
|
|||
|
||||
static void __exit dccp_fini(void)
|
||||
{
|
||||
ccid_cleanup_builtins();
|
||||
dccp_mib_exit();
|
||||
free_pages((unsigned long)dccp_hashinfo.bhash,
|
||||
get_order(dccp_hashinfo.bhash_size *
|
||||
|
|
|
@ -580,10 +580,6 @@ ssize_t tcp_splice_read(struct socket *sock, loff_t *ppos,
|
|||
else if (!ret) {
|
||||
if (spliced)
|
||||
break;
|
||||
if (flags & SPLICE_F_NONBLOCK) {
|
||||
ret = -EAGAIN;
|
||||
break;
|
||||
}
|
||||
if (sock_flag(sk, SOCK_DONE))
|
||||
break;
|
||||
if (sk->sk_err) {
|
||||
|
@ -2519,9 +2515,7 @@ found:
|
|||
flush |= memcmp(th + 1, th2 + 1, thlen - sizeof(*th));
|
||||
|
||||
total = p->len;
|
||||
mss = total;
|
||||
if (skb_shinfo(p)->frag_list)
|
||||
mss = skb_shinfo(p)->frag_list->len;
|
||||
mss = skb_shinfo(p)->gso_size;
|
||||
|
||||
flush |= skb->len > mss || skb->len <= 0;
|
||||
flush |= ntohl(th2->seq) + total != ntohl(th->seq);
|
||||
|
@ -2557,7 +2551,6 @@ int tcp_gro_complete(struct sk_buff *skb)
|
|||
skb->csum_offset = offsetof(struct tcphdr, check);
|
||||
skb->ip_summed = CHECKSUM_PARTIAL;
|
||||
|
||||
skb_shinfo(skb)->gso_size = skb_shinfo(skb)->frag_list->len;
|
||||
skb_shinfo(skb)->gso_segs = NAPI_GRO_CB(skb)->count;
|
||||
|
||||
if (th->cwr)
|
||||
|
|
|
@ -404,7 +404,7 @@ sticky_done:
|
|||
else if (optlen < sizeof(struct in6_pktinfo) || optval == NULL)
|
||||
goto e_inval;
|
||||
|
||||
if (copy_from_user(&pkt, optval, optlen)) {
|
||||
if (copy_from_user(&pkt, optval, sizeof(struct in6_pktinfo))) {
|
||||
retv = -EFAULT;
|
||||
break;
|
||||
}
|
||||
|
|
|
@ -627,6 +627,9 @@ static struct rt6_info *rt6_alloc_cow(struct rt6_info *ort, struct in6_addr *dad
|
|||
rt = ip6_rt_copy(ort);
|
||||
|
||||
if (rt) {
|
||||
struct neighbour *neigh;
|
||||
int attempts = !in_softirq();
|
||||
|
||||
if (!(rt->rt6i_flags&RTF_GATEWAY)) {
|
||||
if (rt->rt6i_dst.plen != 128 &&
|
||||
ipv6_addr_equal(&rt->rt6i_dst.addr, daddr))
|
||||
|
@ -646,7 +649,35 @@ static struct rt6_info *rt6_alloc_cow(struct rt6_info *ort, struct in6_addr *dad
|
|||
}
|
||||
#endif
|
||||
|
||||
rt->rt6i_nexthop = ndisc_get_neigh(rt->rt6i_dev, &rt->rt6i_gateway);
|
||||
retry:
|
||||
neigh = ndisc_get_neigh(rt->rt6i_dev, &rt->rt6i_gateway);
|
||||
if (IS_ERR(neigh)) {
|
||||
struct net *net = dev_net(rt->rt6i_dev);
|
||||
int saved_rt_min_interval =
|
||||
net->ipv6.sysctl.ip6_rt_gc_min_interval;
|
||||
int saved_rt_elasticity =
|
||||
net->ipv6.sysctl.ip6_rt_gc_elasticity;
|
||||
|
||||
if (attempts-- > 0) {
|
||||
net->ipv6.sysctl.ip6_rt_gc_elasticity = 1;
|
||||
net->ipv6.sysctl.ip6_rt_gc_min_interval = 0;
|
||||
|
||||
ip6_dst_gc(net->ipv6.ip6_dst_ops);
|
||||
|
||||
net->ipv6.sysctl.ip6_rt_gc_elasticity =
|
||||
saved_rt_elasticity;
|
||||
net->ipv6.sysctl.ip6_rt_gc_min_interval =
|
||||
saved_rt_min_interval;
|
||||
goto retry;
|
||||
}
|
||||
|
||||
if (net_ratelimit())
|
||||
printk(KERN_WARNING
|
||||
"Neighbour table overflow.\n");
|
||||
dst_free(&rt->u.dst);
|
||||
return NULL;
|
||||
}
|
||||
rt->rt6i_nexthop = neigh;
|
||||
|
||||
}
|
||||
|
||||
|
@ -945,8 +976,11 @@ struct dst_entry *icmp6_dst_alloc(struct net_device *dev,
|
|||
dev_hold(dev);
|
||||
if (neigh)
|
||||
neigh_hold(neigh);
|
||||
else
|
||||
else {
|
||||
neigh = ndisc_get_neigh(dev, addr);
|
||||
if (IS_ERR(neigh))
|
||||
neigh = NULL;
|
||||
}
|
||||
|
||||
rt->rt6i_dev = dev;
|
||||
rt->rt6i_idev = idev;
|
||||
|
@ -1887,6 +1921,7 @@ struct rt6_info *addrconf_dst_alloc(struct inet6_dev *idev,
|
|||
{
|
||||
struct net *net = dev_net(idev->dev);
|
||||
struct rt6_info *rt = ip6_dst_alloc(net->ipv6.ip6_dst_ops);
|
||||
struct neighbour *neigh;
|
||||
|
||||
if (rt == NULL)
|
||||
return ERR_PTR(-ENOMEM);
|
||||
|
@ -1909,11 +1944,18 @@ struct rt6_info *addrconf_dst_alloc(struct inet6_dev *idev,
|
|||
rt->rt6i_flags |= RTF_ANYCAST;
|
||||
else
|
||||
rt->rt6i_flags |= RTF_LOCAL;
|
||||
rt->rt6i_nexthop = ndisc_get_neigh(rt->rt6i_dev, &rt->rt6i_gateway);
|
||||
if (rt->rt6i_nexthop == NULL) {
|
||||
neigh = ndisc_get_neigh(rt->rt6i_dev, &rt->rt6i_gateway);
|
||||
if (IS_ERR(neigh)) {
|
||||
dst_free(&rt->u.dst);
|
||||
return ERR_PTR(-ENOMEM);
|
||||
|
||||
/* We are casting this because that is the return
|
||||
* value type. But an errno encoded pointer is the
|
||||
* same regardless of the underlying pointer type,
|
||||
* and that's what we are returning. So this is OK.
|
||||
*/
|
||||
return (struct rt6_info *) neigh;
|
||||
}
|
||||
rt->rt6i_nexthop = neigh;
|
||||
|
||||
ipv6_addr_copy(&rt->rt6i_dst.addr, addr);
|
||||
rt->rt6i_dst.plen = 128;
|
||||
|
|
|
@ -494,7 +494,21 @@ static int iucv_sock_connect(struct socket *sock, struct sockaddr *addr,
|
|||
if (err) {
|
||||
iucv_path_free(iucv->path);
|
||||
iucv->path = NULL;
|
||||
err = -ECONNREFUSED;
|
||||
switch (err) {
|
||||
case 0x0b: /* Target communicator is not logged on */
|
||||
err = -ENETUNREACH;
|
||||
break;
|
||||
case 0x0d: /* Max connections for this guest exceeded */
|
||||
case 0x0e: /* Max connections for target guest exceeded */
|
||||
err = -EAGAIN;
|
||||
break;
|
||||
case 0x0f: /* Missing IUCV authorization */
|
||||
err = -EACCES;
|
||||
break;
|
||||
default:
|
||||
err = -ECONNREFUSED;
|
||||
break;
|
||||
}
|
||||
goto done;
|
||||
}
|
||||
|
||||
|
@ -507,6 +521,13 @@ static int iucv_sock_connect(struct socket *sock, struct sockaddr *addr,
|
|||
release_sock(sk);
|
||||
return -ECONNREFUSED;
|
||||
}
|
||||
|
||||
if (err) {
|
||||
iucv_path_sever(iucv->path, NULL);
|
||||
iucv_path_free(iucv->path);
|
||||
iucv->path = NULL;
|
||||
}
|
||||
|
||||
done:
|
||||
release_sock(sk);
|
||||
return err;
|
||||
|
@ -1021,12 +1042,14 @@ static int iucv_callback_connreq(struct iucv_path *path,
|
|||
ASCEBC(user_data, sizeof(user_data));
|
||||
if (sk->sk_state != IUCV_LISTEN) {
|
||||
err = iucv_path_sever(path, user_data);
|
||||
iucv_path_free(path);
|
||||
goto fail;
|
||||
}
|
||||
|
||||
/* Check for backlog size */
|
||||
if (sk_acceptq_is_full(sk)) {
|
||||
err = iucv_path_sever(path, user_data);
|
||||
iucv_path_free(path);
|
||||
goto fail;
|
||||
}
|
||||
|
||||
|
@ -1034,6 +1057,7 @@ static int iucv_callback_connreq(struct iucv_path *path,
|
|||
nsk = iucv_sock_alloc(NULL, SOCK_STREAM, GFP_ATOMIC);
|
||||
if (!nsk) {
|
||||
err = iucv_path_sever(path, user_data);
|
||||
iucv_path_free(path);
|
||||
goto fail;
|
||||
}
|
||||
|
||||
|
@ -1057,6 +1081,8 @@ static int iucv_callback_connreq(struct iucv_path *path,
|
|||
err = iucv_path_accept(path, &af_iucv_handler, nuser_data, nsk);
|
||||
if (err) {
|
||||
err = iucv_path_sever(path, user_data);
|
||||
iucv_path_free(path);
|
||||
iucv_sock_kill(nsk);
|
||||
goto fail;
|
||||
}
|
||||
|
||||
|
|
|
@ -517,6 +517,7 @@ static int iucv_enable(void)
|
|||
size_t alloc_size;
|
||||
int cpu, rc;
|
||||
|
||||
get_online_cpus();
|
||||
rc = -ENOMEM;
|
||||
alloc_size = iucv_max_pathid * sizeof(struct iucv_path);
|
||||
iucv_path_table = kzalloc(alloc_size, GFP_KERNEL);
|
||||
|
@ -524,19 +525,17 @@ static int iucv_enable(void)
|
|||
goto out;
|
||||
/* Declare per cpu buffers. */
|
||||
rc = -EIO;
|
||||
get_online_cpus();
|
||||
for_each_online_cpu(cpu)
|
||||
smp_call_function_single(cpu, iucv_declare_cpu, NULL, 1);
|
||||
if (cpus_empty(iucv_buffer_cpumask))
|
||||
/* No cpu could declare an iucv buffer. */
|
||||
goto out_path;
|
||||
goto out;
|
||||
put_online_cpus();
|
||||
return 0;
|
||||
|
||||
out_path:
|
||||
put_online_cpus();
|
||||
kfree(iucv_path_table);
|
||||
out:
|
||||
kfree(iucv_path_table);
|
||||
iucv_path_table = NULL;
|
||||
put_online_cpus();
|
||||
return rc;
|
||||
}
|
||||
|
||||
|
@ -551,8 +550,9 @@ static void iucv_disable(void)
|
|||
{
|
||||
get_online_cpus();
|
||||
on_each_cpu(iucv_retrieve_cpu, NULL, 1);
|
||||
put_online_cpus();
|
||||
kfree(iucv_path_table);
|
||||
iucv_path_table = NULL;
|
||||
put_online_cpus();
|
||||
}
|
||||
|
||||
static int __cpuinit iucv_cpu_notify(struct notifier_block *self,
|
||||
|
@ -589,10 +589,14 @@ static int __cpuinit iucv_cpu_notify(struct notifier_block *self,
|
|||
case CPU_ONLINE_FROZEN:
|
||||
case CPU_DOWN_FAILED:
|
||||
case CPU_DOWN_FAILED_FROZEN:
|
||||
if (!iucv_path_table)
|
||||
break;
|
||||
smp_call_function_single(cpu, iucv_declare_cpu, NULL, 1);
|
||||
break;
|
||||
case CPU_DOWN_PREPARE:
|
||||
case CPU_DOWN_PREPARE_FROZEN:
|
||||
if (!iucv_path_table)
|
||||
break;
|
||||
cpumask = iucv_buffer_cpumask;
|
||||
cpu_clear(cpu, cpumask);
|
||||
if (cpus_empty(cpumask))
|
||||
|
|
|
@ -54,10 +54,10 @@ static unsigned long rfkill_states_lockdflt[BITS_TO_LONGS(RFKILL_TYPE_MAX)];
|
|||
static bool rfkill_epo_lock_active;
|
||||
|
||||
|
||||
#ifdef CONFIG_RFKILL_LEDS
|
||||
static void rfkill_led_trigger(struct rfkill *rfkill,
|
||||
enum rfkill_state state)
|
||||
{
|
||||
#ifdef CONFIG_RFKILL_LEDS
|
||||
struct led_trigger *led = &rfkill->led_trigger;
|
||||
|
||||
if (!led->name)
|
||||
|
@ -66,10 +66,8 @@ static void rfkill_led_trigger(struct rfkill *rfkill,
|
|||
led_trigger_event(led, LED_OFF);
|
||||
else
|
||||
led_trigger_event(led, LED_FULL);
|
||||
#endif /* CONFIG_RFKILL_LEDS */
|
||||
}
|
||||
|
||||
#ifdef CONFIG_RFKILL_LEDS
|
||||
static void rfkill_led_trigger_activate(struct led_classdev *led)
|
||||
{
|
||||
struct rfkill *rfkill = container_of(led->trigger,
|
||||
|
|
|
@ -638,8 +638,9 @@ static int u32_change(struct tcf_proto *tp, unsigned long base, u32 handle,
|
|||
break;
|
||||
|
||||
n->next = *ins;
|
||||
wmb();
|
||||
tcf_tree_lock(tp);
|
||||
*ins = n;
|
||||
tcf_tree_unlock(tp);
|
||||
|
||||
*arg = (unsigned long)n;
|
||||
return 0;
|
||||
|
|
Loading…
Reference in New Issue