pinctrl: aspeed-g6: Fix UART13 group pinmux
When UART13G1 is set the pinmux configuration in SCU4B8 for UART13G0 should be cleared. Fixes: 58dc52ad00a0 ("pinctrl: aspeed: Add AST2600 pinmux support") Signed-off-by: Johnny Huang <johnny_huang@aspeedtech.com> [AJ: Tweak commit message] Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Link: https://lore.kernel.org/r/20191008044153.12734-7-andrew@aj.id.au Reviewed-by: Joel Stanley <joel@jms.id.au> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This commit is contained in:
parent
c136d4c71f
commit
1550583432
|
@ -1262,13 +1262,13 @@ GROUP_DECL(SPI1, AB11, AC11, AA11);
|
|||
#define AD11 206
|
||||
SIG_EXPR_LIST_DECL_SEMG(AD11, SPI1DQ2, QSPI1, SPI1, SIG_DESC_SET(SCU438, 14));
|
||||
SIG_EXPR_LIST_DECL_SEMG(AD11, TXD13, UART13G1, UART13,
|
||||
SIG_DESC_SET(SCU438, 14));
|
||||
SIG_DESC_CLEAR(SCU4B8, 2), SIG_DESC_SET(SCU4D8, 14));
|
||||
PIN_DECL_2(AD11, GPIOZ6, SPI1DQ2, TXD13);
|
||||
|
||||
#define AF10 207
|
||||
SIG_EXPR_LIST_DECL_SEMG(AF10, SPI1DQ3, QSPI1, SPI1, SIG_DESC_SET(SCU438, 15));
|
||||
SIG_EXPR_LIST_DECL_SEMG(AF10, RXD13, UART13G1, UART13,
|
||||
SIG_DESC_SET(SCU438, 15));
|
||||
SIG_DESC_CLEAR(SCU4B8, 3), SIG_DESC_SET(SCU4D8, 15));
|
||||
PIN_DECL_2(AF10, GPIOZ7, SPI1DQ3, RXD13);
|
||||
|
||||
GROUP_DECL(QSPI1, AB11, AC11, AA11, AD11, AF10);
|
||||
|
|
Loading…
Reference in New Issue