crypto: qat - fix incorrect accelerator mask for C3X devices
Fix incorrect value of ADF_C3XXX_ACCELERATORS_MASK. Signed-off-by: Maksim Lukoshkov <maksim.lukoshkov@intel.com> Signed-off-by: Giovanni Cabiddu <giovanni.cabiddu@intel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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@ -55,7 +55,7 @@
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#define ADF_C3XXX_MAX_ACCELERATORS 3
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#define ADF_C3XXX_MAX_ACCELENGINES 6
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#define ADF_C3XXX_ACCELERATORS_REG_OFFSET 16
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#define ADF_C3XXX_ACCELERATORS_MASK 0x3
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#define ADF_C3XXX_ACCELERATORS_MASK 0x7
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#define ADF_C3XXX_ACCELENGINES_MASK 0x3F
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#define ADF_C3XXX_ETR_MAX_BANKS 16
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#define ADF_C3XXX_SMIAPF0_MASK_OFFSET (0x3A000 + 0x28)
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