ARM: dts: sun6i: Add security system crypto engine clock and device nodes
A31/A31s have the same "Security System" crypto engine as A10/A20, but with a separate reset control. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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@ -346,6 +346,14 @@
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"mmc3_sample";
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};
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ss_clk: clk@01c2009c {
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#clock-cells = <0>;
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compatible = "allwinner,sun4i-a10-mod0-clk";
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reg = <0x01c2009c 0x4>;
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clocks = <&osc24M>, <&pll6 0>;
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clock-output-names = "ss";
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};
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spi0_clk: clk@01c200a0 {
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#clock-cells = <0>;
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compatible = "allwinner,sun4i-a10-mod0-clk";
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@ -870,6 +878,16 @@
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#size-cells = <0>;
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};
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crypto: crypto-engine@01c15000 {
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compatible = "allwinner,sun4i-a10-crypto";
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reg = <0x01c15000 0x1000>;
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interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&ahb1_gates 5>, <&ss_clk>;
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clock-names = "ahb", "mod";
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resets = <&ahb1_rst 5>;
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reset-names = "ahb";
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};
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timer@01c60000 {
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compatible = "allwinner,sun6i-a31-hstimer",
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"allwinner,sun7i-a20-hstimer";
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