ARM: imx: set cache line size to 64 bytes for i.MX5
The core of i.MX5 series is cortex-A8, its cache line size is 64 bytes instead of 32 bytes. Refer to the OMAP3's selection, we choose 64 bytes for i.MX5, this can increase a little bit performance when perform cache operations. Signed-off-by: Jason Wang <jason77.wang@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This commit is contained in:
parent
7f67bff586
commit
14f0f512ba
|
@ -43,6 +43,7 @@ config ARCH_MXC91231
|
||||||
config ARCH_MX5
|
config ARCH_MX5
|
||||||
bool "MX5-based"
|
bool "MX5-based"
|
||||||
select CPU_V7
|
select CPU_V7
|
||||||
|
select ARM_L1_CACHE_SHIFT_6
|
||||||
help
|
help
|
||||||
This enables support for systems based on the Freescale i.MX51 family
|
This enables support for systems based on the Freescale i.MX51 family
|
||||||
|
|
||||||
|
|
Loading…
Reference in New Issue