crypto: chcr - Select device in Round Robin fashion
When multiple devices are present in system select device in round-robin fashion for crypto operations Signed-off-by: Atul Gupta <atul.gupta@chelsio.com> Reviewed-by: Ganesh Goudar <ganeshgr@chelsio.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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@ -1216,7 +1216,7 @@ static int chcr_aes_decrypt(struct ablkcipher_request *req)
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static int chcr_device_init(struct chcr_context *ctx)
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{
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struct uld_ctx *u_ctx;
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struct uld_ctx *u_ctx = NULL;
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struct adapter *adap;
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unsigned int id;
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int txq_perchan, txq_idx, ntxq;
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@ -1224,12 +1224,12 @@ static int chcr_device_init(struct chcr_context *ctx)
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id = smp_processor_id();
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if (!ctx->dev) {
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err = assign_chcr_device(&ctx->dev);
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if (err) {
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u_ctx = assign_chcr_device();
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if (!u_ctx) {
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pr_err("chcr device assignment fails\n");
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goto out;
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}
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u_ctx = ULD_CTX(ctx);
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ctx->dev = u_ctx->dev;
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adap = padap(ctx->dev);
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ntxq = min_not_zero((unsigned int)u_ctx->lldi.nrxq,
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adap->vres.ncrypto_fc);
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@ -29,6 +29,7 @@
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static LIST_HEAD(uld_ctx_list);
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static DEFINE_MUTEX(dev_mutex);
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static atomic_t dev_count;
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static struct uld_ctx *ctx_rr;
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typedef int (*chcr_handler_func)(struct chcr_dev *dev, unsigned char *input);
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static int cpl_fw6_pld_handler(struct chcr_dev *dev, unsigned char *input);
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@ -49,25 +50,28 @@ static struct cxgb4_uld_info chcr_uld_info = {
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.rx_handler = chcr_uld_rx_handler,
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};
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int assign_chcr_device(struct chcr_dev **dev)
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struct uld_ctx *assign_chcr_device(void)
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{
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struct uld_ctx *u_ctx;
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int ret = -ENXIO;
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struct uld_ctx *u_ctx = NULL;
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/*
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* Which device to use if multiple devices are available TODO
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* May be select the device based on round robin. One session
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* must go to the same device to maintain the ordering.
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* When multiple devices are present in system select
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* device in round-robin fashion for crypto operations
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* Although One session must use the same device to
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* maintain request-response ordering.
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*/
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mutex_lock(&dev_mutex); /* TODO ? */
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list_for_each_entry(u_ctx, &uld_ctx_list, entry)
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if (u_ctx->dev) {
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*dev = u_ctx->dev;
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ret = 0;
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break;
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mutex_lock(&dev_mutex);
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if (!list_empty(&uld_ctx_list)) {
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u_ctx = ctx_rr;
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if (list_is_last(&ctx_rr->entry, &uld_ctx_list))
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ctx_rr = list_first_entry(&uld_ctx_list,
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struct uld_ctx,
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entry);
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else
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ctx_rr = list_next_entry(ctx_rr, entry);
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}
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mutex_unlock(&dev_mutex);
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return ret;
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return u_ctx;
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}
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static int chcr_dev_add(struct uld_ctx *u_ctx)
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@ -82,11 +86,27 @@ static int chcr_dev_add(struct uld_ctx *u_ctx)
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u_ctx->dev = dev;
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dev->u_ctx = u_ctx;
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atomic_inc(&dev_count);
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mutex_lock(&dev_mutex);
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list_add_tail(&u_ctx->entry, &uld_ctx_list);
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if (!ctx_rr)
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ctx_rr = u_ctx;
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mutex_unlock(&dev_mutex);
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return 0;
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}
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static int chcr_dev_remove(struct uld_ctx *u_ctx)
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{
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if (ctx_rr == u_ctx) {
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if (list_is_last(&ctx_rr->entry, &uld_ctx_list))
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ctx_rr = list_first_entry(&uld_ctx_list,
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struct uld_ctx,
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entry);
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else
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ctx_rr = list_next_entry(ctx_rr, entry);
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}
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list_del(&u_ctx->entry);
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if (list_empty(&uld_ctx_list))
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ctx_rr = NULL;
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kfree(u_ctx->dev);
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u_ctx->dev = NULL;
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atomic_dec(&dev_count);
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@ -139,10 +159,11 @@ static void *chcr_uld_add(const struct cxgb4_lld_info *lld)
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u_ctx = ERR_PTR(-ENOMEM);
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goto out;
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}
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if (!(lld->ulp_crypto & ULP_CRYPTO_LOOKASIDE)) {
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u_ctx = ERR_PTR(-ENOMEM);
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goto out;
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}
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u_ctx->lldi = *lld;
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mutex_lock(&dev_mutex);
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list_add_tail(&u_ctx->entry, &uld_ctx_list);
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mutex_unlock(&dev_mutex);
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out:
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return u_ctx;
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}
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@ -89,7 +89,7 @@ struct uld_ctx {
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struct chcr_dev *dev;
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};
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int assign_chcr_device(struct chcr_dev **dev);
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struct uld_ctx * assign_chcr_device(void);
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int chcr_send_wr(struct sk_buff *skb);
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int start_crypto(void);
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int stop_crypto(void);
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@ -642,6 +642,7 @@ static void uld_init(struct adapter *adap, struct cxgb4_lld_info *lld)
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lld->sge_ingpadboundary = adap->sge.fl_align;
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lld->sge_egrstatuspagesize = adap->sge.stat_len;
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lld->sge_pktshift = adap->sge.pktshift;
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lld->ulp_crypto = adap->params.crypto;
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lld->enable_fw_ofld_conn = adap->flags & FW_OFLD_CONN;
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lld->max_ordird_qp = adap->params.max_ordird_qp;
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lld->max_ird_adapter = adap->params.max_ird_adapter;
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@ -331,6 +331,7 @@ struct cxgb4_lld_info {
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unsigned int iscsi_tagmask; /* iscsi ddp tag mask */
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unsigned int iscsi_pgsz_order; /* iscsi ddp page size orders */
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unsigned int iscsi_llimit; /* chip's iscsi region llimit */
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unsigned int ulp_crypto; /* crypto lookaside support */
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void **iscsi_ppm; /* iscsi page pod manager */
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int nodeid; /* device numa node id */
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bool fr_nsmr_tpte_wr_support; /* FW supports FR_NSMR_TPTE_WR */
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