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tools/power/x86/intel-speed-select: Display TRL buckets for just base config level 

When only base config level is present, this tool is displaying TRL
(Turbo-ratio-limits) by reading legacy MSR. In this case, also present
core count for TRL by reading MSR 0x1AE.

Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
This commit is contained in:
Srinivas Pandruvada 2019-11-19 16:22:54 -08:00 committed by Andy Shevchenko
parent 20183ccd3e
commit 1434a3d357
1 changed files with 1 additions and 0 deletions
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tools/power/x86/intel-speed-select/isst-core.c
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@ -681,6 +681,7 @@ int isst_get_process_ctdp(int cpu, int tdp_level, struct isst_pkg_ctdp *pkg_dev)
} }
isst_get_get_trl_from_msr(cpu, ctdp_level->trl_sse_active_cores); isst_get_get_trl_from_msr(cpu, ctdp_level->trl_sse_active_cores);
isst_get_trl_bucket_info(cpu, &ctdp_level->buckets_info);
continue; continue;
} }