SoCFPGA DTS updates for v4.12
- Clean-up: - Add clock/memory nodes - Add labels for CPU nodes - Remove unused unit names and reg - Remove unused skeleton.dtsi - Add support for PMU - Add QSPI for sodia board - Add Reset controller for Arria10 -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJY5QMGAAoJEBmUBAuBoyj0jnoQAI/2crSgCDlXacGwoKMDKcg7 xHerNEAICuR3NS+vQcqFkik3I2D6bYjGA49JWD9WtiMWfiNJ3v7ytPN3IGMPmCjm uJUg4F0AZ3gwTec0K8UrCSud9FHBvZ41K6RMNpTLAUGJwktpvZpcZZCXL34K+j0N etekZ/Xt7IkuF2eOOiR45dEZwKJzx6Vqkm+tA2z72fNIqrTWItiJdFkH89Wmxghf IqcjlegLU9B3WdUqoPWOS1nZPkjVSEso4bBZGZCUH0hN3j4mLzZ1kRVICFtFY/BB P/TRSIfNaUkPq6kXsbCW8I2Qi3+vPubpZYx0GevEYp5oQbZSQlf/oKPpOTAwAxLr 0FRQ8jQJzwfasuLsrsn2MEG5UwcaXmu7xziR78hd4ncepipdzQzTFhO4cCRx1PXI qi068+8PpoeStoMaRzQDPUnkGE1OM0nD5FDOIs7xZtjE3tscax2rSnI5NU9/aYcw fwgRpyXIomRM4aDes/4nIajm9rhJLecrMRcBHLM/eoQWIMGBue4CTlGxKQ/dqqyq IxrG64g2Aye9fE9wg3Bt5RoDTYxnPnYp8L/J6+FNWtfXAV3sbbGJxxPyntVJYZLI nIOsFXWAgRw/bZl1QDnp3N2UbD3v/430xLASlrlmUVD4KWQ5Unel0Ui2K5BthvMM F1iwwShISYT8Z4SCiYiN =EeLo -----END PGP SIGNATURE----- Merge tag 'socfpga_dts_for_v4.12' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux into next/dt SoCFPGA DTS updates for v4.12 - Clean-up: - Add clock/memory nodes - Add labels for CPU nodes - Remove unused unit names and reg - Remove unused skeleton.dtsi - Add support for PMU - Add QSPI for sodia board - Add Reset controller for Arria10 * tag 'socfpga_dts_for_v4.12' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux: ARM: dts: socfpga: Add Devkit A10-SR Reset Controller ARM: dts: socfpga: sodia: enable qspi ARM: dts: socfpga: Add support for PMU ARM: dts: socfpga: Add labels for CPU nodes ARM: dts: socfpga: Do not include skeleton.dtsi ARM: dts: socfpga: Remove unit name for LEDs in EBV SOCrates ARM: dts: socfpga: Remove unneeded reg from stmpe_touchscreen ARM: dts: socfpga: Remove unneeded unit names ARM: dts: socfpga: Add unit name to memory nodes ARM: dts: socfpga: Add unit name to clock nodes Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson
commit
1409ce036c
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@ -15,7 +15,6 @@
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include "skeleton.dtsi"
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#include <dt-bindings/reset/altr,rst-mgr.h>
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/ {
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@ -38,13 +37,13 @@
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#size-cells = <0>;
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enable-method = "altr,socfpga-smp";
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cpu@0 {
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cpu0: cpu@0 {
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compatible = "arm,cortex-a9";
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device_type = "cpu";
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reg = <0>;
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next-level-cache = <&L2>;
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};
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cpu@1 {
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cpu1: cpu@1 {
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compatible = "arm,cortex-a9";
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device_type = "cpu";
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reg = <1>;
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@ -52,6 +51,15 @@
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};
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};
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pmu: pmu@ff111000 {
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compatible = "arm,cortex-a9-pmu";
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interrupt-parent = <&intc>;
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interrupts = <0 176 4>, <0 177 4>;
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interrupt-affinity = <&cpu0>, <&cpu1>;
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reg = <0xff111000 0x1000>,
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<0xff113000 0x1000>;
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};
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intc: intc@fffed000 {
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compatible = "arm,cortex-a9-gic";
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#interrupt-cells = <3>;
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@ -145,7 +153,7 @@
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compatible = "fixed-clock";
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};
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main_pll: main_pll {
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main_pll: main_pll@40 {
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#address-cells = <1>;
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#size-cells = <0>;
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#clock-cells = <0>;
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@ -153,7 +161,7 @@
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clocks = <&osc1>;
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reg = <0x40>;
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mpuclk: mpuclk {
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mpuclk: mpuclk@48 {
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#clock-cells = <0>;
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compatible = "altr,socfpga-perip-clk";
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clocks = <&main_pll>;
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@ -161,7 +169,7 @@
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reg = <0x48>;
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};
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mainclk: mainclk {
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mainclk: mainclk@4c {
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#clock-cells = <0>;
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compatible = "altr,socfpga-perip-clk";
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clocks = <&main_pll>;
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@ -169,7 +177,7 @@
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reg = <0x4C>;
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};
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dbg_base_clk: dbg_base_clk {
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dbg_base_clk: dbg_base_clk@50 {
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#clock-cells = <0>;
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compatible = "altr,socfpga-perip-clk";
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clocks = <&main_pll>, <&osc1>;
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@ -177,21 +185,21 @@
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reg = <0x50>;
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};
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main_qspi_clk: main_qspi_clk {
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main_qspi_clk: main_qspi_clk@54 {
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#clock-cells = <0>;
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compatible = "altr,socfpga-perip-clk";
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clocks = <&main_pll>;
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reg = <0x54>;
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};
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main_nand_sdmmc_clk: main_nand_sdmmc_clk {
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main_nand_sdmmc_clk: main_nand_sdmmc_clk@58 {
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#clock-cells = <0>;
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compatible = "altr,socfpga-perip-clk";
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clocks = <&main_pll>;
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reg = <0x58>;
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};
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cfg_h2f_usr0_clk: cfg_h2f_usr0_clk {
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cfg_h2f_usr0_clk: cfg_h2f_usr0_clk@5c {
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#clock-cells = <0>;
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compatible = "altr,socfpga-perip-clk";
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clocks = <&main_pll>;
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@ -199,7 +207,7 @@
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};
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};
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periph_pll: periph_pll {
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periph_pll: periph_pll@80 {
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#address-cells = <1>;
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#size-cells = <0>;
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#clock-cells = <0>;
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@ -207,42 +215,42 @@
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clocks = <&osc1>, <&osc2>, <&f2s_periph_ref_clk>;
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reg = <0x80>;
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emac0_clk: emac0_clk {
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emac0_clk: emac0_clk@88 {
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#clock-cells = <0>;
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compatible = "altr,socfpga-perip-clk";
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clocks = <&periph_pll>;
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reg = <0x88>;
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};
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emac1_clk: emac1_clk {
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emac1_clk: emac1_clk@8c {
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#clock-cells = <0>;
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compatible = "altr,socfpga-perip-clk";
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clocks = <&periph_pll>;
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reg = <0x8C>;
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};
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per_qspi_clk: per_qsi_clk {
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per_qspi_clk: per_qsi_clk@90 {
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#clock-cells = <0>;
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compatible = "altr,socfpga-perip-clk";
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clocks = <&periph_pll>;
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reg = <0x90>;
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};
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per_nand_mmc_clk: per_nand_mmc_clk {
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per_nand_mmc_clk: per_nand_mmc_clk@94 {
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#clock-cells = <0>;
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compatible = "altr,socfpga-perip-clk";
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clocks = <&periph_pll>;
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reg = <0x94>;
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};
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per_base_clk: per_base_clk {
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per_base_clk: per_base_clk@98 {
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#clock-cells = <0>;
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compatible = "altr,socfpga-perip-clk";
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clocks = <&periph_pll>;
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reg = <0x98>;
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};
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h2f_usr1_clk: h2f_usr1_clk {
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h2f_usr1_clk: h2f_usr1_clk@9c {
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#clock-cells = <0>;
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compatible = "altr,socfpga-perip-clk";
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clocks = <&periph_pll>;
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@ -250,7 +258,7 @@
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};
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};
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sdram_pll: sdram_pll {
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sdram_pll: sdram_pll@c0 {
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#address-cells = <1>;
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#size-cells = <0>;
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#clock-cells = <0>;
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@ -258,28 +266,28 @@
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clocks = <&osc1>, <&osc2>, <&f2s_sdram_ref_clk>;
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reg = <0xC0>;
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ddr_dqs_clk: ddr_dqs_clk {
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ddr_dqs_clk: ddr_dqs_clk@c8 {
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#clock-cells = <0>;
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compatible = "altr,socfpga-perip-clk";
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clocks = <&sdram_pll>;
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reg = <0xC8>;
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};
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ddr_2x_dqs_clk: ddr_2x_dqs_clk {
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ddr_2x_dqs_clk: ddr_2x_dqs_clk@cc {
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#clock-cells = <0>;
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compatible = "altr,socfpga-perip-clk";
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clocks = <&sdram_pll>;
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reg = <0xCC>;
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};
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ddr_dq_clk: ddr_dq_clk {
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ddr_dq_clk: ddr_dq_clk@d0 {
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#clock-cells = <0>;
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compatible = "altr,socfpga-perip-clk";
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clocks = <&sdram_pll>;
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reg = <0xD0>;
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};
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h2f_usr2_clk: h2f_usr2_clk {
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h2f_usr2_clk: h2f_usr2_clk@d4 {
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#clock-cells = <0>;
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compatible = "altr,socfpga-perip-clk";
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clocks = <&sdram_pll>;
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@ -678,7 +686,7 @@
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status = "disabled";
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};
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eccmgr: eccmgr@ffd08140 {
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eccmgr: eccmgr {
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compatible = "altr,socfpga-ecc-manager";
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#address-cells = <1>;
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#size-cells = <1>;
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@ -879,7 +887,7 @@
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dma-names = "tx", "rx";
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};
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usbphy0: usbphy@0 {
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usbphy0: usbphy {
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#phy-cells = <0>;
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compatible = "usb-nop-xceiv";
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status = "okay";
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@ -14,7 +14,6 @@
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* this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include "skeleton.dtsi"
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/reset/altr,rst-mgr-a10.h>
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@ -119,7 +118,7 @@
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compatible = "fixed-clock";
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};
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main_pll: main_pll {
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main_pll: main_pll@40 {
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#address-cells = <1>;
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#size-cells = <0>;
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#clock-cells = <0>;
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@ -142,35 +141,35 @@
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div-reg = <0x144 0 11>;
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};
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main_emaca_clk: main_emaca_clk {
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main_emaca_clk: main_emaca_clk@68 {
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#clock-cells = <0>;
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compatible = "altr,socfpga-a10-perip-clk";
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clocks = <&main_pll>;
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reg = <0x68>;
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};
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main_emacb_clk: main_emacb_clk {
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main_emacb_clk: main_emacb_clk@6c {
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#clock-cells = <0>;
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compatible = "altr,socfpga-a10-perip-clk";
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clocks = <&main_pll>;
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reg = <0x6C>;
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};
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main_emac_ptp_clk: main_emac_ptp_clk {
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main_emac_ptp_clk: main_emac_ptp_clk@70 {
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#clock-cells = <0>;
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compatible = "altr,socfpga-a10-perip-clk";
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clocks = <&main_pll>;
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reg = <0x70>;
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};
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main_gpio_db_clk: main_gpio_db_clk {
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main_gpio_db_clk: main_gpio_db_clk@74 {
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#clock-cells = <0>;
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compatible = "altr,socfpga-a10-perip-clk";
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clocks = <&main_pll>;
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reg = <0x74>;
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};
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main_sdmmc_clk: main_sdmmc_clk {
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main_sdmmc_clk: main_sdmmc_clk@78 {
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#clock-cells = <0>;
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compatible = "altr,socfpga-a10-perip-clk"
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;
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@ -178,28 +177,28 @@
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reg = <0x78>;
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};
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main_s2f_usr0_clk: main_s2f_usr0_clk {
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main_s2f_usr0_clk: main_s2f_usr0_clk@7c {
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#clock-cells = <0>;
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compatible = "altr,socfpga-a10-perip-clk";
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clocks = <&main_pll>;
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reg = <0x7C>;
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};
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main_s2f_usr1_clk: main_s2f_usr1_clk {
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main_s2f_usr1_clk: main_s2f_usr1_clk@80 {
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#clock-cells = <0>;
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compatible = "altr,socfpga-a10-perip-clk";
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clocks = <&main_pll>;
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reg = <0x80>;
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};
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main_hmc_pll_ref_clk: main_hmc_pll_ref_clk {
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main_hmc_pll_ref_clk: main_hmc_pll_ref_clk@84 {
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#clock-cells = <0>;
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compatible = "altr,socfpga-a10-perip-clk";
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clocks = <&main_pll>;
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reg = <0x84>;
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};
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main_periph_ref_clk: main_periph_ref_clk {
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main_periph_ref_clk: main_periph_ref_clk@9c {
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#clock-cells = <0>;
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compatible = "altr,socfpga-a10-perip-clk";
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clocks = <&main_pll>;
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@ -207,7 +206,7 @@
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};
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};
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periph_pll: periph_pll {
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periph_pll: periph_pll@c0 {
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#address-cells = <1>;
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#size-cells = <0>;
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#clock-cells = <0>;
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@ -230,56 +229,56 @@
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div-reg = <0x144 16 11>;
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};
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peri_emaca_clk: peri_emaca_clk {
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peri_emaca_clk: peri_emaca_clk@e8 {
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#clock-cells = <0>;
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compatible = "altr,socfpga-a10-perip-clk";
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clocks = <&periph_pll>;
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reg = <0xE8>;
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};
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peri_emacb_clk: peri_emacb_clk {
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peri_emacb_clk: peri_emacb_clk@ec {
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#clock-cells = <0>;
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compatible = "altr,socfpga-a10-perip-clk";
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clocks = <&periph_pll>;
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reg = <0xEC>;
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};
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peri_emac_ptp_clk: peri_emac_ptp_clk {
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peri_emac_ptp_clk: peri_emac_ptp_clk@f0 {
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#clock-cells = <0>;
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compatible = "altr,socfpga-a10-perip-clk";
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clocks = <&periph_pll>;
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reg = <0xF0>;
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};
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peri_gpio_db_clk: peri_gpio_db_clk {
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peri_gpio_db_clk: peri_gpio_db_clk@f4 {
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#clock-cells = <0>;
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compatible = "altr,socfpga-a10-perip-clk";
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clocks = <&periph_pll>;
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reg = <0xF4>;
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};
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peri_sdmmc_clk: peri_sdmmc_clk {
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peri_sdmmc_clk: peri_sdmmc_clk@f8 {
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#clock-cells = <0>;
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compatible = "altr,socfpga-a10-perip-clk";
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clocks = <&periph_pll>;
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reg = <0xF8>;
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};
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peri_s2f_usr0_clk: peri_s2f_usr0_clk {
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peri_s2f_usr0_clk: peri_s2f_usr0_clk@fc {
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#clock-cells = <0>;
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compatible = "altr,socfpga-a10-perip-clk";
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clocks = <&periph_pll>;
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reg = <0xFC>;
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};
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peri_s2f_usr1_clk: peri_s2f_usr1_clk {
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peri_s2f_usr1_clk: peri_s2f_usr1_clk@100 {
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#clock-cells = <0>;
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compatible = "altr,socfpga-a10-perip-clk";
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clocks = <&periph_pll>;
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reg = <0x100>;
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};
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peri_hmc_pll_ref_clk: peri_hmc_pll_ref_clk {
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||||
peri_hmc_pll_ref_clk: peri_hmc_pll_ref_clk@104 {
|
||||
#clock-cells = <0>;
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||||
compatible = "altr,socfpga-a10-perip-clk";
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clocks = <&periph_pll>;
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|
@ -287,7 +286,7 @@
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};
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||||
};
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mpu_free_clk: mpu_free_clk {
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mpu_free_clk: mpu_free_clk@60 {
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#clock-cells = <0>;
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||||
compatible = "altr,socfpga-a10-perip-clk";
|
||||
clocks = <&main_mpu_base_clk>, <&peri_mpu_base_clk>,
|
||||
|
|
@ -296,7 +295,7 @@
|
|||
reg = <0x60>;
|
||||
};
|
||||
|
||||
noc_free_clk: noc_free_clk {
|
||||
noc_free_clk: noc_free_clk@64 {
|
||||
#clock-cells = <0>;
|
||||
compatible = "altr,socfpga-a10-perip-clk";
|
||||
clocks = <&main_noc_base_clk>, <&peri_noc_base_clk>,
|
||||
|
|
@ -305,7 +304,7 @@
|
|||
reg = <0x64>;
|
||||
};
|
||||
|
||||
s2f_user1_free_clk: s2f_user1_free_clk {
|
||||
s2f_user1_free_clk: s2f_user1_free_clk@104 {
|
||||
#clock-cells = <0>;
|
||||
compatible = "altr,socfpga-a10-perip-clk";
|
||||
clocks = <&main_s2f_usr1_clk>, <&peri_s2f_usr1_clk>,
|
||||
|
|
@ -314,7 +313,7 @@
|
|||
reg = <0x104>;
|
||||
};
|
||||
|
||||
sdmmc_free_clk: sdmmc_free_clk {
|
||||
sdmmc_free_clk: sdmmc_free_clk@f8 {
|
||||
#clock-cells = <0>;
|
||||
compatible = "altr,socfpga-a10-perip-clk";
|
||||
clocks = <&main_sdmmc_clk>, <&peri_sdmmc_clk>,
|
||||
|
|
@ -649,7 +648,7 @@
|
|||
reg = <0xffe00000 0x40000>;
|
||||
};
|
||||
|
||||
eccmgr: eccmgr@ffd06000 {
|
||||
eccmgr: eccmgr {
|
||||
compatible = "altr,socfpga-a10-ecc-manager";
|
||||
altr,sysmgr-syscon = <&sysmgr>;
|
||||
#address-cells = <1>;
|
||||
|
|
@ -806,7 +805,7 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
usbphy0: usbphy@0 {
|
||||
usbphy0: usbphy {
|
||||
#phy-cells = <0>;
|
||||
compatible = "usb-nop-xceiv";
|
||||
status = "okay";
|
||||
|
|
|
|||
|
|
@ -30,7 +30,7 @@
|
|||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
|
||||
memory {
|
||||
memory@0 {
|
||||
name = "memory";
|
||||
device_type = "memory";
|
||||
reg = <0x0 0x40000000>; /* 1GB */
|
||||
|
|
@ -121,6 +121,11 @@
|
|||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
};
|
||||
|
||||
a10sr_rst: reset-controller {
|
||||
compatible = "altr,a10sr-reset";
|
||||
#reset-cells = <1>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -26,7 +26,7 @@
|
|||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
|
||||
memory {
|
||||
memory@0 {
|
||||
name = "memory";
|
||||
device_type = "memory";
|
||||
reg = <0x0 0x40000000>; /* 1GB */
|
||||
|
|
|
|||
|
|
@ -25,7 +25,7 @@
|
|||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
|
||||
memory {
|
||||
memory@0 {
|
||||
name = "memory";
|
||||
device_type = "memory";
|
||||
reg = <0x0 0x40000000>; /* 1GB */
|
||||
|
|
|
|||
|
|
@ -21,7 +21,7 @@
|
|||
model = "Aries/DENX MCV";
|
||||
compatible = "altr,socfpga-cyclone5", "altr,socfpga";
|
||||
|
||||
memory {
|
||||
memory@0 {
|
||||
name = "memory";
|
||||
device_type = "memory";
|
||||
reg = <0x0 0x40000000>; /* 1 GiB */
|
||||
|
|
|
|||
|
|
@ -71,7 +71,6 @@
|
|||
|
||||
stmpe_touchscreen {
|
||||
compatible = "st,stmpe-ts";
|
||||
reg = <0>;
|
||||
ts,sample-time = <4>;
|
||||
ts,mod-12b = <1>;
|
||||
ts,ref-sel = <0>;
|
||||
|
|
|
|||
|
|
@ -26,7 +26,7 @@
|
|||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
|
||||
memory {
|
||||
memory@0 {
|
||||
name = "memory";
|
||||
device_type = "memory";
|
||||
reg = <0x0 0x40000000>; /* 1GB */
|
||||
|
|
|
|||
|
|
@ -26,7 +26,7 @@
|
|||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
|
||||
memory {
|
||||
memory@0 {
|
||||
name = "memory";
|
||||
device_type = "memory";
|
||||
reg = <0x0 0x40000000>; /* 1GB */
|
||||
|
|
|
|||
|
|
@ -25,7 +25,7 @@
|
|||
bootargs = "console=ttyS0,115200";
|
||||
};
|
||||
|
||||
memory {
|
||||
memory@0 {
|
||||
name = "memory";
|
||||
device_type = "memory";
|
||||
reg = <0x0 0x40000000>; /* 1GB */
|
||||
|
|
@ -60,18 +60,18 @@
|
|||
&leds {
|
||||
compatible = "gpio-leds";
|
||||
|
||||
led@0 {
|
||||
led0 {
|
||||
label = "led:green:heartbeat";
|
||||
gpios = <&porta 28 1>;
|
||||
linux,default-trigger = "heartbeat";
|
||||
};
|
||||
|
||||
led@1 {
|
||||
led1 {
|
||||
label = "led:green:D7";
|
||||
gpios = <&portb 19 1>;
|
||||
};
|
||||
|
||||
led@2 {
|
||||
led2 {
|
||||
label = "led:green:D8";
|
||||
gpios = <&portb 25 1>;
|
||||
};
|
||||
|
|
|
|||
|
|
@ -28,7 +28,7 @@
|
|||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
|
||||
memory {
|
||||
memory@0 {
|
||||
name = "memory";
|
||||
device_type = "memory";
|
||||
reg = <0x0 0x40000000>;
|
||||
|
|
@ -121,3 +121,24 @@
|
|||
&usb1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&qspi {
|
||||
status = "okay";
|
||||
|
||||
flash0: n25q512a@0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "n25q512a";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <100000000>;
|
||||
|
||||
m25p,fast-read;
|
||||
cdns,page-size = <256>;
|
||||
cdns,block-size = <16>;
|
||||
cdns,read-delay = <4>;
|
||||
cdns,tshsl-ns = <50>;
|
||||
cdns,tsd2d-ns = <50>;
|
||||
cdns,tchsh-ns = <4>;
|
||||
cdns,tslch-ns = <4>;
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -57,7 +57,7 @@
|
|||
bootargs = "console=ttyS0,115200";
|
||||
};
|
||||
|
||||
memory {
|
||||
memory@0 {
|
||||
name = "memory";
|
||||
device_type = "memory";
|
||||
reg = <0x0 0x40000000>; /* 1GB */
|
||||
|
|
|
|||
|
|
@ -26,7 +26,7 @@
|
|||
bootargs = "console=ttyS0,57600";
|
||||
};
|
||||
|
||||
memory {
|
||||
memory@0 {
|
||||
name = "memory";
|
||||
device_type = "memory";
|
||||
reg = <0x0 0x40000000>; /* 1 GB */
|
||||
|
|
|
|||
Loading…
Reference in New Issue