drm/radeon/kms: move ucode defines to a separate header
Avoids confusion and duplication. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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29a1522189
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138e4e16f0
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@ -33,9 +33,7 @@
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#include "avivod.h"
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#include "evergreen_reg.h"
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#include "evergreen_blit_shaders.h"
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#define EVERGREEN_PFP_UCODE_SIZE 1120
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#define EVERGREEN_PM4_UCODE_SIZE 1376
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#include "radeon_ucode.h"
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static const u32 crtc_offsets[6] =
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{
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@ -33,6 +33,7 @@
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#include "atom.h"
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#include "ni_reg.h"
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#include "cayman_blit_shaders.h"
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#include "radeon_ucode.h"
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extern bool evergreen_is_display_hung(struct radeon_device *rdev);
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extern void evergreen_print_gpu_status_regs(struct radeon_device *rdev);
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@ -47,18 +48,6 @@ extern void evergreen_pcie_gen2_enable(struct radeon_device *rdev);
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extern void si_rlc_fini(struct radeon_device *rdev);
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extern int si_rlc_init(struct radeon_device *rdev);
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#define EVERGREEN_PFP_UCODE_SIZE 1120
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#define EVERGREEN_PM4_UCODE_SIZE 1376
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#define EVERGREEN_RLC_UCODE_SIZE 768
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#define BTC_MC_UCODE_SIZE 6024
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#define CAYMAN_PFP_UCODE_SIZE 2176
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#define CAYMAN_PM4_UCODE_SIZE 2176
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#define CAYMAN_RLC_UCODE_SIZE 1024
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#define CAYMAN_MC_UCODE_SIZE 6037
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#define ARUBA_RLC_UCODE_SIZE 1536
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/* Firmware Names */
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MODULE_FIRMWARE("radeon/BARTS_pfp.bin");
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MODULE_FIRMWARE("radeon/BARTS_me.bin");
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@ -38,18 +38,7 @@
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#include "r600d.h"
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#include "atom.h"
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#include "avivod.h"
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#define PFP_UCODE_SIZE 576
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#define PM4_UCODE_SIZE 1792
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#define RLC_UCODE_SIZE 768
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#define R700_PFP_UCODE_SIZE 848
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#define R700_PM4_UCODE_SIZE 1360
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#define R700_RLC_UCODE_SIZE 1024
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#define EVERGREEN_PFP_UCODE_SIZE 1120
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#define EVERGREEN_PM4_UCODE_SIZE 1376
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#define EVERGREEN_RLC_UCODE_SIZE 768
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#define CAYMAN_RLC_UCODE_SIZE 1024
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#define ARUBA_RLC_UCODE_SIZE 1536
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#include "radeon_ucode.h"
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/* Firmware Names */
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MODULE_FIRMWARE("radeon/R600_pfp.bin");
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@ -2246,9 +2235,9 @@ int r600_init_microcode(struct radeon_device *rdev)
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me_req_size = R700_PM4_UCODE_SIZE * 4;
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rlc_req_size = R700_RLC_UCODE_SIZE * 4;
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} else {
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pfp_req_size = PFP_UCODE_SIZE * 4;
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me_req_size = PM4_UCODE_SIZE * 12;
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rlc_req_size = RLC_UCODE_SIZE * 4;
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pfp_req_size = R600_PFP_UCODE_SIZE * 4;
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me_req_size = R600_PM4_UCODE_SIZE * 12;
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rlc_req_size = R600_RLC_UCODE_SIZE * 4;
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}
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DRM_INFO("Loading %s Microcode\n", chip_name);
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@ -2331,13 +2320,13 @@ static int r600_cp_load_microcode(struct radeon_device *rdev)
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fw_data = (const __be32 *)rdev->me_fw->data;
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WREG32(CP_ME_RAM_WADDR, 0);
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for (i = 0; i < PM4_UCODE_SIZE * 3; i++)
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for (i = 0; i < R600_PM4_UCODE_SIZE * 3; i++)
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WREG32(CP_ME_RAM_DATA,
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be32_to_cpup(fw_data++));
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fw_data = (const __be32 *)rdev->pfp_fw->data;
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WREG32(CP_PFP_UCODE_ADDR, 0);
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for (i = 0; i < PFP_UCODE_SIZE; i++)
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for (i = 0; i < R600_PFP_UCODE_SIZE; i++)
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WREG32(CP_PFP_UCODE_DATA,
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be32_to_cpup(fw_data++));
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@ -3839,7 +3828,7 @@ static int r600_rlc_init(struct radeon_device *rdev)
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WREG32(RLC_UCODE_DATA, be32_to_cpup(fw_data++));
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}
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} else {
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for (i = 0; i < RLC_UCODE_SIZE; i++) {
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for (i = 0; i < R600_RLC_UCODE_SIZE; i++) {
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WREG32(RLC_UCODE_ADDR, i);
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WREG32(RLC_UCODE_DATA, be32_to_cpup(fw_data++));
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}
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@ -0,0 +1,47 @@
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/*
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* Copyright 2012 Advanced Micro Devices, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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*/
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#ifndef __RADEON_UCODE_H__
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#define __RADEON_UCODE_H__
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/* CP */
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#define R600_PFP_UCODE_SIZE 576
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#define R600_PM4_UCODE_SIZE 1792
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#define R700_PFP_UCODE_SIZE 848
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#define R700_PM4_UCODE_SIZE 1360
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#define EVERGREEN_PFP_UCODE_SIZE 1120
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#define EVERGREEN_PM4_UCODE_SIZE 1376
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#define CAYMAN_PFP_UCODE_SIZE 2176
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#define CAYMAN_PM4_UCODE_SIZE 2176
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/* RLC */
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#define R600_RLC_UCODE_SIZE 768
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#define R700_RLC_UCODE_SIZE 1024
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#define EVERGREEN_RLC_UCODE_SIZE 768
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#define CAYMAN_RLC_UCODE_SIZE 1024
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#define ARUBA_RLC_UCODE_SIZE 1536
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/* MC */
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#define BTC_MC_UCODE_SIZE 6024
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#define CAYMAN_MC_UCODE_SIZE 6037
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#endif
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