Blackfin arch: make sure the BSS and kernel load address are 4 byte aligned
Signed-off-by: Mike Frysinger <vapier.adi@gmail.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
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09e1f70e31
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1375204611
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@ -83,6 +83,7 @@ SECTIONS
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#if !L1_DATA_B_LENGTH
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#if !L1_DATA_B_LENGTH
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*(.l1.bss.B)
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*(.l1.bss.B)
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#endif
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#endif
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. = ALIGN(4);
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___bss_stop = .;
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___bss_stop = .;
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}
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}
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@ -27,6 +27,7 @@
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* 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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* 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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*/
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#include <asm/fixed_code.h>
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#include <asm/mach/anomaly.h>
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#include <asm/mach/anomaly.h>
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#include <asm/mach-common/clocks.h>
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#include <asm/mach-common/clocks.h>
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@ -53,3 +54,11 @@
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# endif
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# endif
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#endif /* CONFIG_BFIN_KERNEL_CLOCK */
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#endif /* CONFIG_BFIN_KERNEL_CLOCK */
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#if CONFIG_BOOT_LOAD < FIXED_CODE_END
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# error "The kernel load address must be after the fixed code section"
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#endif
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#if (CONFIG_BOOT_LOAD & 0x3)
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# error "The kernel load address must be 4 byte aligned"
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#endif
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