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staging: sbe-2t3e3: Remove code that will never execute 

This patch removes all references of "if 0" blocks in the sbe-2t3e3 driver.

Signed-off-by: Marcos Paulo de Souza <marcos.souza.org@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Marcos Paulo de Souza 2012-07-17 19:41:25 -03:00 committed by Greg Kroah-Hartman
parent be408d7807
commit 12f3f21d08
8 changed files with 10 additions and 182 deletions
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3
drivers/staging/sbe-2t3e3/2t3e3.h
View File

@ -801,9 +801,6 @@ u32 cpld_read(struct channel *sc, u32 reg);
void cpld_set_crc(struct channel *, u32);
void cpld_start_intr(struct channel *);
void cpld_stop_intr(struct channel *);
#if 0
void cpld_led_onoff(struct channel *, u32, u32, u32, u32);
#endif
void cpld_set_clock(struct channel *sc, u32 mode);
void cpld_set_scrambler(struct channel *, u32);
void cpld_select_panel(struct channel *, u32);

15
drivers/staging/sbe-2t3e3/cpld.c
View File

@ -41,14 +41,6 @@ static inline void cpld_clear_bit(struct channel *channel, unsigned reg, u32 bit
void cpld_init(struct channel *sc)
{
u32 val;
#if 0
/* reset LIU and Framer */
val = cpld_val_map[SBE_2T3E3_CPLD_VAL_LIU_FRAMER_RESET][sc->h.slot];
cpld_write(sc, SBE_2T3E3_CPLD_REG_STATIC_RESET, val);
udelay(10000); /* TODO - how long? */
val = 0;
cpld_write(sc, SBE_2T3E3_CPLD_REG_STATIC_RESET, val);
#endif
/* PCRA */
val = SBE_2T3E3_CPLD_VAL_CRC32 |
@ -109,13 +101,6 @@ void cpld_start_intr(struct channel *sc)
val = SBE_2T3E3_CPLD_VAL_INTERRUPT_FROM_ETHERNET_ENABLE |
SBE_2T3E3_CPLD_VAL_INTERRUPT_FROM_FRAMER_ENABLE;
cpld_write(sc, SBE_2T3E3_CPLD_REG_PIER, val);
#if 0
/*
do you want to hang up your computer?
ENABLE REST OF INTERRUPTS !!!
you have been warned :).
*/
#endif
}
void cpld_stop_intr(struct channel *sc)

19
drivers/staging/sbe-2t3e3/ctrl.c
View File

@ -230,11 +230,9 @@ void t3e3_port_get_stats(struct channel *sc,
result = exar7250_read(sc, SBE_2T3E3_FRAMER_REG_E3_RX_CONFIGURATION_STATUS_2);
sc->s.LOF = result & SBE_2T3E3_FRAMER_VAL_E3_RX_LOF ? 1 : 0;
sc->s.OOF = result & SBE_2T3E3_FRAMER_VAL_E3_RX_OOF ? 1 : 0;
#if 0
sc->s.LOS = result & SBE_2T3E3_FRAMER_VAL_E3_RX_LOS ? 1 : 0;
#else
cpld_LOS_update(sc);
#endif
sc->s.AIS = result & SBE_2T3E3_FRAMER_VAL_E3_RX_AIS ? 1 : 0;
sc->s.FERF = result & SBE_2T3E3_FRAMER_VAL_E3_RX_FERF ? 1 : 0;
break;
@ -243,11 +241,9 @@ void t3e3_port_get_stats(struct channel *sc,
case SBE_2T3E3_FRAME_TYPE_T3_M13:
result = exar7250_read(sc, SBE_2T3E3_FRAMER_REG_T3_RX_CONFIGURATION_STATUS);
sc->s.AIS = result & SBE_2T3E3_FRAMER_VAL_T3_RX_AIS ? 1 : 0;
#if 0
sc->s.LOS = result & SBE_2T3E3_FRAMER_VAL_T3_RX_LOS ? 1 : 0;
#else
cpld_LOS_update(sc);
#endif
sc->s.IDLE = result & SBE_2T3E3_FRAMER_VAL_T3_RX_IDLE ? 1 : 0;
sc->s.OOF = result & SBE_2T3E3_FRAMER_VAL_T3_RX_OOF ? 1 : 0;
@ -322,10 +318,6 @@ void t3e3_if_config(struct channel *sc, u32 cmd, char *set,
*rlen = sizeof(ret->u.data);
break;
case SBE_2T3E3_PORT_WRITE_REGS:
#if 0
printk(KERN_DEBUG "SBE_2T3E3_PORT_WRITE_REGS, 0x%x, 0x%x, 0x%x\n",
((int*)data)[0], ((int*)data)[1], ((int*)data)[2]);
#endif
t3e3_reg_write(sc, data);
*rlen = 0;
break;
@ -336,9 +328,6 @@ void t3e3_if_config(struct channel *sc, u32 cmd, char *set,
*rlen = 0;
break;
}
/* turn on interrupt */
/* cpld_start_intr(sc); */
}
void t3e3_sc_init(struct channel *sc)

17
drivers/staging/sbe-2t3e3/dc.c
View File

@ -63,14 +63,6 @@ void dc_init(struct channel *sc)
if (sc->p.loopback == SBE_2T3E3_LOOPBACK_ETHERNET)
sc->p.loopback = SBE_2T3E3_LOOPBACK_NONE;
#if 0 /* No need to clear this register - and it may be in use */
/*
* BOOT_ROM_SERIAL_ROM_AND_MII_MANAGEMENT (CSR9)
*/
val = 0;
dc_write(sc->addr, SBE_2T3E3_21143_REG_BOOT_ROM_SERIAL_ROM_AND_MII_MANAGEMENT, val);
#endif
/*
* GENERAL_PURPOSE_TIMER_AND_INTERRUPT_MITIGATION_CONTROL (CSR11)
*/
@ -301,15 +293,6 @@ void dc_set_loopback(struct channel *sc, u32 mode)
return;
}
#if 0
/* restart SIA */
dc_clear_bits(sc->addr, SBE_2T3E3_21143_REG_SIA_CONNECTIVITY,
SBE_2T3E3_21143_VAL_SIA_RESET);
udelay(1000);
dc_set_bits(sc->addr, SBE_2T3E3_21143_REG_SIA_CONNECTIVITY,
SBE_2T3E3_21143_VAL_SIA_RESET);
#endif
/* select loopback mode */
val = dc_read(sc->addr, SBE_2T3E3_21143_REG_OPERATION_MODE) &
~SBE_2T3E3_21143_VAL_OPERATING_MODE;

40
drivers/staging/sbe-2t3e3/exar7250.c
View File

@ -78,64 +78,32 @@ void exar7250_start_intr(struct channel *sc, u32 type)
case SBE_2T3E3_FRAME_TYPE_E3_G751:
case SBE_2T3E3_FRAME_TYPE_E3_G832:
val = exar7250_read(sc, SBE_2T3E3_FRAMER_REG_E3_RX_CONFIGURATION_STATUS_2);
#if 0
sc->s.LOS = val & SBE_2T3E3_FRAMER_VAL_E3_RX_LOS ? 1 : 0;
#else
cpld_LOS_update(sc);
#endif
sc->s.OOF = val & SBE_2T3E3_FRAMER_VAL_E3_RX_OOF ? 1 : 0;
exar7250_read(sc, SBE_2T3E3_FRAMER_REG_E3_RX_INTERRUPT_STATUS_1);
exar7250_write(sc, SBE_2T3E3_FRAMER_REG_E3_RX_INTERRUPT_ENABLE_1,
SBE_2T3E3_FRAMER_VAL_E3_RX_OOF_INTERRUPT_ENABLE |
SBE_2T3E3_FRAMER_VAL_E3_RX_LOS_INTERRUPT_ENABLE);
#if 0
/*SBE_2T3E3_FRAMER_VAL_E3_RX_COFA_INTERRUPT_ENABLE |
SBE_2T3E3_FRAMER_VAL_E3_RX_OOF_INTERRUPT_ENABLE |
SBE_2T3E3_FRAMER_VAL_E3_RX_LOF_INTERRUPT_ENABLE |
SBE_2T3E3_FRAMER_VAL_E3_RX_LOS_INTERRUPT_ENABLE |
SBE_2T3E3_FRAMER_VAL_E3_RX_AIS_INTERRUPT_ENABLE);*/
#endif
exar7250_read(sc, SBE_2T3E3_FRAMER_REG_E3_RX_INTERRUPT_STATUS_2);
#if 0
exar7250_write(sc, SBE_2T3E3_FRAMER_REG_E3_RX_INTERRUPT_ENABLE_2,
SBE_2T3E3_FRAMER_VAL_E3_RX_FEBE_INTERRUPT_ENABLE |
SBE_2T3E3_FRAMER_VAL_E3_RX_FERF_INTERRUPT_ENABLE |
SBE_2T3E3_FRAMER_VAL_E3_RX_FRAMING_BYTE_ERROR_INTERRUPT_ENABLE);
#endif
break;
case SBE_2T3E3_FRAME_TYPE_T3_CBIT:
case SBE_2T3E3_FRAME_TYPE_T3_M13:
val = exar7250_read(sc, SBE_2T3E3_FRAMER_REG_T3_RX_CONFIGURATION_STATUS);
#if 0
sc->s.LOS = val & SBE_2T3E3_FRAMER_VAL_T3_RX_LOS ? 1 : 0;
#else
cpld_LOS_update(sc);
#endif
sc->s.OOF = val & SBE_2T3E3_FRAMER_VAL_T3_RX_OOF ? 1 : 0;
exar7250_read(sc, SBE_2T3E3_FRAMER_REG_T3_RX_INTERRUPT_STATUS);
exar7250_write(sc, SBE_2T3E3_FRAMER_REG_T3_RX_INTERRUPT_ENABLE,
SBE_2T3E3_FRAMER_VAL_T3_RX_LOS_INTERRUPT_ENABLE |
SBE_2T3E3_FRAMER_VAL_T3_RX_OOF_INTERRUPT_ENABLE);
#if 0
/* SBE_2T3E3_FRAMER_VAL_T3_RX_CP_BIT_ERROR_INTERRUPT_ENABLE |
SBE_2T3E3_FRAMER_VAL_T3_RX_LOS_INTERRUPT_ENABLE |
SBE_2T3E3_FRAMER_VAL_T3_RX_AIS_INTERRUPT_ENABLE |
SBE_2T3E3_FRAMER_VAL_T3_RX_IDLE_INTERRUPT_ENABLE |
SBE_2T3E3_FRAMER_VAL_T3_RX_FERF_INTERRUPT_ENABLE |
SBE_2T3E3_FRAMER_VAL_T3_RX_AIC_INTERRUPT_ENABLE |
SBE_2T3E3_FRAMER_VAL_T3_RX_OOF_INTERRUPT_ENABLE |
SBE_2T3E3_FRAMER_VAL_T3_RX_P_BIT_INTERRUPT_ENABLE);*/
#endif
exar7250_read(sc, SBE_2T3E3_FRAMER_REG_T3_RX_FEAC_INTERRUPT_ENABLE_STATUS);
#if 0
exar7250_write(sc, SBE_2T3E3_FRAMER_REG_T3_RX_FEAC_INTERRUPT_ENABLE_STATUS,
SBE_2T3E3_FRAMER_VAL_T3_RX_FEAC_REMOVE_INTERRUPT_ENABLE |
SBE_2T3E3_FRAMER_VAL_T3_RX_FEAC_VALID_INTERRUPT_ENABLE);
#endif
exar7250_write(sc, SBE_2T3E3_FRAMER_REG_T3_RX_LAPD_CONTROL, 0);
break;

17
drivers/staging/sbe-2t3e3/exar7300.c
View File

@ -43,23 +43,6 @@ void exar7300_set_loopback(struct channel *sc, u32 mode)
val &= ~(SBE_2T3E3_LIU_VAL_LOCAL_LOOPBACK | SBE_2T3E3_LIU_VAL_REMOTE_LOOPBACK);
val |= mode;
exar7300_write(sc, SBE_2T3E3_LIU_REG_REG4, val);
#if 0
/* TODO - is it necessary? idea from 2T3E3_HW_Test_code */
switch (mode) {
case SBE_2T3E3_LIU_VAL_LOOPBACK_OFF:
break;
case SBE_2T3E3_LIU_VAL_LOOPBACK_REMOTE:
exar7300_receive_equalization_onoff(sc, SBE_2T3E3_ON);
break;
case SBE_2T3E3_LIU_VAL_LOOPBACK_ANALOG:
exar7300_receive_equalization_onoff(sc, SBE_2T3E3_OFF);
break;
case SBE_2T3E3_LIU_VAL_LOOPBACK_DIGITAL:
exar7300_receive_equalization_onoff(sc, SBE_2T3E3_ON);
break;
}
#endif
}
void exar7300_set_frame_type(struct channel *sc, u32 type)

60
drivers/staging/sbe-2t3e3/intr.c
View File

@ -434,11 +434,6 @@ void exar7250_intr(struct channel *sc)
{
u32 status, old_OOF;
#if 0
/* disable interrupts */
exar7250_write(sc, SBE_2T3E3_FRAMER_REG_BLOCK_INTERRUPT_ENABLE, 0);
#endif
old_OOF = sc->s.OOF;
status = exar7250_read(sc, SBE_2T3E3_FRAMER_REG_BLOCK_INTERRUPT_STATUS);
@ -479,13 +474,6 @@ void exar7250_intr(struct channel *sc)
dc_start_intr(sc);
}
}
#if 0
/* reenable interrupts */
exar7250_write(sc, SBE_2T3E3_FRAMER_REG_BLOCK_INTERRUPT_ENABLE,
SBE_2T3E3_FRAMER_VAL_RX_INTERRUPT_ENABLE |
SBE_2T3E3_FRAMER_VAL_TX_INTERRUPT_ENABLE
);
#endif
}
@ -503,16 +491,8 @@ void exar7250_T3_intr(struct channel *sc, u32 block_status)
result = exar7250_read(sc, SBE_2T3E3_FRAMER_REG_T3_RX_CONFIGURATION_STATUS);
#if 0
if (status & SBE_2T3E3_FRAMER_VAL_T3_RX_LOS_INTERRUPT_STATUS) {
dev_dbg(&sc->pdev->dev,
"Framer interrupt T3: LOS\n");
sc->s.LOS = result & SBE_2T3E3_FRAMER_VAL_T3_RX_LOS ? 1 : 0;
}
#else
cpld_LOS_update(sc);
#endif
if (status & SBE_2T3E3_FRAMER_VAL_T3_RX_OOF_INTERRUPT_STATUS) {
sc->s.OOF = result & SBE_2T3E3_FRAMER_VAL_T3_RX_OOF ? 1 : 0;
dev_dbg(&sc->pdev->dev,
@ -523,16 +503,6 @@ void exar7250_T3_intr(struct channel *sc, u32 block_status)
exar7250_write(sc, SBE_2T3E3_FRAMER_REG_T3_RX_INTERRUPT_ENABLE,
SBE_2T3E3_FRAMER_VAL_T3_RX_LOS_INTERRUPT_ENABLE |
SBE_2T3E3_FRAMER_VAL_T3_RX_OOF_INTERRUPT_ENABLE);
#if 0
SBE_2T3E3_FRAMER_VAL_T3_RX_CP_BIT_ERROR_INTERRUPT_ENABLE |
SBE_2T3E3_FRAMER_VAL_T3_RX_LOS_INTERRUPT_ENABLE |
SBE_2T3E3_FRAMER_VAL_T3_RX_AIS_INTERRUPT_ENABLE |
SBE_2T3E3_FRAMER_VAL_T3_RX_IDLE_INTERRUPT_ENABLE |
SBE_2T3E3_FRAMER_VAL_T3_RX_FERF_INTERRUPT_ENABLE |
SBE_2T3E3_FRAMER_VAL_T3_RX_AIC_INTERRUPT_ENABLE |
SBE_2T3E3_FRAMER_VAL_T3_RX_OOF_INTERRUPT_ENABLE |
SBE_2T3E3_FRAMER_VAL_T3_RX_P_BIT_INTERRUPT_ENABLE
#endif
}
status = exar7250_read(sc, SBE_2T3E3_FRAMER_REG_T3_RX_FEAC_INTERRUPT_ENABLE_STATUS);
@ -540,12 +510,6 @@ void exar7250_T3_intr(struct channel *sc, u32 block_status)
dev_dbg(&sc->pdev->dev,
"Framer interrupt T3 RX (REG[0x17] = %02X)\n",
status);
#if 0
exar7250_write(sc, SBE_2T3E3_FRAMER_REG_T3_RX_FEAC_INTERRUPT_ENABLE_STATUS,
SBE_2T3E3_FRAMER_VAL_T3_RX_FEAC_REMOVE_INTERRUPT_ENABLE |
SBE_2T3E3_FRAMER_VAL_T3_RX_FEAC_VALID_INTERRUPT_ENABLE
);
#endif
}
status = exar7250_read(sc, SBE_2T3E3_FRAMER_REG_T3_RX_LAPD_CONTROL);
@ -582,15 +546,8 @@ void exar7250_E3_intr(struct channel *sc, u32 block_status)
result = exar7250_read(sc, SBE_2T3E3_FRAMER_REG_E3_RX_CONFIGURATION_STATUS_2);
#if 0
if (status & SBE_2T3E3_FRAMER_VAL_E3_RX_LOS_INTERRUPT_STATUS) {
dev_dbg(&sc->pdev->dev,
"Framer interrupt E3: LOS\n");
sc->s.LOS = result & SBE_2T3E3_FRAMER_VAL_E3_RX_LOS ? 1 : 0;
}
#else
cpld_LOS_update(sc);
#endif
if (status & SBE_2T3E3_FRAMER_VAL_E3_RX_OOF_INTERRUPT_STATUS) {
sc->s.OOF = result & SBE_2T3E3_FRAMER_VAL_E3_RX_OOF ? 1 : 0;
dev_dbg(&sc->pdev->dev,
@ -602,13 +559,6 @@ void exar7250_E3_intr(struct channel *sc, u32 block_status)
SBE_2T3E3_FRAMER_VAL_E3_RX_OOF_INTERRUPT_ENABLE |
SBE_2T3E3_FRAMER_VAL_E3_RX_LOS_INTERRUPT_ENABLE
);
#if 0
SBE_2T3E3_FRAMER_VAL_E3_RX_COFA_INTERRUPT_ENABLE |
SBE_2T3E3_FRAMER_VAL_E3_RX_OOF_INTERRUPT_ENABLE |
SBE_2T3E3_FRAMER_VAL_E3_RX_LOF_INTERRUPT_ENABLE |
SBE_2T3E3_FRAMER_VAL_E3_RX_LOS_INTERRUPT_ENABLE |
SBE_2T3E3_FRAMER_VAL_E3_RX_AIS_INTERRUPT_ENABLE
#endif
}
status = exar7250_read(sc, SBE_2T3E3_FRAMER_REG_E3_RX_INTERRUPT_STATUS_2);
@ -617,12 +567,6 @@ void exar7250_E3_intr(struct channel *sc, u32 block_status)
"Framer interrupt E3 RX (REG[0x15] = %02X)\n",
status);
#if 0
exar7250_write(sc, SBE_2T3E3_FRAMER_REG_E3_RX_INTERRUPT_ENABLE_2,
SBE_2T3E3_FRAMER_VAL_E3_RX_FEBE_INTERRUPT_ENABLE |
SBE_2T3E3_FRAMER_VAL_E3_RX_FERF_INTERRUPT_ENABLE |
SBE_2T3E3_FRAMER_VAL_E3_RX_FRAMING_BYTE_ERROR_INTERRUPT_ENABLE);
#endif
}
}

21
drivers/staging/sbe-2t3e3/io.c
View File

@ -199,15 +199,6 @@ u32 exar7250_read(struct channel *channel, u32 reg)
u32 result;
unsigned long flags;
#if 0
switch (reg) {
case SBE_2T3E3_FRAMER_REG_OPERATING_MODE:
return channel->framer_regs[reg];
break;
default:
}
#endif
spin_lock_irqsave(&channel->card->bootrom_lock, flags);
result = bootrom_read(channel, cpld_reg_map[SBE_2T3E3_CPLD_REG_FRAMER_BASE_ADDRESS]
@ -243,18 +234,6 @@ u32 exar7300_read(struct channel *channel, u32 reg)
unsigned long addr = channel->card->bootrom_addr, flags;
u32 i, val;
#if 0
switch (reg) {
case SBE_2T3E3_LIU_REG_REG1:
case SBE_2T3E3_LIU_REG_REG2:
case SBE_2T3E3_LIU_REG_REG3:
case SBE_2T3E3_LIU_REG_REG4:
return channel->liu_regs[reg];
break;
default:
}
#endif
/* select correct Serial Chip */
spin_lock_irqsave(&channel->card->bootrom_lock, flags);