iwlwifi: centralize 64 bit HW registers write
Move the write_prph_64 of pcie to be transport agnostic. Add direct write as well, as it is needed for a000 HW. Signed-off-by: Sara Sharon <sara.sharon@intel.com> Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
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8de437c71e
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12a17458a2
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@ -1,6 +1,7 @@
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/******************************************************************************
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*
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* Copyright(c) 2009 - 2014 Intel Corporation. All rights reserved.
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* Copyright(c) 2016 Intel Deutschland GmbH
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of version 2 of the GNU General Public License as
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@ -83,6 +84,23 @@ TRACE_EVENT(iwlwifi_dev_iowrite32,
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__get_str(dev), __entry->offs, __entry->val)
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);
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TRACE_EVENT(iwlwifi_dev_iowrite64,
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TP_PROTO(const struct device *dev, u64 offs, u64 val),
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TP_ARGS(dev, offs, val),
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TP_STRUCT__entry(
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DEV_ENTRY
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__field(u64, offs)
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__field(u64, val)
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),
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TP_fast_assign(
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DEV_ASSIGN;
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__entry->offs = offs;
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__entry->val = val;
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),
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TP_printk("[%s] write io[%llu] = %llu)",
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__get_str(dev), __entry->offs, __entry->val)
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);
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TRACE_EVENT(iwlwifi_dev_iowrite_prph32,
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TP_PROTO(const struct device *dev, u32 offs, u32 val),
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TP_ARGS(dev, offs, val),
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@ -100,6 +118,23 @@ TRACE_EVENT(iwlwifi_dev_iowrite_prph32,
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__get_str(dev), __entry->offs, __entry->val)
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);
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TRACE_EVENT(iwlwifi_dev_iowrite_prph64,
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TP_PROTO(const struct device *dev, u64 offs, u64 val),
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TP_ARGS(dev, offs, val),
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TP_STRUCT__entry(
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DEV_ENTRY
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__field(u64, offs)
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__field(u64, val)
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),
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TP_fast_assign(
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DEV_ASSIGN;
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__entry->offs = offs;
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__entry->val = val;
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),
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TP_printk("[%s] write PRPH[%llu] = %llu)",
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__get_str(dev), __entry->offs, __entry->val)
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);
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TRACE_EVENT(iwlwifi_dev_ioread_prph32,
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TP_PROTO(const struct device *dev, u32 offs, u32 val),
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TP_ARGS(dev, offs, val),
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@ -51,6 +51,14 @@ void iwl_write32(struct iwl_trans *trans, u32 ofs, u32 val)
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}
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IWL_EXPORT_SYMBOL(iwl_write32);
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void iwl_write64(struct iwl_trans *trans, u64 ofs, u64 val)
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{
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trace_iwlwifi_dev_iowrite64(trans->dev, ofs, val);
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iwl_trans_write32(trans, ofs, val & 0xffffffff);
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iwl_trans_write32(trans, ofs + 4, val >> 32);
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}
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IWL_EXPORT_SYMBOL(iwl_write64);
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u32 iwl_read32(struct iwl_trans *trans, u32 ofs)
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{
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u32 val = iwl_trans_read32(trans, ofs);
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@ -102,6 +110,17 @@ void iwl_write_direct32(struct iwl_trans *trans, u32 reg, u32 value)
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}
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IWL_EXPORT_SYMBOL(iwl_write_direct32);
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void iwl_write_direct64(struct iwl_trans *trans, u64 reg, u64 value)
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{
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unsigned long flags;
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if (iwl_trans_grab_nic_access(trans, &flags)) {
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iwl_write64(trans, reg, value);
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iwl_trans_release_nic_access(trans, &flags);
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}
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}
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IWL_EXPORT_SYMBOL(iwl_write_direct64);
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int iwl_poll_direct_bit(struct iwl_trans *trans, u32 addr, u32 mask,
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int timeout)
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{
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@ -133,6 +152,14 @@ void iwl_write_prph_no_grab(struct iwl_trans *trans, u32 ofs, u32 val)
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}
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IWL_EXPORT_SYMBOL(iwl_write_prph_no_grab);
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void iwl_write_prph64_no_grab(struct iwl_trans *trans, u64 ofs, u64 val)
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{
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trace_iwlwifi_dev_iowrite_prph64(trans->dev, ofs, val);
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iwl_write_prph_no_grab(trans, ofs, val & 0xffffffff);
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iwl_write_prph_no_grab(trans, ofs + 4, val >> 32);
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}
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IWL_EXPORT_SYMBOL(iwl_write_prph64_no_grab);
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u32 iwl_read_prph(struct iwl_trans *trans, u32 ofs)
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{
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unsigned long flags;
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@ -34,6 +34,7 @@
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void iwl_write8(struct iwl_trans *trans, u32 ofs, u8 val);
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void iwl_write32(struct iwl_trans *trans, u32 ofs, u32 val);
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void iwl_write64(struct iwl_trans *trans, u64 ofs, u64 val);
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u32 iwl_read32(struct iwl_trans *trans, u32 ofs);
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static inline void iwl_set_bit(struct iwl_trans *trans, u32 reg, u32 mask)
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@ -53,11 +54,13 @@ int iwl_poll_direct_bit(struct iwl_trans *trans, u32 addr, u32 mask,
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u32 iwl_read_direct32(struct iwl_trans *trans, u32 reg);
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void iwl_write_direct32(struct iwl_trans *trans, u32 reg, u32 value);
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void iwl_write_direct64(struct iwl_trans *trans, u64 reg, u64 value);
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u32 iwl_read_prph_no_grab(struct iwl_trans *trans, u32 ofs);
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u32 iwl_read_prph(struct iwl_trans *trans, u32 ofs);
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void iwl_write_prph_no_grab(struct iwl_trans *trans, u32 ofs, u32 val);
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void iwl_write_prph64_no_grab(struct iwl_trans *trans, u64 ofs, u64 val);
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void iwl_write_prph(struct iwl_trans *trans, u32 ofs, u32 val);
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int iwl_poll_prph_bit(struct iwl_trans *trans, u32 addr,
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u32 bits, u32 mask, int timeout);
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@ -161,13 +161,6 @@ static inline __le32 iwl_pcie_dma_addr2rbd_ptr(dma_addr_t dma_addr)
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return cpu_to_le32((u32)(dma_addr >> 8));
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}
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static void iwl_pcie_write_prph_64_no_grab(struct iwl_trans *trans, u64 ofs,
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u64 val)
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{
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iwl_write_prph_no_grab(trans, ofs, val & 0xffffffff);
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iwl_write_prph_no_grab(trans, ofs + 4, val >> 32);
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}
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/*
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* iwl_pcie_rx_stop - stops the Rx DMA
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*/
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@ -817,17 +810,17 @@ static void iwl_pcie_rx_mq_hw_init(struct iwl_trans *trans)
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for (i = 0; i < trans->num_rx_queues; i++) {
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/* Tell device where to find RBD free table in DRAM */
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iwl_pcie_write_prph_64_no_grab(trans,
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RFH_Q_FRBDCB_BA_LSB(i),
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trans_pcie->rxq[i].bd_dma);
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iwl_write_prph64_no_grab(trans,
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RFH_Q_FRBDCB_BA_LSB(i),
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trans_pcie->rxq[i].bd_dma);
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/* Tell device where to find RBD used table in DRAM */
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iwl_pcie_write_prph_64_no_grab(trans,
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RFH_Q_URBDCB_BA_LSB(i),
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trans_pcie->rxq[i].used_bd_dma);
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iwl_write_prph64_no_grab(trans,
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RFH_Q_URBDCB_BA_LSB(i),
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trans_pcie->rxq[i].used_bd_dma);
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/* Tell device where in DRAM to update its Rx status */
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iwl_pcie_write_prph_64_no_grab(trans,
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RFH_Q_URBD_STTS_WPTR_LSB(i),
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trans_pcie->rxq[i].rb_stts_dma);
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iwl_write_prph64_no_grab(trans,
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RFH_Q_URBD_STTS_WPTR_LSB(i),
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trans_pcie->rxq[i].rb_stts_dma);
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/* Reset device indice tables */
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iwl_write_prph_no_grab(trans, RFH_Q_FRBDCB_WIDX(i), 0);
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iwl_write_prph_no_grab(trans, RFH_Q_FRBDCB_RIDX(i), 0);
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