gpio: add GPIO support for SMSC SCH311x
This patch adds support for the GPIOs found on the SMSC "Super I/ SCH311x. The chip detection and I/O functions are copied from sch311x_wdt. Signed-off-by: Bruno Randolf <br1@einfach.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This commit is contained in:
Bruno Randolf
Linus Walleij
parent
a00580c280
commit
12262bef8f
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@ -244,6 +244,15 @@ config GPIO_SAMSUNG
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Legacy GPIO support. Use only for platforms without support for
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pinctrl.
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config GPIO_SCH311X
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tristate "SMSC SCH311x SuperI/O GPIO"
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help
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Driver to enable the GPIOs found on SMSC SMSC SCH3112, SCH3114 and
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SCH3116 "Super I/O" chipsets.
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To compile this driver as a module, choose M here: the module will
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be called gpio-sch311x.
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config GPIO_SPEAR_SPICS
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bool "ST SPEAr13xx SPI Chip Select as GPIO support"
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depends on PLAT_SPEAR
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@ -68,6 +68,7 @@ obj-$(CONFIG_GPIO_RCAR) += gpio-rcar.o
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obj-$(CONFIG_GPIO_SAMSUNG) += gpio-samsung.o
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obj-$(CONFIG_ARCH_SA1100) += gpio-sa1100.o
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obj-$(CONFIG_GPIO_SCH) += gpio-sch.o
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obj-$(CONFIG_GPIO_SCH311X) += gpio-sch311x.o
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obj-$(CONFIG_GPIO_SODAVILLE) += gpio-sodaville.o
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obj-$(CONFIG_GPIO_SPEAR_SPICS) += gpio-spear-spics.o
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obj-$(CONFIG_GPIO_STA2X11) += gpio-sta2x11.o
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@ -0,0 +1,431 @@
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/*
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* GPIO driver for the SMSC SCH311x Super-I/O chips
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*
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* Copyright (C) 2013 Bruno Randolf <br1@einfach.org>
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*
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* SuperIO functions and chip detection:
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* (c) Copyright 2008 Wim Van Sebroeck <wim@iguana.be>.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*/
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/platform_device.h>
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#include <linux/gpio.h>
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#include <linux/bitops.h>
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#define DRV_NAME "gpio-sch311x"
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#define SCH311X_GPIO_CONF_OUT 0x00
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#define SCH311X_GPIO_CONF_IN 0x01
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#define SCH311X_GPIO_CONF_INVERT 0x02
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#define SCH311X_GPIO_CONF_OPEN_DRAIN 0x80
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#define SIO_CONFIG_KEY_ENTER 0x55
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#define SIO_CONFIG_KEY_EXIT 0xaa
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#define GP1 0x4b
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static int sch311x_ioports[] = { 0x2e, 0x4e, 0x162e, 0x164e };
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static struct platform_device *sch311x_gpio_pdev;
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struct sch311x_pdev_data { /* platform device data */
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unsigned short runtime_reg; /* runtime register base address */
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};
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struct sch311x_gpio_block { /* one GPIO block runtime data */
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struct gpio_chip chip;
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unsigned short data_reg; /* from definition below */
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unsigned short *config_regs; /* pointer to definition below */
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unsigned short runtime_reg; /* runtime register */
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spinlock_t lock; /* lock for this GPIO block */
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};
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struct sch311x_gpio_priv { /* driver private data */
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struct sch311x_gpio_block blocks[6];
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};
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struct sch311x_gpio_block_def { /* register address definitions */
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unsigned short data_reg;
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unsigned short config_regs[8];
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unsigned short base;
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};
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/* Note: some GPIOs are not available, these are marked with 0x00 */
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static struct sch311x_gpio_block_def sch311x_gpio_blocks[] = {
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{
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.data_reg = 0x4b, /* GP1 */
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.config_regs = {0x23, 0x24, 0x25, 0x26, 0x27, 0x29, 0x2a, 0x2b},
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.base = 10,
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},
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{
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.data_reg = 0x4c, /* GP2 */
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.config_regs = {0x00, 0x2c, 0x2d, 0x00, 0x00, 0x00, 0x00, 0x32},
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.base = 20,
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},
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{
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.data_reg = 0x4d, /* GP3 */
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.config_regs = {0x33, 0x34, 0x35, 0x36, 0x37, 0x00, 0x39, 0x3a},
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.base = 30,
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},
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{
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.data_reg = 0x4e, /* GP4 */
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.config_regs = {0x3b, 0x00, 0x3d, 0x00, 0x6e, 0x6f, 0x72, 0x73},
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.base = 40,
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},
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{
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.data_reg = 0x4f, /* GP5 */
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.config_regs = {0x3f, 0x40, 0x41, 0x42, 0x43, 0x44, 0x45, 0x46},
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.base = 50,
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},
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{
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.data_reg = 0x50, /* GP6 */
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.config_regs = {0x47, 0x48, 0x54, 0x55, 0x56, 0x57, 0x58, 0x59},
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.base = 60,
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},
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};
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static inline struct sch311x_gpio_block *
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to_sch311x_gpio_block(struct gpio_chip *chip)
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{
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return container_of(chip, struct sch311x_gpio_block, chip);
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}
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/*
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* Super-IO functions
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*/
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static inline int sch311x_sio_enter(int sio_config_port)
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{
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/* Don't step on other drivers' I/O space by accident. */
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if (!request_muxed_region(sio_config_port, 2, DRV_NAME)) {
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pr_err(DRV_NAME "I/O address 0x%04x already in use\n",
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sio_config_port);
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return -EBUSY;
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}
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outb(SIO_CONFIG_KEY_ENTER, sio_config_port);
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return 0;
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}
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static inline void sch311x_sio_exit(int sio_config_port)
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{
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outb(SIO_CONFIG_KEY_EXIT, sio_config_port);
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release_region(sio_config_port, 2);
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}
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static inline int sch311x_sio_inb(int sio_config_port, int reg)
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{
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outb(reg, sio_config_port);
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return inb(sio_config_port + 1);
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}
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static inline void sch311x_sio_outb(int sio_config_port, int reg, int val)
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{
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outb(reg, sio_config_port);
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outb(val, sio_config_port + 1);
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}
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/*
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* GPIO functions
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*/
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static int sch311x_gpio_request(struct gpio_chip *chip, unsigned offset)
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{
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struct sch311x_gpio_block *block = to_sch311x_gpio_block(chip);
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if (block->config_regs[offset] == 0) /* GPIO is not available */
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return -ENODEV;
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if (!request_region(block->runtime_reg + block->config_regs[offset],
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1, DRV_NAME)) {
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dev_err(chip->dev, "Failed to request region 0x%04x.\n",
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block->runtime_reg + block->config_regs[offset]);
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return -EBUSY;
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}
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return 0;
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}
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static void sch311x_gpio_free(struct gpio_chip *chip, unsigned offset)
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{
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struct sch311x_gpio_block *block = to_sch311x_gpio_block(chip);
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if (block->config_regs[offset] == 0) /* GPIO is not available */
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return;
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release_region(block->runtime_reg + block->config_regs[offset], 1);
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}
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static int sch311x_gpio_get(struct gpio_chip *chip, unsigned offset)
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{
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struct sch311x_gpio_block *block = to_sch311x_gpio_block(chip);
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unsigned char data;
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spin_lock(&block->lock);
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data = inb(block->runtime_reg + block->data_reg);
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spin_unlock(&block->lock);
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return !!(data & BIT(offset));
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}
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static void __sch311x_gpio_set(struct sch311x_gpio_block *block,
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unsigned offset, int value)
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{
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unsigned char data = inb(block->runtime_reg + block->data_reg);
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if (value)
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data |= BIT(offset);
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else
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data &= ~BIT(offset);
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outb(data, block->runtime_reg + block->data_reg);
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}
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static void sch311x_gpio_set(struct gpio_chip *chip, unsigned offset,
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int value)
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{
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struct sch311x_gpio_block *block = to_sch311x_gpio_block(chip);
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spin_lock(&block->lock);
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__sch311x_gpio_set(block, offset, value);
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spin_unlock(&block->lock);
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}
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static int sch311x_gpio_direction_in(struct gpio_chip *chip, unsigned offset)
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{
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struct sch311x_gpio_block *block = to_sch311x_gpio_block(chip);
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spin_lock(&block->lock);
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outb(SCH311X_GPIO_CONF_IN, block->runtime_reg +
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block->config_regs[offset]);
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spin_unlock(&block->lock);
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return 0;
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}
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static int sch311x_gpio_direction_out(struct gpio_chip *chip, unsigned offset,
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int value)
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{
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struct sch311x_gpio_block *block = to_sch311x_gpio_block(chip);
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spin_lock(&block->lock);
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outb(SCH311X_GPIO_CONF_OUT, block->runtime_reg +
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block->config_regs[offset]);
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__sch311x_gpio_set(block, offset, value);
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spin_unlock(&block->lock);
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return 0;
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}
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static int sch311x_gpio_probe(struct platform_device *pdev)
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{
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struct sch311x_pdev_data *pdata = pdev->dev.platform_data;
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struct sch311x_gpio_priv *priv;
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struct sch311x_gpio_block *block;
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int err, i;
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/* we can register all GPIO data registers at once */
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if (!request_region(pdata->runtime_reg + GP1, 6, DRV_NAME)) {
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dev_err(&pdev->dev, "Failed to request region 0x%04x-0x%04x.\n",
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pdata->runtime_reg + GP1, pdata->runtime_reg + GP1 + 5);
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return -EBUSY;
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}
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priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
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if (!priv)
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return -ENOMEM;
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platform_set_drvdata(pdev, priv);
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for (i = 0; i < ARRAY_SIZE(priv->blocks); i++) {
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block = &priv->blocks[i];
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spin_lock_init(&block->lock);
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block->chip.label = DRV_NAME;
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block->chip.owner = THIS_MODULE;
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block->chip.request = sch311x_gpio_request;
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block->chip.free = sch311x_gpio_free;
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block->chip.direction_input = sch311x_gpio_direction_in;
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block->chip.direction_output = sch311x_gpio_direction_out;
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block->chip.get = sch311x_gpio_get;
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block->chip.set = sch311x_gpio_set;
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block->chip.ngpio = 8;
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block->chip.dev = &pdev->dev;
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block->chip.base = sch311x_gpio_blocks[i].base;
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block->config_regs = sch311x_gpio_blocks[i].config_regs;
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block->data_reg = sch311x_gpio_blocks[i].data_reg;
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block->runtime_reg = pdata->runtime_reg;
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err = gpiochip_add(&block->chip);
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if (err < 0) {
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dev_err(&pdev->dev,
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"Could not register gpiochip, %d\n", err);
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goto exit_err;
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}
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dev_info(&pdev->dev,
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"SMSC SCH311x GPIO block %d registered.\n", i);
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}
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return 0;
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exit_err:
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release_region(pdata->runtime_reg + GP1, 6);
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/* release already registered chips */
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for (--i; i >= 0; i--)
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gpiochip_remove(&priv->blocks[i].chip);
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return err;
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}
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static int sch311x_gpio_remove(struct platform_device *pdev)
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{
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struct sch311x_pdev_data *pdata = pdev->dev.platform_data;
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struct sch311x_gpio_priv *priv = platform_get_drvdata(pdev);
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int err, i;
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release_region(pdata->runtime_reg + GP1, 6);
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for (i = 0; i < ARRAY_SIZE(priv->blocks); i++) {
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err = gpiochip_remove(&priv->blocks[i].chip);
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if (err)
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return err;
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dev_info(&pdev->dev,
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"SMSC SCH311x GPIO block %d unregistered.\n", i);
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}
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return 0;
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}
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static struct platform_driver sch311x_gpio_driver = {
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.driver.name = DRV_NAME,
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.driver.owner = THIS_MODULE,
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.probe = sch311x_gpio_probe,
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.remove = sch311x_gpio_remove,
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};
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/*
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* Init & exit routines
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*/
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static int __init sch311x_detect(int sio_config_port, unsigned short *addr)
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{
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int err = 0, reg;
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unsigned short base_addr;
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unsigned char dev_id;
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err = sch311x_sio_enter(sio_config_port);
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if (err)
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return err;
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/* Check device ID. We currently know about:
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* SCH3112 (0x7c), SCH3114 (0x7d), and SCH3116 (0x7f). */
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reg = sch311x_sio_inb(sio_config_port, 0x20);
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if (!(reg == 0x7c || reg == 0x7d || reg == 0x7f)) {
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err = -ENODEV;
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goto exit;
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}
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dev_id = reg == 0x7c ? 2 : reg == 0x7d ? 4 : 6;
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/* Select logical device A (runtime registers) */
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sch311x_sio_outb(sio_config_port, 0x07, 0x0a);
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/* Check if Logical Device Register is currently active */
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if ((sch311x_sio_inb(sio_config_port, 0x30) & 0x01) == 0)
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pr_info("Seems that LDN 0x0a is not active...\n");
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/* Get the base address of the runtime registers */
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base_addr = (sch311x_sio_inb(sio_config_port, 0x60) << 8) |
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sch311x_sio_inb(sio_config_port, 0x61);
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if (!base_addr) {
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pr_err("Base address not set\n");
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err = -ENODEV;
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goto exit;
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}
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*addr = base_addr;
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pr_info("Found an SMSC SCH311%d chip at 0x%04x\n", dev_id, base_addr);
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exit:
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sch311x_sio_exit(sio_config_port);
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return err;
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}
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static int __init sch311x_gpio_pdev_add(const unsigned short addr)
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{
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struct sch311x_pdev_data pdata;
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int err;
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pdata.runtime_reg = addr;
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sch311x_gpio_pdev = platform_device_alloc(DRV_NAME, -1);
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if (!sch311x_gpio_pdev)
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return -ENOMEM;
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err = platform_device_add_data(sch311x_gpio_pdev,
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&pdata, sizeof(pdata));
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if (err) {
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pr_err(DRV_NAME "Platform data allocation failed\n");
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goto err;
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}
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err = platform_device_add(sch311x_gpio_pdev);
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if (err) {
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pr_err(DRV_NAME "Device addition failed\n");
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goto err;
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}
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return 0;
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err:
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platform_device_put(sch311x_gpio_pdev);
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return err;
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}
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static int __init sch311x_gpio_init(void)
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{
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int err, i;
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unsigned short addr = 0;
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for (i = 0; i < ARRAY_SIZE(sch311x_ioports); i++)
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if (sch311x_detect(sch311x_ioports[i], &addr) == 0)
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break;
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if (!addr)
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return -ENODEV;
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err = platform_driver_register(&sch311x_gpio_driver);
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if (err)
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return err;
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err = sch311x_gpio_pdev_add(addr);
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if (err)
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goto unreg_platform_driver;
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return 0;
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unreg_platform_driver:
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platform_driver_unregister(&sch311x_gpio_driver);
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return err;
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}
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static void __exit sch311x_gpio_exit(void)
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{
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platform_device_unregister(sch311x_gpio_pdev);
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platform_driver_unregister(&sch311x_gpio_driver);
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}
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module_init(sch311x_gpio_init);
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module_exit(sch311x_gpio_exit);
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MODULE_AUTHOR("Bruno Randolf <br1@einfach.org>");
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MODULE_DESCRIPTION("SMSC SCH311x GPIO Driver");
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MODULE_LICENSE("GPL");
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MODULE_ALIAS("platform:gpio-sch311x");
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