RDMA/nes: Fix MAC interrupt erroneously masked on ifdown
Only mask out MAC interrupt if necessary and re-enable on ifup. There could be multiple netdevs going through the same MAC. MAC interrupts should not be masked off until the last netdev is downed. Signed-off-by: Chien Tung <ctung@neteffect.com> Signed-off-by: Glenn Streiff <gstreiff@neteffect.com> Signed-off-by: Roland Dreier <rolandd@cisco.com>
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@ -148,14 +148,15 @@ static int nes_netdev_open(struct net_device *netdev)
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struct nes_device *nesdev = nesvnic->nesdev;
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int ret;
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int i;
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struct nes_vnic *first_nesvnic;
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struct nes_vnic *first_nesvnic = NULL;
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u32 nic_active_bit;
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u32 nic_active;
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struct list_head *list_pos, *list_temp;
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assert(nesdev != NULL);
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first_nesvnic = list_entry(nesdev->nesadapter->nesvnic_list[nesdev->mac_index].next,
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struct nes_vnic, list);
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if (nesvnic->netdev_open == 1)
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return 0;
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if (netif_msg_ifup(nesvnic))
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printk(KERN_INFO PFX "%s: enabling interface\n", netdev->name);
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@ -225,7 +226,18 @@ static int nes_netdev_open(struct net_device *netdev)
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nes_write32(nesdev->regs+NES_CQE_ALLOC, NES_CQE_ALLOC_NOTIFY_NEXT |
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nesvnic->nic_cq.cq_number);
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nes_read32(nesdev->regs+NES_CQE_ALLOC);
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list_for_each_safe(list_pos, list_temp, &nesdev->nesadapter->nesvnic_list[nesdev->mac_index]) {
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first_nesvnic = container_of(list_pos, struct nes_vnic, list);
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if (first_nesvnic->netdev_open == 1)
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break;
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}
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if (first_nesvnic->netdev_open == 0) {
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nes_debug(NES_DBG_INIT, "Setting up MAC interrupt mask.\n");
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nes_write_indexed(nesdev, NES_IDX_MAC_INT_MASK + (0x200 * nesdev->mac_index),
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~(NES_MAC_INT_LINK_STAT_CHG | NES_MAC_INT_XGMII_EXT |
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NES_MAC_INT_TX_UNDERFLOW | NES_MAC_INT_TX_ERROR));
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first_nesvnic = nesvnic;
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}
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if (first_nesvnic->linkup) {
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/* Enable network packets */
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nesvnic->linkup = 1;
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@ -248,6 +260,8 @@ static int nes_netdev_stop(struct net_device *netdev)
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struct nes_device *nesdev = nesvnic->nesdev;
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u32 nic_active_mask;
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u32 nic_active;
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struct nes_vnic *first_nesvnic = NULL;
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struct list_head *list_pos, *list_temp;
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nes_debug(NES_DBG_SHUTDOWN, "nesvnic=%p, nesdev=%p, netdev=%p %s\n",
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nesvnic, nesdev, netdev, netdev->name);
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@ -260,9 +274,20 @@ static int nes_netdev_stop(struct net_device *netdev)
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/* Disable network packets */
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napi_disable(&nesvnic->napi);
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netif_stop_queue(netdev);
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if ((nesdev->netdev[0] == netdev) & (nesvnic->logical_port == nesdev->mac_index)) {
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nes_write_indexed(nesdev,
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NES_IDX_MAC_INT_MASK+(0x200*nesdev->mac_index), 0xffffffff);
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list_for_each_safe(list_pos, list_temp, &nesdev->nesadapter->nesvnic_list[nesdev->mac_index]) {
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first_nesvnic = container_of(list_pos, struct nes_vnic, list);
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if ((first_nesvnic->netdev_open == 1) && (first_nesvnic != nesvnic))
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break;
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}
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if (first_nesvnic->netdev_open == 0)
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nes_write_indexed(nesdev, NES_IDX_MAC_INT_MASK+(0x200*nesdev->mac_index), 0xffffffff);
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else if ((first_nesvnic != nesvnic) &&
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(PCI_FUNC(first_nesvnic->nesdev->pcidev->devfn) != PCI_FUNC(nesvnic->nesdev->pcidev->devfn))) {
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nes_write_indexed(nesdev, NES_IDX_MAC_INT_MASK + (0x200 * nesdev->mac_index), 0xffffffff);
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nes_write_indexed(first_nesvnic->nesdev, NES_IDX_MAC_INT_MASK + (0x200 * first_nesvnic->nesdev->mac_index),
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~(NES_MAC_INT_LINK_STAT_CHG | NES_MAC_INT_XGMII_EXT |
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NES_MAC_INT_TX_UNDERFLOW | NES_MAC_INT_TX_ERROR));
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}
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nic_active_mask = ~((u32)(1 << nesvnic->nic_index));
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@ -859,7 +884,6 @@ void nes_netdev_set_multicast_list(struct net_device *netdev)
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for (mc_index=0; mc_index < NES_MULTICAST_PF_MAX; mc_index++) {
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while (multicast_addr && nesvnic->mcrq_mcast_filter && ((mc_nic_index = nesvnic->mcrq_mcast_filter(nesvnic, multicast_addr->dmi_addr)) == 0))
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multicast_addr = multicast_addr->next;
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if (mc_nic_index < 0)
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mc_nic_index = nesvnic->nic_index;
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if (multicast_addr) {
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@ -1610,7 +1634,7 @@ struct net_device *nes_netdev_init(struct nes_device *nesdev,
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list_add_tail(&nesvnic->list, &nesdev->nesadapter->nesvnic_list[nesdev->mac_index]);
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if ((nesdev->netdev_count == 0) &&
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(PCI_FUNC(nesdev->pcidev->devfn) == nesdev->mac_index)) {
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(PCI_FUNC(nesdev->pcidev->devfn) == nesdev->mac_index)) {
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nes_debug(NES_DBG_INIT, "Setting up PHY interrupt mask. Using register index 0x%04X\n",
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NES_IDX_PHY_PCS_CONTROL_STATUS0+(0x200*(nesvnic->logical_port&1)));
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u32temp = nes_read_indexed(nesdev, NES_IDX_PHY_PCS_CONTROL_STATUS0 +
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@ -1648,18 +1672,14 @@ struct net_device *nes_netdev_init(struct nes_device *nesdev,
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nesvnic->linkup = 1;
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}
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}
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nes_debug(NES_DBG_INIT, "Setting up MAC interrupt mask.\n");
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/* clear the MAC interrupt status, assumes direct logical to physical mapping */
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u32temp = nes_read_indexed(nesdev, NES_IDX_MAC_INT_STATUS+(0x200*nesvnic->logical_port));
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u32temp = nes_read_indexed(nesdev, NES_IDX_MAC_INT_STATUS + (0x200 * nesdev->mac_index));
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nes_debug(NES_DBG_INIT, "Phy interrupt status = 0x%X.\n", u32temp);
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nes_write_indexed(nesdev, NES_IDX_MAC_INT_STATUS+(0x200*nesvnic->logical_port), u32temp);
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nes_write_indexed(nesdev, NES_IDX_MAC_INT_STATUS + (0x200 * nesdev->mac_index), u32temp);
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if (nesdev->nesadapter->phy_type[nesvnic->logical_port] != NES_PHY_TYPE_IRIS)
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if (nesdev->nesadapter->phy_type[nesdev->mac_index] != NES_PHY_TYPE_IRIS)
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nes_init_phy(nesdev);
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nes_write_indexed(nesdev, NES_IDX_MAC_INT_MASK+(0x200*nesvnic->logical_port),
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~(NES_MAC_INT_LINK_STAT_CHG | NES_MAC_INT_XGMII_EXT |
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NES_MAC_INT_TX_UNDERFLOW | NES_MAC_INT_TX_ERROR));
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}
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return netdev;
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