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arm: dts: owl-s500: Set CMU clocks for UARTs 

Set Clock Management Unit clocks for the UART nodes of Actions Semi
S500 SoCs and remove the dummy "uart2_clk" and "uart3_clk" fixed clocks.

Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@gmail.com>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
This commit is contained in:
Cristian Ciocaltea 2020-12-29 23:17:17 +02:00 committed by Manivannan Sadhasivam
parent b4d1e231fc
commit 11bc96ba75
6 changed files with 7 additions and 35 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

7
arch/arm/boot/dts/owl-s500-cubieboard6.dts
View File

@ -25,12 +25,6 @@
device_type = "memory";
reg = <0x0 0x80000000>;
};
uart3_clk: uart3-clk {
compatible = "fixed-clock";
clock-frequency = <921600>;
#clock-cells = <0>;
};
};
&timer {
@ -39,5 +33,4 @@
&uart3 {
status = "okay";
clocks = <&uart3_clk>;
};

7
arch/arm/boot/dts/owl-s500-guitar-bb-rev-b.dts
View File

@ -18,15 +18,8 @@
chosen {
stdout-path = "serial3:115200n8";
};
uart3_clk: uart3-clk {
compatible = "fixed-clock";
clock-frequency = <921600>;
#clock-cells = <0>;
};
};
&uart3 {
status = "okay";
clocks = <&uart3_clk>;
};

7
arch/arm/boot/dts/owl-s500-labrador-base-m.dts
View File

@ -21,15 +21,8 @@
chosen {
stdout-path = "serial3:115200n8";
};
uart3_clk: uart3-clk {
compatible = "fixed-clock";
clock-frequency = <921600>;
#clock-cells = <0>;
};
};
&uart3 {
status = "okay";
clocks = <&uart3_clk>;
};

7
arch/arm/boot/dts/owl-s500-roseapplepi.dts
View File

@ -25,12 +25,6 @@
device_type = "memory";
reg = <0x0 0x80000000>; /* 2GB */
};
uart2_clk: uart2-clk {
compatible = "fixed-clock";
clock-frequency = <921600>;
#clock-cells = <0>;
};
};
&twd_timer {
@ -43,5 +37,4 @@
&uart2 {
status = "okay";
clocks = <&uart2_clk>;
};

7
arch/arm/boot/dts/owl-s500-sparky.dts
View File

@ -25,12 +25,6 @@
device_type = "memory";
reg = <0x0 0x40000000>; /* 1 or 2 GiB */
};
uart3_clk: uart3-clk {
compatible = "fixed-clock";
clock-frequency = <921600>;
#clock-cells = <0>;
};
};
&timer {
@ -39,5 +33,4 @@
&uart3 {
status = "okay";
clocks = <&uart3_clk>;
};

7
arch/arm/boot/dts/owl-s500.dtsi
View File

@ -131,6 +131,7 @@
compatible = "actions,s500-uart", "actions,owl-uart";
reg = <0xb0120000 0x2000>;
interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cmu CLK_UART0>;
status = "disabled";
};
@ -138,6 +139,7 @@
compatible = "actions,s500-uart", "actions,owl-uart";
reg = <0xb0122000 0x2000>;
interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cmu CLK_UART1>;
status = "disabled";
};
@ -145,6 +147,7 @@
compatible = "actions,s500-uart", "actions,owl-uart";
reg = <0xb0124000 0x2000>;
interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cmu CLK_UART2>;
status = "disabled";
};
@ -152,6 +155,7 @@
compatible = "actions,s500-uart", "actions,owl-uart";
reg = <0xb0126000 0x2000>;
interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cmu CLK_UART3>;
status = "disabled";
};
@ -159,6 +163,7 @@
compatible = "actions,s500-uart", "actions,owl-uart";
reg = <0xb0128000 0x2000>;
interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cmu CLK_UART4>;
status = "disabled";
};
@ -166,6 +171,7 @@
compatible = "actions,s500-uart", "actions,owl-uart";
reg = <0xb012a000 0x2000>;
interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cmu CLK_UART5>;
status = "disabled";
};
@ -173,6 +179,7 @@
compatible = "actions,s500-uart", "actions,owl-uart";
reg = <0xb012c000 0x2000>;
interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cmu CLK_UART6>;
status = "disabled";
};