Merge branch 'drm-fixes' of git://people.freedesktop.org/~airlied/linux
Pull intel drm fixes from Dave Airlie. * 'drm-fixes' of git://people.freedesktop.org/~airlied/linux: drm/i915: vlv: fix save/restore of GFX_MAX_REQ_COUNT reg drm/i915: Workaround to avoid lite restore with HEAD==TAIL drm/i915: cope with large i2c transfers
This commit is contained in:
commit
1190944f4b
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@ -1038,7 +1038,7 @@ static void vlv_save_gunit_s0ix_state(struct drm_i915_private *dev_priv)
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s->lra_limits[i] = I915_READ(GEN7_LRA_LIMITS_BASE + i * 4);
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s->lra_limits[i] = I915_READ(GEN7_LRA_LIMITS_BASE + i * 4);
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s->media_max_req_count = I915_READ(GEN7_MEDIA_MAX_REQ_COUNT);
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s->media_max_req_count = I915_READ(GEN7_MEDIA_MAX_REQ_COUNT);
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s->gfx_max_req_count = I915_READ(GEN7_MEDIA_MAX_REQ_COUNT);
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s->gfx_max_req_count = I915_READ(GEN7_GFX_MAX_REQ_COUNT);
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s->render_hwsp = I915_READ(RENDER_HWS_PGA_GEN7);
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s->render_hwsp = I915_READ(RENDER_HWS_PGA_GEN7);
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s->ecochk = I915_READ(GAM_ECOCHK);
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s->ecochk = I915_READ(GAM_ECOCHK);
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@ -1120,7 +1120,7 @@ static void vlv_restore_gunit_s0ix_state(struct drm_i915_private *dev_priv)
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I915_WRITE(GEN7_LRA_LIMITS_BASE + i * 4, s->lra_limits[i]);
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I915_WRITE(GEN7_LRA_LIMITS_BASE + i * 4, s->lra_limits[i]);
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I915_WRITE(GEN7_MEDIA_MAX_REQ_COUNT, s->media_max_req_count);
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I915_WRITE(GEN7_MEDIA_MAX_REQ_COUNT, s->media_max_req_count);
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I915_WRITE(GEN7_MEDIA_MAX_REQ_COUNT, s->gfx_max_req_count);
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I915_WRITE(GEN7_GFX_MAX_REQ_COUNT, s->gfx_max_req_count);
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I915_WRITE(RENDER_HWS_PGA_GEN7, s->render_hwsp);
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I915_WRITE(RENDER_HWS_PGA_GEN7, s->render_hwsp);
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I915_WRITE(GAM_ECOCHK, s->ecochk);
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I915_WRITE(GAM_ECOCHK, s->ecochk);
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@ -2377,10 +2377,11 @@ int __i915_add_request(struct intel_engine_cs *ring,
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ret = ring->add_request(ring);
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ret = ring->add_request(ring);
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if (ret)
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if (ret)
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return ret;
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return ret;
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request->tail = intel_ring_get_tail(ringbuf);
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}
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}
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request->head = request_start;
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request->head = request_start;
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request->tail = intel_ring_get_tail(ringbuf);
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/* Whilst this request exists, batch_obj will be on the
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/* Whilst this request exists, batch_obj will be on the
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* active_list, and so will hold the active reference. Only when this
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* active_list, and so will hold the active reference. Only when this
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@ -1807,6 +1807,7 @@ enum skl_disp_power_wells {
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#define GMBUS_CYCLE_INDEX (2<<25)
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#define GMBUS_CYCLE_INDEX (2<<25)
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#define GMBUS_CYCLE_STOP (4<<25)
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#define GMBUS_CYCLE_STOP (4<<25)
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#define GMBUS_BYTE_COUNT_SHIFT 16
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#define GMBUS_BYTE_COUNT_SHIFT 16
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#define GMBUS_BYTE_COUNT_MAX 256U
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#define GMBUS_SLAVE_INDEX_SHIFT 8
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#define GMBUS_SLAVE_INDEX_SHIFT 8
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#define GMBUS_SLAVE_ADDR_SHIFT 1
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#define GMBUS_SLAVE_ADDR_SHIFT 1
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#define GMBUS_SLAVE_READ (1<<0)
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#define GMBUS_SLAVE_READ (1<<0)
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@ -270,18 +270,17 @@ gmbus_wait_idle(struct drm_i915_private *dev_priv)
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}
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}
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static int
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static int
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gmbus_xfer_read(struct drm_i915_private *dev_priv, struct i2c_msg *msg,
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gmbus_xfer_read_chunk(struct drm_i915_private *dev_priv,
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u32 gmbus1_index)
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unsigned short addr, u8 *buf, unsigned int len,
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u32 gmbus1_index)
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{
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{
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int reg_offset = dev_priv->gpio_mmio_base;
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int reg_offset = dev_priv->gpio_mmio_base;
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u16 len = msg->len;
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u8 *buf = msg->buf;
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I915_WRITE(GMBUS1 + reg_offset,
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I915_WRITE(GMBUS1 + reg_offset,
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gmbus1_index |
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gmbus1_index |
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GMBUS_CYCLE_WAIT |
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GMBUS_CYCLE_WAIT |
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(len << GMBUS_BYTE_COUNT_SHIFT) |
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(len << GMBUS_BYTE_COUNT_SHIFT) |
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(msg->addr << GMBUS_SLAVE_ADDR_SHIFT) |
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(addr << GMBUS_SLAVE_ADDR_SHIFT) |
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GMBUS_SLAVE_READ | GMBUS_SW_RDY);
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GMBUS_SLAVE_READ | GMBUS_SW_RDY);
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while (len) {
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while (len) {
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int ret;
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int ret;
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@ -303,11 +302,35 @@ gmbus_xfer_read(struct drm_i915_private *dev_priv, struct i2c_msg *msg,
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}
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}
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static int
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static int
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gmbus_xfer_write(struct drm_i915_private *dev_priv, struct i2c_msg *msg)
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gmbus_xfer_read(struct drm_i915_private *dev_priv, struct i2c_msg *msg,
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u32 gmbus1_index)
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{
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u8 *buf = msg->buf;
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unsigned int rx_size = msg->len;
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unsigned int len;
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int ret;
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do {
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len = min(rx_size, GMBUS_BYTE_COUNT_MAX);
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ret = gmbus_xfer_read_chunk(dev_priv, msg->addr,
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buf, len, gmbus1_index);
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if (ret)
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return ret;
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rx_size -= len;
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buf += len;
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} while (rx_size != 0);
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return 0;
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}
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static int
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gmbus_xfer_write_chunk(struct drm_i915_private *dev_priv,
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unsigned short addr, u8 *buf, unsigned int len)
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{
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{
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int reg_offset = dev_priv->gpio_mmio_base;
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int reg_offset = dev_priv->gpio_mmio_base;
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u16 len = msg->len;
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unsigned int chunk_size = len;
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u8 *buf = msg->buf;
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u32 val, loop;
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u32 val, loop;
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val = loop = 0;
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val = loop = 0;
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@ -319,8 +342,8 @@ gmbus_xfer_write(struct drm_i915_private *dev_priv, struct i2c_msg *msg)
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I915_WRITE(GMBUS3 + reg_offset, val);
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I915_WRITE(GMBUS3 + reg_offset, val);
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I915_WRITE(GMBUS1 + reg_offset,
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I915_WRITE(GMBUS1 + reg_offset,
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GMBUS_CYCLE_WAIT |
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GMBUS_CYCLE_WAIT |
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(msg->len << GMBUS_BYTE_COUNT_SHIFT) |
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(chunk_size << GMBUS_BYTE_COUNT_SHIFT) |
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(msg->addr << GMBUS_SLAVE_ADDR_SHIFT) |
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(addr << GMBUS_SLAVE_ADDR_SHIFT) |
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GMBUS_SLAVE_WRITE | GMBUS_SW_RDY);
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GMBUS_SLAVE_WRITE | GMBUS_SW_RDY);
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while (len) {
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while (len) {
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int ret;
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int ret;
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@ -337,6 +360,29 @@ gmbus_xfer_write(struct drm_i915_private *dev_priv, struct i2c_msg *msg)
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if (ret)
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if (ret)
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return ret;
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return ret;
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}
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}
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return 0;
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}
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static int
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gmbus_xfer_write(struct drm_i915_private *dev_priv, struct i2c_msg *msg)
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{
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u8 *buf = msg->buf;
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unsigned int tx_size = msg->len;
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unsigned int len;
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int ret;
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do {
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len = min(tx_size, GMBUS_BYTE_COUNT_MAX);
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ret = gmbus_xfer_write_chunk(dev_priv, msg->addr, buf, len);
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if (ret)
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return ret;
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buf += len;
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tx_size -= len;
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} while (tx_size != 0);
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return 0;
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return 0;
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}
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}
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@ -393,6 +393,26 @@ static void execlists_context_unqueue(struct intel_engine_cs *ring)
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}
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}
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}
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}
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if (IS_GEN8(ring->dev) || IS_GEN9(ring->dev)) {
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/*
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* WaIdleLiteRestore: make sure we never cause a lite
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* restore with HEAD==TAIL
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*/
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if (req0 && req0->elsp_submitted) {
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/*
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* Apply the wa NOOPS to prevent ring:HEAD == req:TAIL
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* as we resubmit the request. See gen8_emit_request()
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* for where we prepare the padding after the end of the
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* request.
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*/
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struct intel_ringbuffer *ringbuf;
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ringbuf = req0->ctx->engine[ring->id].ringbuf;
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req0->tail += 8;
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req0->tail &= ringbuf->size - 1;
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}
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}
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WARN_ON(req1 && req1->elsp_submitted);
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WARN_ON(req1 && req1->elsp_submitted);
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execlists_submit_contexts(ring, req0->ctx, req0->tail,
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execlists_submit_contexts(ring, req0->ctx, req0->tail,
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@ -1315,7 +1335,12 @@ static int gen8_emit_request(struct intel_ringbuffer *ringbuf,
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u32 cmd;
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u32 cmd;
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int ret;
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int ret;
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ret = intel_logical_ring_begin(ringbuf, request->ctx, 6);
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/*
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* Reserve space for 2 NOOPs at the end of each request to be
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* used as a workaround for not being allowed to do lite
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* restore with HEAD==TAIL (WaIdleLiteRestore).
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*/
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ret = intel_logical_ring_begin(ringbuf, request->ctx, 8);
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if (ret)
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if (ret)
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return ret;
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return ret;
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@ -1333,6 +1358,14 @@ static int gen8_emit_request(struct intel_ringbuffer *ringbuf,
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intel_logical_ring_emit(ringbuf, MI_NOOP);
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intel_logical_ring_emit(ringbuf, MI_NOOP);
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intel_logical_ring_advance_and_submit(ringbuf, request->ctx, request);
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intel_logical_ring_advance_and_submit(ringbuf, request->ctx, request);
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/*
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* Here we add two extra NOOPs as padding to avoid
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* lite restore of a context with HEAD==TAIL.
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*/
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intel_logical_ring_emit(ringbuf, MI_NOOP);
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intel_logical_ring_emit(ringbuf, MI_NOOP);
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intel_logical_ring_advance(ringbuf);
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return 0;
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return 0;
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}
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}
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