ia64: remove the SGI UV simulator support
The simulator support was marked as temporary since the initial commit, so drop it more than 10 years later. Signed-off-by: Christoph Hellwig <hch@lst.de> Link: https://lkml.kernel.org/r/20190813072514.23299-22-hch@lst.de Signed-off-by: Tony Luck <tony.luck@intel.com>
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@ -1,25 +0,0 @@
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/*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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* Copyright (C) 2000-2004 Silicon Graphics, Inc. All rights reserved.
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*/
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#ifndef _ASM_IA64_SN_SIMULATOR_H
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#define _ASM_IA64_SN_SIMULATOR_H
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#if defined(CONFIG_IA64_GENERIC) || defined(CONFIG_IA64_SGI_UV)
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#define SNMAGIC 0xaeeeeeee8badbeefL
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#define IS_MEDUSA() ({long sn; asm("mov %0=cpuid[%1]" : "=r"(sn) : "r"(2)); sn == SNMAGIC;})
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#define SIMULATOR_SLEEP() asm("nop.i 0x8beef")
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#define IS_RUNNING_ON_SIMULATOR() (sn_prom_type)
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#define IS_RUNNING_ON_FAKE_PROM() (sn_prom_type == 2)
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extern int sn_prom_type; /* 0=hardware, 1=medusa/realprom, 2=medusa/fakeprom */
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#else
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#define IS_MEDUSA() 0
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#define SIMULATOR_SLEEP()
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#define IS_RUNNING_ON_SIMULATOR() 0
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#endif
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#endif /* _ASM_IA64_SN_SIMULATOR_H */
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@ -30,8 +30,6 @@
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#define SALRET_INVALID_ARG (-2)
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#define SALRET_ERROR (-3)
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#define SN_SAL_FAKE_PROM 0x02009999
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/*
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* Returns the physical address of the partition's reserved page through
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* an iterative number of calls.
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@ -81,14 +79,6 @@ sn_change_memprotect(u64 paddr, u64 len, u64 perms, u64 *nasid_array)
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#define SN_MEMPROT_ACCESS_CLASS_6 0x084080
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#define SN_MEMPROT_ACCESS_CLASS_7 0x021080
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static inline int
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ia64_sn_is_fake_prom(void)
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{
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struct ia64_sal_retval rv;
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SAL_CALL_NOLOCK(rv, SN_SAL_FAKE_PROM, 0, 0, 0, 0, 0, 0, 0);
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return (rv.status == 0);
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}
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union sn_watchlist_u {
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u64 val;
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struct {
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@ -2,12 +2,10 @@
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#ifndef _ASM_IA64_UV_UV_H
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#define _ASM_IA64_UV_UV_H
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#include <asm/sn/simulator.h>
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static inline int is_uv_system(void)
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{
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/* temporary support for running on hardware simulator */
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return IS_MEDUSA() || ia64_platform_is("uv");
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return ia64_platform_is("uv");
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}
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#endif /* _ASM_IA64_UV_UV_H */
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@ -10,14 +10,12 @@
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#include <linux/module.h>
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#include <linux/percpu.h>
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#include <asm/sn/simulator.h>
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#include <asm/uv/uv_mmrs.h>
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#include <asm/uv/uv_hub.h>
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DEFINE_PER_CPU(struct uv_hub_info_s, __uv_hub_info);
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EXPORT_PER_CPU_SYMBOL_GPL(__uv_hub_info);
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int sn_prom_type;
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long sn_coherency_id;
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EXPORT_SYMBOL_GPL(sn_coherency_id);
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@ -60,30 +58,11 @@ void __init uv_setup(char **cmdline_p)
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int nid, cpu, m_val, n_val;
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unsigned long mmr_base, lowmem_redir_base, lowmem_redir_size;
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if (IS_MEDUSA()) {
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lowmem_redir_base = 0;
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lowmem_redir_size = 0;
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node_id.v = 0;
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m_n_config.s.m_skt = 37;
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m_n_config.s.n_skt = 0;
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mmr_base = 0;
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#if 0
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/* Need BIOS calls - TDB */
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if (!ia64_sn_is_fake_prom())
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sn_prom_type = 1;
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else
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#endif
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sn_prom_type = 2;
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printk(KERN_INFO "Running on medusa with %s PROM\n",
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(sn_prom_type == 1) ? "real" : "fake");
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} else {
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get_lowmem_redirect(&lowmem_redir_base, &lowmem_redir_size);
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node_id.v = uv_read_local_mmr(UVH_NODE_ID);
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m_n_config.v = uv_read_local_mmr(UVH_SI_ADDR_MAP_CONFIG);
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mmr_base =
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uv_read_local_mmr(UVH_RH_GAM_MMR_OVERLAY_CONFIG_MMR) &
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~UV_MMR_ENABLE;
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}
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get_lowmem_redirect(&lowmem_redir_base, &lowmem_redir_size);
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node_id.v = uv_read_local_mmr(UVH_NODE_ID);
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m_n_config.v = uv_read_local_mmr(UVH_SI_ADDR_MAP_CONFIG);
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mmr_base = uv_read_local_mmr(UVH_RH_GAM_MMR_OVERLAY_CONFIG_MMR) &
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~UV_MMR_ENABLE;
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m_val = m_n_config.s.m_skt;
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n_val = m_n_config.s.n_skt;
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