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staging: rtl8192e: Cleanup checkpatch -f warnings and errors - Part III 

Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
This commit is contained in:
Larry Finger 2011-08-25 11:48:15 -05:00 committed by Greg Kroah-Hartman
parent 526294770c
commit 11632a0eed
5 changed files with 667 additions and 640 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

30
drivers/staging/rtl8192e/r8192E_dev.h
View File

@ -28,11 +28,12 @@
#include "r8190P_def.h" #include "r8190P_def.h"
u8 rtl8192_QueryIsShort(u8 TxHT, u8 TxRate, struct cb_desc *tcb_desc); u8 rtl8192_QueryIsShort(u8 TxHT, u8 TxRate, struct cb_desc *tcb_desc);
bool rtl8192_GetHalfNmodeSupportByAPs(struct net_device* dev); bool rtl8192_GetHalfNmodeSupportByAPs(struct net_device *dev);
bool rtl8192_GetNmodeSupportBySecCfg(struct net_device *dev); bool rtl8192_GetNmodeSupportBySecCfg(struct net_device *dev);
bool rtl8192_HalTxCheckStuck(struct net_device *dev); bool rtl8192_HalTxCheckStuck(struct net_device *dev);
bool rtl8192_HalRxCheckStuck(struct net_device *dev); bool rtl8192_HalRxCheckStuck(struct net_device *dev);
void rtl8192_interrupt_recognized(struct net_device *dev, u32 *p_inta, u32 *p_intb); void rtl8192_interrupt_recognized(struct net_device *dev, u32 *p_inta,
u32 *p_intb);
void rtl8192_enable_rx(struct net_device *dev); void rtl8192_enable_rx(struct net_device *dev);
void rtl8192_enable_tx(struct net_device *dev); void rtl8192_enable_tx(struct net_device *dev);
void rtl8192_EnableInterrupt(struct net_device *dev); void rtl8192_EnableInterrupt(struct net_device *dev);
@ -40,17 +41,22 @@ void rtl8192_DisableInterrupt(struct net_device *dev);
void rtl8192_ClearInterrupt(struct net_device *dev); void rtl8192_ClearInterrupt(struct net_device *dev);
void rtl8192_InitializeVariables(struct net_device *dev); void rtl8192_InitializeVariables(struct net_device *dev);
void rtl8192e_start_beacon(struct net_device *dev); void rtl8192e_start_beacon(struct net_device *dev);
void rtl8192e_SetHwReg(struct net_device *dev,u8 variable,u8* val); void rtl8192e_SetHwReg(struct net_device *dev, u8 variable, u8 *val);
void rtl8192_get_eeprom_size(struct net_device* dev); void rtl8192_get_eeprom_size(struct net_device *dev);
bool rtl8192_adapter_start(struct net_device *dev); bool rtl8192_adapter_start(struct net_device *dev);
void rtl8192_link_change(struct net_device *dev); void rtl8192_link_change(struct net_device *dev);
void rtl8192_AllowAllDestAddr(struct net_device* dev, bool bAllowAllDA, bool WriteIntoReg); void rtl8192_AllowAllDestAddr(struct net_device *dev, bool bAllowAllDA,
void rtl8192_tx_fill_desc(struct net_device* dev, struct tx_desc * pdesc, struct cb_desc *cb_desc, bool WriteIntoReg);
struct sk_buff* skb); void rtl8192_tx_fill_desc(struct net_device *dev, struct tx_desc *pdesc,
void rtl8192_tx_fill_cmd_desc(struct net_device* dev, struct tx_desc_cmd * entry, struct cb_desc *cb_desc,
struct cb_desc *cb_desc, struct sk_buff* skb); struct sk_buff *skb);
bool rtl8192_rx_query_status_desc(struct net_device* dev, struct rtllib_rx_stats *stats, void rtl8192_tx_fill_cmd_desc(struct net_device *dev,
struct rx_desc *pdesc, struct sk_buff* skb); struct tx_desc_cmd *entry,
struct cb_desc *cb_desc, struct sk_buff *skb);
bool rtl8192_rx_query_status_desc(struct net_device *dev,
struct rtllib_rx_stats *stats,
struct rx_desc *pdesc,
struct sk_buff *skb);
void rtl8192_halt_adapter(struct net_device *dev, bool reset); void rtl8192_halt_adapter(struct net_device *dev, bool reset);
void rtl8192_update_ratr_table(struct net_device* dev); void rtl8192_update_ratr_table(struct net_device *dev);
#endif #endif

154
drivers/staging/rtl8192e/r8192E_firmware.c
View File

@ -28,10 +28,12 @@ extern void firmware_init_param(struct net_device *dev)
struct r8192_priv *priv = rtllib_priv(dev); struct r8192_priv *priv = rtllib_priv(dev);
struct rt_firmware *pfirmware = priv->pFirmware; struct rt_firmware *pfirmware = priv->pFirmware;
pfirmware->cmdpacket_frag_thresold = GET_COMMAND_PACKET_FRAG_THRESHOLD(MAX_TRANSMIT_BUFFER_SIZE); pfirmware->cmdpacket_frag_thresold = GET_COMMAND_PACKET_FRAG_THRESHOLD(
MAX_TRANSMIT_BUFFER_SIZE);
} }
bool fw_download_code(struct net_device *dev, u8 *code_virtual_address, u32 buffer_len) bool fw_download_code(struct net_device *dev, u8 *code_virtual_address,
u32 buffer_len)
{ {
struct r8192_priv *priv = rtllib_priv(dev); struct r8192_priv *priv = rtllib_priv(dev);
bool rt_status = true; bool rt_status = true;
@ -59,46 +61,48 @@ bool fw_download_code(struct net_device *dev, u8 *code_virtual_address, u32 buff
} }
skb = dev_alloc_skb(frag_length + 4); skb = dev_alloc_skb(frag_length + 4);
memcpy((unsigned char *)(skb->cb),&dev,sizeof(dev)); memcpy((unsigned char *)(skb->cb), &dev, sizeof(dev));
tcb_desc = (struct cb_desc *)(skb->cb + MAX_DEV_ADDR_SIZE); tcb_desc = (struct cb_desc *)(skb->cb + MAX_DEV_ADDR_SIZE);
tcb_desc->queue_index = TXCMD_QUEUE; tcb_desc->queue_index = TXCMD_QUEUE;
tcb_desc->bCmdOrInit = DESC_PACKET_TYPE_INIT; tcb_desc->bCmdOrInit = DESC_PACKET_TYPE_INIT;
tcb_desc->bLastIniPkt = bLastIniPkt; tcb_desc->bLastIniPkt = bLastIniPkt;
seg_ptr = skb->data; seg_ptr = skb->data;
for (i=0 ; i < frag_length; i+=4) { for (i = 0; i < frag_length; i += 4) {
*seg_ptr++ = ((i+0)<frag_length)?code_virtual_address[i+3]:0; *seg_ptr++ = ((i+0) < frag_length) ?
*seg_ptr++ = ((i+1)<frag_length)?code_virtual_address[i+2]:0; code_virtual_address[i+3] : 0;
*seg_ptr++ = ((i+2)<frag_length)?code_virtual_address[i+1]:0; *seg_ptr++ = ((i+1) < frag_length) ?
*seg_ptr++ = ((i+3)<frag_length)?code_virtual_address[i+0]:0; code_virtual_address[i+2] : 0;
*seg_ptr++ = ((i+2) < frag_length) ?
code_virtual_address[i+1] : 0;
*seg_ptr++ = ((i+3) < frag_length) ?
code_virtual_address[i+0] : 0;
} }
tcb_desc->txbuf_size= (u16)i; tcb_desc->txbuf_size = (u16)i;
skb_put(skb, i); skb_put(skb, i);
if (!priv->rtllib->check_nic_enough_desc(dev,tcb_desc->queue_index)|| if (!priv->rtllib->check_nic_enough_desc(dev, tcb_desc->queue_index) ||
(!skb_queue_empty(&priv->rtllib->skb_waitQ[tcb_desc->queue_index]))||\ (!skb_queue_empty(&priv->rtllib->skb_waitQ[tcb_desc->queue_index])) ||
(priv->rtllib->queue_stop) ) { (priv->rtllib->queue_stop)) {
RT_TRACE(COMP_FIRMWARE, "===================> tx full!\n"); RT_TRACE(COMP_FIRMWARE, "===================> tx "
skb_queue_tail(&priv->rtllib->skb_waitQ[tcb_desc->queue_index], skb); "full!\n");
skb_queue_tail(&priv->rtllib->skb_waitQ
[tcb_desc->queue_index], skb);
} else { } else {
priv->rtllib->softmac_hard_start_xmit(skb,dev); priv->rtllib->softmac_hard_start_xmit(skb, dev);
} }
code_virtual_address += frag_length; code_virtual_address += frag_length;
frag_offset += frag_length; frag_offset += frag_length;
}while(frag_offset < buffer_len); } while (frag_offset < buffer_len);
write_nic_byte(dev, TPPoll, TPPoll_CQ); write_nic_byte(dev, TPPoll, TPPoll_CQ);
return rt_status; return rt_status;
} }
bool bool fwSendNullPacket(struct net_device *dev, u32 Length)
fwSendNullPacket(
struct net_device *dev,
u32 Length
)
{ {
bool rtStatus = true; bool rtStatus = true;
struct r8192_priv *priv = rtllib_priv(dev); struct r8192_priv *priv = rtllib_priv(dev);
@ -108,23 +112,25 @@ fwSendNullPacket(
bool bLastInitPacket = false; bool bLastInitPacket = false;
skb = dev_alloc_skb(Length+ 4); skb = dev_alloc_skb(Length + 4);
memcpy((unsigned char *)(skb->cb),&dev,sizeof(dev)); memcpy((unsigned char *)(skb->cb), &dev, sizeof(dev));
tcb_desc = (struct cb_desc *)(skb->cb + MAX_DEV_ADDR_SIZE); tcb_desc = (struct cb_desc *)(skb->cb + MAX_DEV_ADDR_SIZE);
tcb_desc->queue_index = TXCMD_QUEUE; tcb_desc->queue_index = TXCMD_QUEUE;
tcb_desc->bCmdOrInit = DESC_PACKET_TYPE_INIT; tcb_desc->bCmdOrInit = DESC_PACKET_TYPE_INIT;
tcb_desc->bLastIniPkt = bLastInitPacket; tcb_desc->bLastIniPkt = bLastInitPacket;
ptr_buf = skb_put(skb, Length); ptr_buf = skb_put(skb, Length);
memset(ptr_buf,0,Length); memset(ptr_buf, 0, Length);
tcb_desc->txbuf_size= (u16)Length; tcb_desc->txbuf_size = (u16)Length;
if (!priv->rtllib->check_nic_enough_desc(dev,tcb_desc->queue_index)|| if (!priv->rtllib->check_nic_enough_desc(dev, tcb_desc->queue_index) ||
(!skb_queue_empty(&priv->rtllib->skb_waitQ[tcb_desc->queue_index]))||\ (!skb_queue_empty(&priv->rtllib->skb_waitQ[tcb_desc->
(priv->rtllib->queue_stop) ) { queue_index])) || (priv->rtllib->queue_stop)) {
RT_TRACE(COMP_FIRMWARE,"===================NULL packet================> tx full!\n"); RT_TRACE(COMP_FIRMWARE, "===================NULL packet========"
skb_queue_tail(&priv->rtllib->skb_waitQ[tcb_desc->queue_index], skb); "========> tx full!\n");
skb_queue_tail(&priv->rtllib->skb_waitQ[tcb_desc->queue_index],
skb);
} else { } else {
priv->rtllib->softmac_hard_start_xmit(skb,dev); priv->rtllib->softmac_hard_start_xmit(skb, dev);
} }
write_nic_byte(dev, TPPoll, TPPoll_CQ); write_nic_byte(dev, TPPoll, TPPoll_CQ);
@ -142,7 +148,7 @@ bool CPUcheck_maincodeok_turnonCPU(struct net_device *dev)
CPU_status = read_nic_dword(dev, CPU_GEN); CPU_status = read_nic_dword(dev, CPU_GEN);
if (CPU_status & CPU_GEN_PUT_CODE_OK) if (CPU_status & CPU_GEN_PUT_CODE_OK)
break; break;
msleep(2); mdelay(2);
} }
if (!(CPU_status&CPU_GEN_PUT_CODE_OK)) { if (!(CPU_status&CPU_GEN_PUT_CODE_OK)) {
@ -153,7 +159,8 @@ bool CPUcheck_maincodeok_turnonCPU(struct net_device *dev)
} }
CPU_status = read_nic_dword(dev, CPU_GEN); CPU_status = read_nic_dword(dev, CPU_GEN);
write_nic_byte(dev, CPU_GEN, (u8)((CPU_status|CPU_GEN_PWR_STB_CPU)&0xff)); write_nic_byte(dev, CPU_GEN,
(u8)((CPU_status|CPU_GEN_PWR_STB_CPU)&0xff));
mdelay(1); mdelay(1);
timeout = jiffies + MSECS(200); timeout = jiffies + MSECS(200);
@ -161,14 +168,13 @@ bool CPUcheck_maincodeok_turnonCPU(struct net_device *dev)
CPU_status = read_nic_dword(dev, CPU_GEN); CPU_status = read_nic_dword(dev, CPU_GEN);
if (CPU_status&CPU_GEN_BOOT_RDY) if (CPU_status&CPU_GEN_BOOT_RDY)
break; break;
msleep(2); mdelay(2);
} }
if (!(CPU_status&CPU_GEN_BOOT_RDY)) { if (!(CPU_status&CPU_GEN_BOOT_RDY))
goto CPUCheckMainCodeOKAndTurnOnCPU_Fail; goto CPUCheckMainCodeOKAndTurnOnCPU_Fail;
} else { else
RT_TRACE(COMP_FIRMWARE, "Download Firmware: Boot ready!\n"); RT_TRACE(COMP_FIRMWARE, "Download Firmware: Boot ready!\n");
}
return rt_status; return rt_status;
@ -190,7 +196,7 @@ bool CPUcheck_firmware_ready(struct net_device *dev)
CPU_status = read_nic_dword(dev, CPU_GEN); CPU_status = read_nic_dword(dev, CPU_GEN);
if (CPU_status&CPU_GEN_FIRM_RDY) if (CPU_status&CPU_GEN_FIRM_RDY)
break; break;
msleep(2); mdelay(2);
} }
if (!(CPU_status&CPU_GEN_FIRM_RDY)) if (!(CPU_status&CPU_GEN_FIRM_RDY))
@ -207,7 +213,8 @@ CPUCheckFirmwareReady_Fail:
} }
inline static bool firmware_check_ready(struct net_device *dev, u8 load_fw_status) static bool firmware_check_ready(struct net_device *dev,
u8 load_fw_status)
{ {
struct r8192_priv *priv = rtllib_priv(dev); struct r8192_priv *priv = rtllib_priv(dev);
struct rt_firmware *pfirmware = priv->pFirmware; struct rt_firmware *pfirmware = priv->pFirmware;
@ -222,11 +229,11 @@ inline static bool firmware_check_ready(struct net_device *dev, u8 load_fw_statu
pfirmware->firmware_status = FW_STATUS_2_MOVE_MAIN_CODE; pfirmware->firmware_status = FW_STATUS_2_MOVE_MAIN_CODE;
rt_status = CPUcheck_maincodeok_turnonCPU(dev); rt_status = CPUcheck_maincodeok_turnonCPU(dev);
if (rt_status) { if (rt_status)
pfirmware->firmware_status = FW_STATUS_3_TURNON_CPU; pfirmware->firmware_status = FW_STATUS_3_TURNON_CPU;
} else { else
RT_TRACE(COMP_FIRMWARE, "CPUcheck_maincodeok_turnonCPU fail!\n"); RT_TRACE(COMP_FIRMWARE, "CPUcheck_maincodeok_turnon"
} "CPU fail!\n");
break; break;
@ -235,11 +242,11 @@ inline static bool firmware_check_ready(struct net_device *dev, u8 load_fw_statu
mdelay(1); mdelay(1);
rt_status = CPUcheck_firmware_ready(dev); rt_status = CPUcheck_firmware_ready(dev);
if (rt_status) { if (rt_status)
pfirmware->firmware_status = FW_STATUS_5_READY; pfirmware->firmware_status = FW_STATUS_5_READY;
} else { else
RT_TRACE(COMP_FIRMWARE, "CPUcheck_firmware_ready fail(%d)!\n",rt_status); RT_TRACE(COMP_FIRMWARE, "CPUcheck_firmware_ready fail"
} "(%d)!\n", rt_status);
break; break;
default: default:
@ -273,53 +280,64 @@ bool init_firmware(struct net_device *dev)
RT_TRACE(COMP_FIRMWARE, " PlatformInitFirmware()==>\n"); RT_TRACE(COMP_FIRMWARE, " PlatformInitFirmware()==>\n");
if (pfirmware->firmware_status == FW_STATUS_0_INIT ) { if (pfirmware->firmware_status == FW_STATUS_0_INIT) {
rst_opt = OPT_SYSTEM_RESET; rst_opt = OPT_SYSTEM_RESET;
starting_state = FW_INIT_STEP0_BOOT; starting_state = FW_INIT_STEP0_BOOT;
}else if (pfirmware->firmware_status == FW_STATUS_5_READY) { } else if (pfirmware->firmware_status == FW_STATUS_5_READY) {
rst_opt = OPT_FIRMWARE_RESET; rst_opt = OPT_FIRMWARE_RESET;
starting_state = FW_INIT_STEP2_DATA; starting_state = FW_INIT_STEP2_DATA;
}else { } else {
RT_TRACE(COMP_FIRMWARE, "PlatformInitFirmware: undefined firmware state\n"); RT_TRACE(COMP_FIRMWARE, "PlatformInitFirmware: undefined"
" firmware state\n");
} }
priv->firmware_source = FW_SOURCE_IMG_FILE; priv->firmware_source = FW_SOURCE_IMG_FILE;
for (init_step = starting_state; init_step <= FW_INIT_STEP2_DATA; init_step++) { for (init_step = starting_state; init_step <= FW_INIT_STEP2_DATA;
init_step++) {
if (rst_opt == OPT_SYSTEM_RESET) { if (rst_opt == OPT_SYSTEM_RESET) {
switch (priv->firmware_source) { switch (priv->firmware_source) {
case FW_SOURCE_IMG_FILE: case FW_SOURCE_IMG_FILE:
{ {
if (pfirmware->firmware_buf_size[init_step] == 0) { if (pfirmware->firmware_buf_size[init_step] == 0) {
const char *fw_name[3] = { "RTL8192E/boot.img", const char *fw_name[3] = { "RTL8192E/boot.img",
"RTL8192E/main.img", "RTL8192E/main.img",
"RTL8192E/data.img" "RTL8192E/data.img"
}; };
const struct firmware *fw_entry; const struct firmware *fw_entry;
int rc; int rc;
rc = request_firmware(&fw_entry, fw_name[init_step],&priv->pdev->dev); rc = request_firmware(&fw_entry,
if (rc < 0 ) { fw_name[init_step], &priv->pdev->dev);
RT_TRACE(COMP_FIRMWARE, "request firmware fail!\n"); if (rc < 0) {
RT_TRACE(COMP_FIRMWARE, "request firm"
"ware fail!\n");
goto download_firmware_fail; goto download_firmware_fail;
} }
if (fw_entry->size > sizeof(pfirmware->firmware_buf[init_step])) { if (fw_entry->size >
RT_TRACE(COMP_FIRMWARE, "img file size exceed the container struct buffer fail!\n"); sizeof(pfirmware->firmware_buf[init_step])) {
RT_TRACE(COMP_FIRMWARE, "img file size "
"exceed the container struct "
"buffer fail!\n");
goto download_firmware_fail; goto download_firmware_fail;
} }
if (init_step != FW_INIT_STEP1_MAIN) { if (init_step != FW_INIT_STEP1_MAIN) {
memcpy(pfirmware->firmware_buf[init_step],fw_entry->data,fw_entry->size); memcpy(pfirmware->firmware_buf[init_step],
pfirmware->firmware_buf_size[init_step] = fw_entry->size; fw_entry->data, fw_entry->size);
pfirmware->firmware_buf_size[init_step] =
fw_entry->size;
} else { } else {
memset(pfirmware->firmware_buf[init_step],0,128); memset(pfirmware->firmware_buf[init_step],
memcpy(&pfirmware->firmware_buf[init_step][128],fw_entry->data,fw_entry->size); 0, 128);
pfirmware->firmware_buf_size[init_step] = fw_entry->size+128; memcpy(&pfirmware->firmware_buf[init_step][128],
fw_entry->data, fw_entry->size);
pfirmware->firmware_buf_size[init_step] =
fw_entry->size + 128;
} }
if (rst_opt == OPT_SYSTEM_RESET) { if (rst_opt == OPT_SYSTEM_RESET)
release_firmware(fw_entry); release_firmware(fw_entry);
}
} }
mapped_file = pfirmware->firmware_buf[init_step]; mapped_file = pfirmware->firmware_buf[init_step];
file_length = pfirmware->firmware_buf_size[init_step]; file_length = pfirmware->firmware_buf_size[init_step];
@ -344,7 +362,7 @@ bool init_firmware(struct net_device *dev)
file_length = pfirmware->firmware_buf_size[init_step]; file_length = pfirmware->firmware_buf_size[init_step];
} }
rt_status = fw_download_code(dev,mapped_file,file_length); rt_status = fw_download_code(dev, mapped_file, file_length);
if (rt_status != true) { if (rt_status != true) {
goto download_firmware_fail; goto download_firmware_fail;
} }

4
drivers/staging/rtl8192e/r8192E_firmware.h
View File

@ -21,7 +21,7 @@
#define RTL8190_CPU_START_OFFSET 0x80 #define RTL8190_CPU_START_OFFSET 0x80
#define GET_COMMAND_PACKET_FRAG_THRESHOLD(v) (4*(v/4) - 8 ) #define GET_COMMAND_PACKET_FRAG_THRESHOLD(v) (4*(v/4) - 8)
enum firmware_init_step { enum firmware_init_step {
FW_INIT_STEP0_BOOT = 0, FW_INIT_STEP0_BOOT = 0,
@ -63,7 +63,7 @@ struct rt_firmware {
u16 cmdpacket_frag_thresold; u16 cmdpacket_frag_thresold;
#define RTL8190_MAX_FIRMWARE_CODE_SIZE 64000 #define RTL8190_MAX_FIRMWARE_CODE_SIZE 64000
#define MAX_FW_INIT_STEP 3 #define MAX_FW_INIT_STEP 3
u8 firmware_buf[MAX_FW_INIT_STEP][RTL8190_MAX_FIRMWARE_CODE_SIZE]; u8 firmware_buf[MAX_FW_INIT_STEP][RTL8190_MAX_FIRMWARE_CODE_SIZE];
u16 firmware_buf_size[MAX_FW_INIT_STEP]; u16 firmware_buf_size[MAX_FW_INIT_STEP];
}; };

76
drivers/staging/rtl8192e/r8192E_hw.h
View File

@ -109,7 +109,7 @@ enum _RTL8192Pci_HW {
#define MULRW_SHIFT 3 #define MULRW_SHIFT 3
#define MXDMA2_RX_SHIFT 4 #define MXDMA2_RX_SHIFT 4
#define MXDMA2_TX_SHIFT 0 #define MXDMA2_TX_SHIFT 0
PMR = 0x00c, PMR = 0x00c,
EPROM_CMD = 0x00e, EPROM_CMD = 0x00e,
#define EPROM_CMD_RESERVED_MASK BIT5 #define EPROM_CMD_RESERVED_MASK BIT5
#define EPROM_CMD_9356SEL BIT4 #define EPROM_CMD_9356SEL BIT4
@ -141,7 +141,8 @@ enum _RTL8192Pci_HW {
SIFS = 0x03E, SIFS = 0x03E,
TCR = 0x040, TCR = 0x040,
RCR = 0x044, RCR = 0x044,
#define RCR_FILTER_MASK (BIT0|BIT1|BIT2|BIT3|BIT5|BIT12|BIT18|BIT19|BIT20|BIT21|BIT22|BIT23) #define RCR_FILTER_MASK (BIT0 | BIT1 | BIT2 | BIT3 | BIT5 | BIT12 | \
BIT18 | BIT19 | BIT20 | BIT21 | BIT22 | BIT23)
#define RCR_ONLYERLPKT BIT31 #define RCR_ONLYERLPKT BIT31
#define RCR_ENCS2 BIT30 #define RCR_ENCS2 BIT30
#define RCR_ENCS1 BIT29 #define RCR_ENCS1 BIT29
@ -337,9 +338,9 @@ enum _RTL8192Pci_HW {
NHM_RPI_COUNTER5 = 0x269, NHM_RPI_COUNTER5 = 0x269,
NHM_RPI_COUNTER6 = 0x26A, NHM_RPI_COUNTER6 = 0x26A,
NHM_RPI_COUNTER7 = 0x26B, NHM_RPI_COUNTER7 = 0x26B,
WFCRC0 = 0x2f0, WFCRC0 = 0x2f0,
WFCRC1 = 0x2f4, WFCRC1 = 0x2f4,
WFCRC2 = 0x2f8, WFCRC2 = 0x2f8,
BW_OPMODE = 0x300, BW_OPMODE = 0x300,
#define BW_OPMODE_11J BIT0 #define BW_OPMODE_11J BIT0
@ -365,32 +366,32 @@ enum _RTL8192Pci_HW {
#define RETRY_LIMIT_LONG_SHIFT 0 #define RETRY_LIMIT_LONG_SHIFT 0
TSFR = 0x308, TSFR = 0x308,
RRSR = 0x310, RRSR = 0x310,
#define RRSR_RSC_OFFSET 21 #define RRSR_RSC_OFFSET 21
#define RRSR_SHORT_OFFSET 23 #define RRSR_SHORT_OFFSET 23
#define RRSR_RSC_DUPLICATE 0x600000 #define RRSR_RSC_DUPLICATE 0x600000
#define RRSR_RSC_UPSUBCHNL 0x400000 #define RRSR_RSC_UPSUBCHNL 0x400000
#define RRSR_RSC_LOWSUBCHNL 0x200000 #define RRSR_RSC_LOWSUBCHNL 0x200000
#define RRSR_SHORT 0x800000 #define RRSR_SHORT 0x800000
#define RRSR_1M BIT0 #define RRSR_1M BIT0
#define RRSR_2M BIT1 #define RRSR_2M BIT1
#define RRSR_5_5M BIT2 #define RRSR_5_5M BIT2
#define RRSR_11M BIT3 #define RRSR_11M BIT3
#define RRSR_6M BIT4 #define RRSR_6M BIT4
#define RRSR_9M BIT5 #define RRSR_9M BIT5
#define RRSR_12M BIT6 #define RRSR_12M BIT6
#define RRSR_18M BIT7 #define RRSR_18M BIT7
#define RRSR_24M BIT8 #define RRSR_24M BIT8
#define RRSR_36M BIT9 #define RRSR_36M BIT9
#define RRSR_48M BIT10 #define RRSR_48M BIT10
#define RRSR_54M BIT11 #define RRSR_54M BIT11
#define RRSR_MCS0 BIT12 #define RRSR_MCS0 BIT12
#define RRSR_MCS1 BIT13 #define RRSR_MCS1 BIT13
#define RRSR_MCS2 BIT14 #define RRSR_MCS2 BIT14
#define RRSR_MCS3 BIT15 #define RRSR_MCS3 BIT15
#define RRSR_MCS4 BIT16 #define RRSR_MCS4 BIT16
#define RRSR_MCS5 BIT17 #define RRSR_MCS5 BIT17
#define RRSR_MCS6 BIT18 #define RRSR_MCS6 BIT18
#define RRSR_MCS7 BIT19 #define RRSR_MCS7 BIT19
#define BRSR_AckShortPmb BIT23 #define BRSR_AckShortPmb BIT23
UFWP = 0x318, UFWP = 0x318,
RATR0 = 0x320, RATR0 = 0x320,
@ -422,12 +423,15 @@ enum _RTL8192Pci_HW {
#define RATR_MCS13 0x02000000 #define RATR_MCS13 0x02000000
#define RATR_MCS14 0x04000000 #define RATR_MCS14 0x04000000
#define RATR_MCS15 0x08000000 #define RATR_MCS15 0x08000000
#define RATE_ALL_CCK RATR_1M|RATR_2M|RATR_55M|RATR_11M #define RATE_ALL_CCK (RATR_1M | RATR_2M | RATR_55M | RATR_11M)
#define RATE_ALL_OFDM_AG RATR_6M|RATR_9M|RATR_12M|RATR_18M|RATR_24M|RATR_36M|RATR_48M|RATR_54M #define RATE_ALL_OFDM_AG (RATR_6M | RATR_9M | RATR_12M | RATR_18M | \
#define RATE_ALL_OFDM_1SS RATR_MCS0|RATR_MCS1|RATR_MCS2|RATR_MCS3 | \ RATR_24M | RATR_36M | RATR_48M | RATR_54M)
RATR_MCS4|RATR_MCS5|RATR_MCS6 |RATR_MCS7 #define RATE_ALL_OFDM_1SS (RATR_MCS0 | RATR_MCS1 | RATR_MCS2 | \
#define RATE_ALL_OFDM_2SS RATR_MCS8|RATR_MCS9 |RATR_MCS10|RATR_MCS11| \ RATR_MCS3 | RATR_MCS4 | RATR_MCS5 | \
RATR_MCS12|RATR_MCS13|RATR_MCS14|RATR_MCS15 RATR_MCS6 | RATR_MCS7)
#define RATE_ALL_OFDM_2SS (RATR_MCS8 | RATR_MCS9 | RATR_MCS10 | \
RATR_MCS11 | RATR_MCS12 | RATR_MCS13 | \
RATR_MCS14|RATR_MCS15)
DRIVER_RSSI = 0x32c, DRIVER_RSSI = 0x32c,
@ -442,8 +446,8 @@ enum _RTL8192Pci_HW {
#define GPO 0x109 #define GPO 0x109
#define GPE 0x10a #define GPE 0x10a
#define HWSET_MAX_SIZE_92S 128 #define HWSET_MAX_SIZE_92S 128
#define ANAPAR_FOR_8192PciE 0x17 #define ANAPAR_FOR_8192PciE 0x17
#endif #endif

1043
drivers/staging/rtl8192e/r8192E_hwimg.c
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