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Amlogic 32-bit DT updates for v4.17 

- odroid-c1: add microSD, ethernet, USB reset
 - add reset controller
 - fix requesting GPIOs greater than GPIOZ_3
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Merge tag 'amlogic-dt-1' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into next/dt

Pull "Amlogic 32-bit DT updates for v4.17" from Kevin Hilman:

- odroid-c1: add microSD, ethernet, USB reset
- add reset controller
- fix requesting GPIOs greater than GPIOZ_3

* tag 'amlogic-dt-1' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic:
  ARM: dts: meson8b: the CBUS GPIO controller only has 83 GPIOs
  ARM: dts: meson8b-odroidc1: add microSD support
  ARM: dts: meson8b: add the I2C clocks
  ARM: dts: meson8b-odroidc1: ethernet support
  ARM: dts: meson8b: extend ethernet controller description
  ARM: dts: meson8: add the USB reset line
  ARM: dts: meson8: add the reset controller
  ARM: dts: meson8b: grow the reset controller memory zone
This commit is contained in:
Arnd Bergmann 2018-03-27 14:39:10 +02:00
parent aeb700861a 4e461e62fc
commit 11293cb75b
3 changed files with 152 additions and 4 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

9
arch/arm/boot/dts/meson8.dtsi
View File

@ -46,6 +46,7 @@
#include <dt-bindings/clock/meson8b-clkc.h>
#include <dt-bindings/gpio/meson8-gpio.h>
#include <dt-bindings/reset/amlogic,meson8b-clkc-reset.h>
#include <dt-bindings/reset/amlogic,meson8b-reset.h>
#include "meson.dtsi"
/ {
@ -187,6 +188,12 @@
reg = <0x8000 0x4>, <0x4000 0x460>;
};
reset: reset-controller@4404 {
compatible = "amlogic,meson8b-reset";
reg = <0x4404 0x9c>;
#reset-cells = <1>;
};
analog_top: analog-top@81a8 {
compatible = "amlogic,meson8-analog-top", "syscon";
reg = <0x81a8 0x14>;
@ -383,10 +390,12 @@
compatible = "amlogic,meson8-usb2-phy", "amlogic,meson-mx-usb2-phy";
clocks = <&clkc CLKID_USB>, <&clkc CLKID_USB0>;
clock-names = "usb_general", "usb";
resets = <&reset RESET_USB_OTG>;
};
&usb1_phy {
compatible = "amlogic,meson8-usb2-phy", "amlogic,meson-mx-usb2-phy";
clocks = <&clkc CLKID_USB>, <&clkc CLKID_USB1>;
clock-names = "usb_general", "usb";
resets = <&reset RESET_USB_OTG>;
};

88
arch/arm/boot/dts/meson8b-odroidc1.dts
View File

@ -54,6 +54,7 @@
aliases {
serial0 = &uart_AO;
mmc0 = &sd_card_slot;
};
memory {
@ -69,6 +70,37 @@
default-state = "off";
};
};
tflash_vdd: regulator-tflash_vdd {
/*
* signal name from schematics: TFLASH_VDD_EN
*/
compatible = "regulator-fixed";
regulator-name = "TFLASH_VDD";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&gpio GPIOY_12 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
tf_io: gpio-regulator-tf_io {
compatible = "regulator-gpio";
regulator-name = "TF_IO";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
/*
* signal name from schematics: TF_3V3N_1V8_EN
*/
gpios = <&gpio_ao GPIOAO_3 GPIO_ACTIVE_HIGH>;
gpios-states = <0>;
states = <3300000 0
1800000 1>;
};
};
&uart_AO {
@ -99,3 +131,59 @@
&usb1 {
status = "okay";
};
&sdio {
status = "okay";
pinctrl-0 = <&sd_b_pins>;
pinctrl-names = "default";
/* SD card */
sd_card_slot: slot@1 {
compatible = "mmc-slot";
reg = <1>;
status = "okay";
bus-width = <4>;
no-sdio;
cap-mmc-highspeed;
cap-sd-highspeed;
disable-wp;
cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_HIGH>;
cd-inverted;
vmmc-supply = <&tflash_vdd>;
vqmmc-supply = <&tf_io>;
};
};
&ethmac {
status = "okay";
snps,reset-gpio = <&gpio GPIOH_4 GPIO_ACTIVE_HIGH>;
snps,reset-active-low;
snps,reset-delays-us = <0 10000 30000>;
pinctrl-0 = <&eth_rgmii_pins>;
pinctrl-names = "default";
phy-mode = "rgmii";
phy-handle = <&eth_phy>;
amlogic,tx-delay-ns = <4>;
mdio {
compatible = "snps,dwmac-mdio";
#address-cells = <1>;
#size-cells = <0>;
/* Realtek RTL8211F (0x001cc916) */
eth_phy: ethernet-phy@0 {
reg = <0>;
eee-broken-1000t;
interrupt-parent = <&gpio_intc>;
/* GPIOH_3 */
interrupts = <17 IRQ_TYPE_LEVEL_LOW>;
};
};
};

59
arch/arm/boot/dts/meson8b.dtsi
View File

@ -152,7 +152,7 @@
reset: reset-controller@4404 {
compatible = "amlogic,meson8b-reset";
reg = <0x4404 0x20>;
reg = <0x4404 0x9c>;
#reset-cells = <1>;
};
@ -183,7 +183,36 @@
reg-names = "mux", "pull", "pull-enable", "gpio";
gpio-controller;
#gpio-cells = <2>;
gpio-ranges = <&pinctrl_cbus 0 0 130>;
gpio-ranges = <&pinctrl_cbus 0 0 83>;
};
eth_rgmii_pins: eth-rgmii {
mux {
groups = "eth_tx_clk",
"eth_tx_en",
"eth_txd1_0",
"eth_txd1_1",
"eth_txd0_0",
"eth_txd0_1",
"eth_rx_clk",
"eth_rx_dv",
"eth_rxd1",
"eth_rxd0",
"eth_mdio_en",
"eth_mdc",
"eth_ref_clk",
"eth_txd2",
"eth_txd3";
function = "ethernet";
};
};
sd_b_pins: sd-b {
mux {
groups = "sd_d0_b", "sd_d1_b", "sd_d2_b",
"sd_d3_b", "sd_clk_b", "sd_cmd_b";
function = "sd_b";
};
};
};
};
@ -203,8 +232,18 @@
};
&ethmac {
clocks = <&clkc CLKID_ETH>;
clock-names = "stmmaceth";
compatible = "amlogic,meson8b-dwmac", "snps,dwmac-3.70a", "snps,dwmac";
reg = <0xc9410000 0x10000
0xc1108140 0x4>;
clocks = <&clkc CLKID_ETH>,
<&clkc CLKID_MPLL2>,
<&clkc CLKID_MPLL2>;
clock-names = "stmmaceth", "clkin0", "clkin1";
resets = <&reset RESET_ETHERNET>;
reset-names = "stmmaceth";
};
&gpio_intc {
@ -219,6 +258,18 @@
clock-names = "core";
};
&i2c_AO {
clocks = <&clkc CLKID_CLK81>;
};
&i2c_A {
clocks = <&clkc CLKID_I2C>;
};
&i2c_B {
clocks = <&clkc CLKID_I2C>;
};
&L2 {
arm,data-latency = <3 3 3>;
arm,tag-latency = <2 2 2>;