drm/amdgpu: Refine function name and function args
There are no any logical changes here. 1. change function names: amdgpu_device_ip_late_set_pg/cg_state to amdgpu_device_set_pg/cg_state. 2. add a function argument cg/pg_state, so we can enable/disable cg/pg through those functions Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -1690,24 +1690,26 @@ static bool amdgpu_device_check_vram_lost(struct amdgpu_device *adev)
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}
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/**
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* amdgpu_device_ip_late_set_cg_state - late init for clockgating
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* amdgpu_device_set_cg_state - set clockgating for amdgpu device
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*
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* @adev: amdgpu_device pointer
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*
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* Late initialization pass enabling clockgating for hardware IPs.
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* The list of all the hardware IPs that make up the asic is walked and the
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* set_clockgating_state callbacks are run. This stage is run late
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* in the init process.
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* set_clockgating_state callbacks are run.
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* Late initialization pass enabling clockgating for hardware IPs.
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* Fini or suspend, pass disabling clockgating for hardware IPs.
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* Returns 0 on success, negative error code on failure.
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*/
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static int amdgpu_device_ip_late_set_cg_state(struct amdgpu_device *adev)
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static int amdgpu_device_set_cg_state(struct amdgpu_device *adev,
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enum amd_clockgating_state state)
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{
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int i = 0, r;
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int i, j, r;
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if (amdgpu_emu_mode == 1)
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return 0;
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for (i = 0; i < adev->num_ip_blocks; i++) {
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for (j = 0; j < adev->num_ip_blocks; j++) {
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i = state == AMD_CG_STATE_GATE ? j : adev->num_ip_blocks - j - 1;
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if (!adev->ip_blocks[i].status.valid)
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continue;
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/* skip CG for VCE/UVD, it's handled specially */
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@ -1717,7 +1719,7 @@ static int amdgpu_device_ip_late_set_cg_state(struct amdgpu_device *adev)
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adev->ip_blocks[i].version->funcs->set_clockgating_state) {
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/* enable clockgating to save power */
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r = adev->ip_blocks[i].version->funcs->set_clockgating_state((void *)adev,
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AMD_CG_STATE_GATE);
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state);
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if (r) {
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DRM_ERROR("set_clockgating_state(gate) of IP block <%s> failed %d\n",
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adev->ip_blocks[i].version->funcs->name, r);
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@ -1729,14 +1731,15 @@ static int amdgpu_device_ip_late_set_cg_state(struct amdgpu_device *adev)
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return 0;
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}
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static int amdgpu_device_ip_late_set_pg_state(struct amdgpu_device *adev)
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static int amdgpu_device_set_pg_state(struct amdgpu_device *adev, enum amd_powergating_state state)
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{
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int i = 0, r;
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int i, j, r;
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if (amdgpu_emu_mode == 1)
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return 0;
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for (i = 0; i < adev->num_ip_blocks; i++) {
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for (j = 0; j < adev->num_ip_blocks; j++) {
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i = state == AMD_PG_STATE_GATE ? j : adev->num_ip_blocks - j - 1;
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if (!adev->ip_blocks[i].status.valid)
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continue;
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/* skip CG for VCE/UVD, it's handled specially */
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@ -1746,7 +1749,7 @@ static int amdgpu_device_ip_late_set_pg_state(struct amdgpu_device *adev)
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adev->ip_blocks[i].version->funcs->set_powergating_state) {
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/* enable powergating to save power */
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r = adev->ip_blocks[i].version->funcs->set_powergating_state((void *)adev,
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AMD_PG_STATE_GATE);
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state);
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if (r) {
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DRM_ERROR("set_powergating_state(gate) of IP block <%s> failed %d\n",
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adev->ip_blocks[i].version->funcs->name, r);
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@ -1787,8 +1790,8 @@ static int amdgpu_device_ip_late_init(struct amdgpu_device *adev)
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}
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}
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amdgpu_device_ip_late_set_cg_state(adev);
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amdgpu_device_ip_late_set_pg_state(adev);
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amdgpu_device_set_cg_state(adev, AMD_CG_STATE_GATE);
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amdgpu_device_set_pg_state(adev, AMD_PG_STATE_GATE);
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queue_delayed_work(system_wq, &adev->late_init_work,
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msecs_to_jiffies(AMDGPU_RESUME_MS));
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@ -1906,13 +1909,9 @@ static int amdgpu_device_ip_fini(struct amdgpu_device *adev)
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}
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/**
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* amdgpu_device_ip_late_init_func_handler - work handler for clockgating
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* amdgpu_device_ip_late_init_func_handler - work handler for ib test
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*
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* @work: work_struct
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*
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* Work handler for amdgpu_device_ip_late_set_cg_state. We put the
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* clockgating setup into a worker thread to speed up driver init and
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* resume from suspend.
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* @work: work_struct.
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*/
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static void amdgpu_device_ip_late_init_func_handler(struct work_struct *work)
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{
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