ixgbe: Mailbox header and code module
The 82599 virtual function device and the master 82599 physical function device implement a mailbox utility for communication between the devices using some SRAM scratch memory and a doorbell/answering mechanism enabled via interrupt and/or polling. This C module and accompanying header file implement the base functions for use of this feature. Signed-off-by: Greg Rose <gregory.v.rose@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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/*******************************************************************************
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Intel 10 Gigabit PCI Express Linux driver
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Copyright(c) 1999 - 2009 Intel Corporation.
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This program is free software; you can redistribute it and/or modify it
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under the terms and conditions of the GNU General Public License,
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version 2, as published by the Free Software Foundation.
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This program is distributed in the hope it will be useful, but WITHOUT
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ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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more details.
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You should have received a copy of the GNU General Public License along with
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this program; if not, write to the Free Software Foundation, Inc.,
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51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
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The full GNU General Public License is included in this distribution in
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the file called "COPYING".
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Contact Information:
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e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
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Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
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*******************************************************************************/
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#include <linux/pci.h>
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#include <linux/delay.h>
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#include "ixgbe_type.h"
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#include "ixgbe_common.h"
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#include "ixgbe_mbx.h"
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/**
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* ixgbe_read_mbx - Reads a message from the mailbox
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* @hw: pointer to the HW structure
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* @msg: The message buffer
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* @size: Length of buffer
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* @mbx_id: id of mailbox to read
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*
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* returns SUCCESS if it successfuly read message from buffer
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**/
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s32 ixgbe_read_mbx(struct ixgbe_hw *hw, u32 *msg, u16 size, u16 mbx_id)
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{
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struct ixgbe_mbx_info *mbx = &hw->mbx;
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s32 ret_val = IXGBE_ERR_MBX;
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/* limit read to size of mailbox */
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if (size > mbx->size)
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size = mbx->size;
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if (mbx->ops.read)
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ret_val = mbx->ops.read(hw, msg, size, mbx_id);
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return ret_val;
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}
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/**
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* ixgbe_write_mbx - Write a message to the mailbox
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* @hw: pointer to the HW structure
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* @msg: The message buffer
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* @size: Length of buffer
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* @mbx_id: id of mailbox to write
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*
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* returns SUCCESS if it successfully copied message into the buffer
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**/
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s32 ixgbe_write_mbx(struct ixgbe_hw *hw, u32 *msg, u16 size, u16 mbx_id)
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{
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struct ixgbe_mbx_info *mbx = &hw->mbx;
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s32 ret_val = 0;
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if (size > mbx->size)
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ret_val = IXGBE_ERR_MBX;
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else if (mbx->ops.write)
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ret_val = mbx->ops.write(hw, msg, size, mbx_id);
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return ret_val;
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}
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/**
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* ixgbe_check_for_msg - checks to see if someone sent us mail
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* @hw: pointer to the HW structure
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* @mbx_id: id of mailbox to check
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*
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* returns SUCCESS if the Status bit was found or else ERR_MBX
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**/
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s32 ixgbe_check_for_msg(struct ixgbe_hw *hw, u16 mbx_id)
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{
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struct ixgbe_mbx_info *mbx = &hw->mbx;
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s32 ret_val = IXGBE_ERR_MBX;
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if (mbx->ops.check_for_msg)
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ret_val = mbx->ops.check_for_msg(hw, mbx_id);
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return ret_val;
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}
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/**
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* ixgbe_check_for_ack - checks to see if someone sent us ACK
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* @hw: pointer to the HW structure
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* @mbx_id: id of mailbox to check
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*
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* returns SUCCESS if the Status bit was found or else ERR_MBX
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**/
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s32 ixgbe_check_for_ack(struct ixgbe_hw *hw, u16 mbx_id)
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{
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struct ixgbe_mbx_info *mbx = &hw->mbx;
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s32 ret_val = IXGBE_ERR_MBX;
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if (mbx->ops.check_for_ack)
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ret_val = mbx->ops.check_for_ack(hw, mbx_id);
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return ret_val;
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}
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/**
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* ixgbe_check_for_rst - checks to see if other side has reset
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* @hw: pointer to the HW structure
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* @mbx_id: id of mailbox to check
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*
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* returns SUCCESS if the Status bit was found or else ERR_MBX
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**/
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s32 ixgbe_check_for_rst(struct ixgbe_hw *hw, u16 mbx_id)
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{
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struct ixgbe_mbx_info *mbx = &hw->mbx;
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s32 ret_val = IXGBE_ERR_MBX;
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if (mbx->ops.check_for_rst)
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ret_val = mbx->ops.check_for_rst(hw, mbx_id);
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return ret_val;
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}
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/**
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* ixgbe_poll_for_msg - Wait for message notification
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* @hw: pointer to the HW structure
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* @mbx_id: id of mailbox to write
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*
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* returns SUCCESS if it successfully received a message notification
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**/
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static s32 ixgbe_poll_for_msg(struct ixgbe_hw *hw, u16 mbx_id)
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{
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struct ixgbe_mbx_info *mbx = &hw->mbx;
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int countdown = mbx->timeout;
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if (!countdown || !mbx->ops.check_for_msg)
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goto out;
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while (countdown && mbx->ops.check_for_msg(hw, mbx_id)) {
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countdown--;
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if (!countdown)
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break;
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udelay(mbx->usec_delay);
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}
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/* if we failed, all future posted messages fail until reset */
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if (!countdown)
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mbx->timeout = 0;
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out:
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return countdown ? 0 : IXGBE_ERR_MBX;
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}
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/**
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* ixgbe_poll_for_ack - Wait for message acknowledgement
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* @hw: pointer to the HW structure
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* @mbx_id: id of mailbox to write
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*
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* returns SUCCESS if it successfully received a message acknowledgement
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**/
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static s32 ixgbe_poll_for_ack(struct ixgbe_hw *hw, u16 mbx_id)
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{
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struct ixgbe_mbx_info *mbx = &hw->mbx;
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int countdown = mbx->timeout;
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if (!countdown || !mbx->ops.check_for_ack)
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goto out;
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while (countdown && mbx->ops.check_for_ack(hw, mbx_id)) {
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countdown--;
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if (!countdown)
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break;
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udelay(mbx->usec_delay);
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}
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/* if we failed, all future posted messages fail until reset */
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if (!countdown)
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mbx->timeout = 0;
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out:
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return countdown ? 0 : IXGBE_ERR_MBX;
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}
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/**
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* ixgbe_read_posted_mbx - Wait for message notification and receive message
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* @hw: pointer to the HW structure
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* @msg: The message buffer
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* @size: Length of buffer
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* @mbx_id: id of mailbox to write
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*
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* returns SUCCESS if it successfully received a message notification and
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* copied it into the receive buffer.
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**/
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s32 ixgbe_read_posted_mbx(struct ixgbe_hw *hw, u32 *msg, u16 size, u16 mbx_id)
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{
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struct ixgbe_mbx_info *mbx = &hw->mbx;
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s32 ret_val = IXGBE_ERR_MBX;
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if (!mbx->ops.read)
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goto out;
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ret_val = ixgbe_poll_for_msg(hw, mbx_id);
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/* if ack received read message, otherwise we timed out */
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if (!ret_val)
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ret_val = mbx->ops.read(hw, msg, size, mbx_id);
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out:
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return ret_val;
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}
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/**
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* ixgbe_write_posted_mbx - Write a message to the mailbox, wait for ack
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* @hw: pointer to the HW structure
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* @msg: The message buffer
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* @size: Length of buffer
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* @mbx_id: id of mailbox to write
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*
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* returns SUCCESS if it successfully copied message into the buffer and
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* received an ack to that message within delay * timeout period
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**/
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s32 ixgbe_write_posted_mbx(struct ixgbe_hw *hw, u32 *msg, u16 size,
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u16 mbx_id)
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{
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struct ixgbe_mbx_info *mbx = &hw->mbx;
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s32 ret_val = IXGBE_ERR_MBX;
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/* exit if either we can't write or there isn't a defined timeout */
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if (!mbx->ops.write || !mbx->timeout)
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goto out;
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/* send msg */
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ret_val = mbx->ops.write(hw, msg, size, mbx_id);
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/* if msg sent wait until we receive an ack */
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if (!ret_val)
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ret_val = ixgbe_poll_for_ack(hw, mbx_id);
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out:
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return ret_val;
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}
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/**
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* ixgbe_init_mbx_ops_generic - Initialize MB function pointers
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* @hw: pointer to the HW structure
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*
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* Setup the mailbox read and write message function pointers
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**/
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void ixgbe_init_mbx_ops_generic(struct ixgbe_hw *hw)
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{
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struct ixgbe_mbx_info *mbx = &hw->mbx;
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mbx->ops.read_posted = ixgbe_read_posted_mbx;
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mbx->ops.write_posted = ixgbe_write_posted_mbx;
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}
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static s32 ixgbe_check_for_bit_pf(struct ixgbe_hw *hw, u32 mask, s32 index)
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{
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u32 mbvficr = IXGBE_READ_REG(hw, IXGBE_MBVFICR(index));
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s32 ret_val = IXGBE_ERR_MBX;
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if (mbvficr & mask) {
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ret_val = 0;
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IXGBE_WRITE_REG(hw, IXGBE_MBVFICR(index), mask);
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}
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return ret_val;
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}
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/**
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* ixgbe_check_for_msg_pf - checks to see if the VF has sent mail
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* @hw: pointer to the HW structure
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* @vf_number: the VF index
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*
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* returns SUCCESS if the VF has set the Status bit or else ERR_MBX
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**/
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static s32 ixgbe_check_for_msg_pf(struct ixgbe_hw *hw, u16 vf_number)
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{
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s32 ret_val = IXGBE_ERR_MBX;
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s32 index = IXGBE_MBVFICR_INDEX(vf_number);
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u32 vf_bit = vf_number % 16;
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if (!ixgbe_check_for_bit_pf(hw, IXGBE_MBVFICR_VFREQ_VF1 << vf_bit,
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index)) {
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ret_val = 0;
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hw->mbx.stats.reqs++;
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}
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return ret_val;
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}
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/**
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* ixgbe_check_for_ack_pf - checks to see if the VF has ACKed
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* @hw: pointer to the HW structure
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* @vf_number: the VF index
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*
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* returns SUCCESS if the VF has set the Status bit or else ERR_MBX
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**/
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static s32 ixgbe_check_for_ack_pf(struct ixgbe_hw *hw, u16 vf_number)
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{
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s32 ret_val = IXGBE_ERR_MBX;
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s32 index = IXGBE_MBVFICR_INDEX(vf_number);
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u32 vf_bit = vf_number % 16;
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if (!ixgbe_check_for_bit_pf(hw, IXGBE_MBVFICR_VFACK_VF1 << vf_bit,
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index)) {
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ret_val = 0;
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hw->mbx.stats.acks++;
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}
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return ret_val;
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}
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/**
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* ixgbe_check_for_rst_pf - checks to see if the VF has reset
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* @hw: pointer to the HW structure
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* @vf_number: the VF index
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*
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* returns SUCCESS if the VF has set the Status bit or else ERR_MBX
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**/
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static s32 ixgbe_check_for_rst_pf(struct ixgbe_hw *hw, u16 vf_number)
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{
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u32 reg_offset = (vf_number < 32) ? 0 : 1;
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u32 vf_shift = vf_number % 32;
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u32 vflre = 0;
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s32 ret_val = IXGBE_ERR_MBX;
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if (hw->mac.type == ixgbe_mac_82599EB)
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vflre = IXGBE_READ_REG(hw, IXGBE_VFLRE(reg_offset));
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if (vflre & (1 << vf_shift)) {
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ret_val = 0;
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IXGBE_WRITE_REG(hw, IXGBE_VFLREC(reg_offset), (1 << vf_shift));
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hw->mbx.stats.rsts++;
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}
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return ret_val;
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}
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/**
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* ixgbe_obtain_mbx_lock_pf - obtain mailbox lock
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* @hw: pointer to the HW structure
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* @vf_number: the VF index
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*
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* return SUCCESS if we obtained the mailbox lock
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**/
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static s32 ixgbe_obtain_mbx_lock_pf(struct ixgbe_hw *hw, u16 vf_number)
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{
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s32 ret_val = IXGBE_ERR_MBX;
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u32 p2v_mailbox;
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/* Take ownership of the buffer */
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IXGBE_WRITE_REG(hw, IXGBE_PFMAILBOX(vf_number), IXGBE_PFMAILBOX_PFU);
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/* reserve mailbox for vf use */
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p2v_mailbox = IXGBE_READ_REG(hw, IXGBE_PFMAILBOX(vf_number));
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if (p2v_mailbox & IXGBE_PFMAILBOX_PFU)
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ret_val = 0;
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return ret_val;
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}
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/**
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* ixgbe_write_mbx_pf - Places a message in the mailbox
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||||||
|
* @hw: pointer to the HW structure
|
||||||
|
* @msg: The message buffer
|
||||||
|
* @size: Length of buffer
|
||||||
|
* @vf_number: the VF index
|
||||||
|
*
|
||||||
|
* returns SUCCESS if it successfully copied message into the buffer
|
||||||
|
**/
|
||||||
|
static s32 ixgbe_write_mbx_pf(struct ixgbe_hw *hw, u32 *msg, u16 size,
|
||||||
|
u16 vf_number)
|
||||||
|
{
|
||||||
|
s32 ret_val;
|
||||||
|
u16 i;
|
||||||
|
|
||||||
|
/* lock the mailbox to prevent pf/vf race condition */
|
||||||
|
ret_val = ixgbe_obtain_mbx_lock_pf(hw, vf_number);
|
||||||
|
if (ret_val)
|
||||||
|
goto out_no_write;
|
||||||
|
|
||||||
|
/* flush msg and acks as we are overwriting the message buffer */
|
||||||
|
ixgbe_check_for_msg_pf(hw, vf_number);
|
||||||
|
ixgbe_check_for_ack_pf(hw, vf_number);
|
||||||
|
|
||||||
|
/* copy the caller specified message to the mailbox memory buffer */
|
||||||
|
for (i = 0; i < size; i++)
|
||||||
|
IXGBE_WRITE_REG_ARRAY(hw, IXGBE_PFMBMEM(vf_number), i, msg[i]);
|
||||||
|
|
||||||
|
/* Interrupt VF to tell it a message has been sent and release buffer*/
|
||||||
|
IXGBE_WRITE_REG(hw, IXGBE_PFMAILBOX(vf_number), IXGBE_PFMAILBOX_STS);
|
||||||
|
|
||||||
|
/* update stats */
|
||||||
|
hw->mbx.stats.msgs_tx++;
|
||||||
|
|
||||||
|
out_no_write:
|
||||||
|
return ret_val;
|
||||||
|
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* ixgbe_read_mbx_pf - Read a message from the mailbox
|
||||||
|
* @hw: pointer to the HW structure
|
||||||
|
* @msg: The message buffer
|
||||||
|
* @size: Length of buffer
|
||||||
|
* @vf_number: the VF index
|
||||||
|
*
|
||||||
|
* This function copies a message from the mailbox buffer to the caller's
|
||||||
|
* memory buffer. The presumption is that the caller knows that there was
|
||||||
|
* a message due to a VF request so no polling for message is needed.
|
||||||
|
**/
|
||||||
|
static s32 ixgbe_read_mbx_pf(struct ixgbe_hw *hw, u32 *msg, u16 size,
|
||||||
|
u16 vf_number)
|
||||||
|
{
|
||||||
|
s32 ret_val;
|
||||||
|
u16 i;
|
||||||
|
|
||||||
|
/* lock the mailbox to prevent pf/vf race condition */
|
||||||
|
ret_val = ixgbe_obtain_mbx_lock_pf(hw, vf_number);
|
||||||
|
if (ret_val)
|
||||||
|
goto out_no_read;
|
||||||
|
|
||||||
|
/* copy the message to the mailbox memory buffer */
|
||||||
|
for (i = 0; i < size; i++)
|
||||||
|
msg[i] = IXGBE_READ_REG_ARRAY(hw, IXGBE_PFMBMEM(vf_number), i);
|
||||||
|
|
||||||
|
/* Acknowledge the message and release buffer */
|
||||||
|
IXGBE_WRITE_REG(hw, IXGBE_PFMAILBOX(vf_number), IXGBE_PFMAILBOX_ACK);
|
||||||
|
|
||||||
|
/* update stats */
|
||||||
|
hw->mbx.stats.msgs_rx++;
|
||||||
|
|
||||||
|
out_no_read:
|
||||||
|
return ret_val;
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* ixgbe_init_mbx_params_pf - set initial values for pf mailbox
|
||||||
|
* @hw: pointer to the HW structure
|
||||||
|
*
|
||||||
|
* Initializes the hw->mbx struct to correct values for pf mailbox
|
||||||
|
*/
|
||||||
|
void ixgbe_init_mbx_params_pf(struct ixgbe_hw *hw)
|
||||||
|
{
|
||||||
|
struct ixgbe_mbx_info *mbx = &hw->mbx;
|
||||||
|
|
||||||
|
if (hw->mac.type != ixgbe_mac_82599EB)
|
||||||
|
return;
|
||||||
|
|
||||||
|
mbx->timeout = 0;
|
||||||
|
mbx->usec_delay = 0;
|
||||||
|
|
||||||
|
mbx->size = IXGBE_VFMAILBOX_SIZE;
|
||||||
|
|
||||||
|
mbx->stats.msgs_tx = 0;
|
||||||
|
mbx->stats.msgs_rx = 0;
|
||||||
|
mbx->stats.reqs = 0;
|
||||||
|
mbx->stats.acks = 0;
|
||||||
|
mbx->stats.rsts = 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
struct ixgbe_mbx_operations mbx_ops_82599 = {
|
||||||
|
.read = ixgbe_read_mbx_pf,
|
||||||
|
.write = ixgbe_write_mbx_pf,
|
||||||
|
.read_posted = ixgbe_read_posted_mbx,
|
||||||
|
.write_posted = ixgbe_write_posted_mbx,
|
||||||
|
.check_for_msg = ixgbe_check_for_msg_pf,
|
||||||
|
.check_for_ack = ixgbe_check_for_ack_pf,
|
||||||
|
.check_for_rst = ixgbe_check_for_rst_pf,
|
||||||
|
};
|
||||||
|
|
|
@ -0,0 +1,96 @@
|
||||||
|
/*******************************************************************************
|
||||||
|
|
||||||
|
Intel 10 Gigabit PCI Express Linux driver
|
||||||
|
Copyright(c) 1999 - 2009 Intel Corporation.
|
||||||
|
|
||||||
|
This program is free software; you can redistribute it and/or modify it
|
||||||
|
under the terms and conditions of the GNU General Public License,
|
||||||
|
version 2, as published by the Free Software Foundation.
|
||||||
|
|
||||||
|
This program is distributed in the hope it will be useful, but WITHOUT
|
||||||
|
ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||||
|
FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||||
|
more details.
|
||||||
|
|
||||||
|
You should have received a copy of the GNU General Public License along with
|
||||||
|
this program; if not, write to the Free Software Foundation, Inc.,
|
||||||
|
51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
|
||||||
|
|
||||||
|
The full GNU General Public License is included in this distribution in
|
||||||
|
the file called "COPYING".
|
||||||
|
|
||||||
|
Contact Information:
|
||||||
|
e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
|
||||||
|
Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
|
||||||
|
|
||||||
|
*******************************************************************************/
|
||||||
|
|
||||||
|
#ifndef _IXGBE_MBX_H_
|
||||||
|
#define _IXGBE_MBX_H_
|
||||||
|
|
||||||
|
#include "ixgbe_type.h"
|
||||||
|
|
||||||
|
#define IXGBE_VFMAILBOX_SIZE 16 /* 16 32 bit words - 64 bytes */
|
||||||
|
#define IXGBE_ERR_MBX -100
|
||||||
|
|
||||||
|
#define IXGBE_VFMAILBOX 0x002FC
|
||||||
|
#define IXGBE_VFMBMEM 0x00200
|
||||||
|
|
||||||
|
#define IXGBE_PFMAILBOX(x) (0x04B00 + (4 * x))
|
||||||
|
#define IXGBE_PFMBMEM(vfn) (0x13000 + (64 * vfn))
|
||||||
|
|
||||||
|
#define IXGBE_PFMAILBOX_STS 0x00000001 /* Initiate message send to VF */
|
||||||
|
#define IXGBE_PFMAILBOX_ACK 0x00000002 /* Ack message recv'd from VF */
|
||||||
|
#define IXGBE_PFMAILBOX_VFU 0x00000004 /* VF owns the mailbox buffer */
|
||||||
|
#define IXGBE_PFMAILBOX_PFU 0x00000008 /* PF owns the mailbox buffer */
|
||||||
|
#define IXGBE_PFMAILBOX_RVFU 0x00000010 /* Reset VFU - used when VF stuck */
|
||||||
|
|
||||||
|
#define IXGBE_MBVFICR_VFREQ_MASK 0x0000FFFF /* bits for VF messages */
|
||||||
|
#define IXGBE_MBVFICR_VFREQ_VF1 0x00000001 /* bit for VF 1 message */
|
||||||
|
#define IXGBE_MBVFICR_VFACK_MASK 0xFFFF0000 /* bits for VF acks */
|
||||||
|
#define IXGBE_MBVFICR_VFACK_VF1 0x00010000 /* bit for VF 1 ack */
|
||||||
|
|
||||||
|
|
||||||
|
/* If it's a IXGBE_VF_* msg then it originates in the VF and is sent to the
|
||||||
|
* PF. The reverse is true if it is IXGBE_PF_*.
|
||||||
|
* Message ACK's are the value or'd with 0xF0000000
|
||||||
|
*/
|
||||||
|
#define IXGBE_VT_MSGTYPE_ACK 0x80000000 /* Messages below or'd with
|
||||||
|
* this are the ACK */
|
||||||
|
#define IXGBE_VT_MSGTYPE_NACK 0x40000000 /* Messages below or'd with
|
||||||
|
* this are the NACK */
|
||||||
|
#define IXGBE_VT_MSGTYPE_CTS 0x20000000 /* Indicates that VF is still
|
||||||
|
clear to send requests */
|
||||||
|
#define IXGBE_VT_MSGINFO_SHIFT 16
|
||||||
|
/* bits 23:16 are used for exra info for certain messages */
|
||||||
|
#define IXGBE_VT_MSGINFO_MASK (0xFF << IXGBE_VT_MSGINFO_SHIFT)
|
||||||
|
|
||||||
|
#define IXGBE_VF_RESET 0x01 /* VF requests reset */
|
||||||
|
#define IXGBE_VF_SET_MAC_ADDR 0x02 /* VF requests PF to set MAC addr */
|
||||||
|
#define IXGBE_VF_SET_MULTICAST 0x03 /* VF requests PF to set MC addr */
|
||||||
|
#define IXGBE_VF_SET_VLAN 0x04 /* VF requests PF to set VLAN */
|
||||||
|
#define IXGBE_VF_SET_LPE 0x05 /* VF requests PF to set VMOLR.LPE */
|
||||||
|
|
||||||
|
/* length of permanent address message returned from PF */
|
||||||
|
#define IXGBE_VF_PERMADDR_MSG_LEN 4
|
||||||
|
/* word in permanent address message with the current multicast type */
|
||||||
|
#define IXGBE_VF_MC_TYPE_WORD 3
|
||||||
|
|
||||||
|
#define IXGBE_PF_CONTROL_MSG 0x0100 /* PF control message */
|
||||||
|
|
||||||
|
#define IXGBE_VF_MBX_INIT_TIMEOUT 2000 /* number of retries on mailbox */
|
||||||
|
#define IXGBE_VF_MBX_INIT_DELAY 500 /* microseconds between retries */
|
||||||
|
|
||||||
|
s32 ixgbe_read_mbx(struct ixgbe_hw *, u32 *, u16, u16);
|
||||||
|
s32 ixgbe_write_mbx(struct ixgbe_hw *, u32 *, u16, u16);
|
||||||
|
s32 ixgbe_read_posted_mbx(struct ixgbe_hw *, u32 *, u16, u16);
|
||||||
|
s32 ixgbe_write_posted_mbx(struct ixgbe_hw *, u32 *, u16, u16);
|
||||||
|
s32 ixgbe_check_for_msg(struct ixgbe_hw *, u16);
|
||||||
|
s32 ixgbe_check_for_ack(struct ixgbe_hw *, u16);
|
||||||
|
s32 ixgbe_check_for_rst(struct ixgbe_hw *, u16);
|
||||||
|
void ixgbe_init_mbx_ops_generic(struct ixgbe_hw *hw);
|
||||||
|
void ixgbe_init_mbx_params_pf(struct ixgbe_hw *);
|
||||||
|
|
||||||
|
extern struct ixgbe_mbx_operations mbx_ops_82599;
|
||||||
|
|
||||||
|
#endif /* _IXGBE_MBX_H_ */
|
Loading…
Reference in New Issue