x86/irq/vector: Initialize matrix allocator
Initialize the matrix allocator and add the proper accounting points to the code. No functional change, just preparation. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Tested-by: Juergen Gross <jgross@suse.com> Tested-by: Yu Chen <yu.c.chen@intel.com> Acked-by: Juergen Gross <jgross@suse.com> Cc: Boris Ostrovsky <boris.ostrovsky@oracle.com> Cc: Tony Luck <tony.luck@intel.com> Cc: Marc Zyngier <marc.zyngier@arm.com> Cc: Alok Kataria <akataria@vmware.com> Cc: Joerg Roedel <joro@8bytes.org> Cc: "Rafael J. Wysocki" <rjw@rjwysocki.net> Cc: Steven Rostedt <rostedt@goodmis.org> Cc: Christoph Hellwig <hch@lst.de> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Borislav Petkov <bp@alien8.de> Cc: Paolo Bonzini <pbonzini@redhat.com> Cc: Rui Zhang <rui.zhang@intel.com> Cc: "K. Y. Srinivasan" <kys@microsoft.com> Cc: Arjan van de Ven <arjan@linux.intel.com> Cc: Dan Williams <dan.j.williams@intel.com> Cc: Len Brown <lenb@kernel.org> Link: https://lkml.kernel.org/r/20170913213155.108410660@linutronix.de
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@ -92,6 +92,7 @@ config X86
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select GENERIC_FIND_FIRST_BIT
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select GENERIC_IOMAP
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select GENERIC_IRQ_EFFECTIVE_AFF_MASK if SMP
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select GENERIC_IRQ_MATRIX_ALLOCATOR if X86_LOCAL_APIC
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select GENERIC_IRQ_MIGRATION if SMP
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select GENERIC_IRQ_PROBE
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select GENERIC_IRQ_SHOW
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@ -169,6 +169,10 @@ static inline int apic_is_clustered_box(void)
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#endif
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extern int setup_APIC_eilvt(u8 lvt_off, u8 vector, u8 msg_type, u8 mask);
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extern void lapic_assign_system_vectors(void);
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extern void lapic_assign_legacy_vector(unsigned int isairq, bool replace);
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extern void lapic_online(void);
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extern void lapic_offline(void);
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#else /* !CONFIG_X86_LOCAL_APIC */
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static inline void lapic_shutdown(void) { }
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@ -179,6 +183,8 @@ static inline void disable_local_APIC(void) { }
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# define setup_secondary_APIC_clock x86_init_noop
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static inline void lapic_update_tsc_freq(void) { }
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static inline void apic_intr_mode_init(void) { }
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static inline void lapic_assign_system_vectors(void) { }
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static inline void lapic_assign_legacy_vector(unsigned int i, bool r) { }
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#endif /* !CONFIG_X86_LOCAL_APIC */
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#ifdef CONFIG_X86_X2APIC
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@ -15,6 +15,8 @@
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#include <asm/irq_vectors.h>
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#define IRQ_MATRIX_BITS NR_VECTORS
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#ifndef __ASSEMBLY__
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#include <linux/percpu.h>
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@ -130,7 +132,6 @@ extern struct irq_cfg *irq_cfg(unsigned int irq);
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extern struct irq_cfg *irqd_cfg(struct irq_data *irq_data);
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extern void lock_vector_lock(void);
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extern void unlock_vector_lock(void);
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extern void setup_vector_irq(int cpu);
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#ifdef CONFIG_SMP
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extern void send_cleanup_vector(struct irq_cfg *);
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extern void irq_complete_move(struct irq_cfg *cfg);
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@ -36,6 +36,7 @@ EXPORT_SYMBOL_GPL(x86_vector_domain);
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static DEFINE_RAW_SPINLOCK(vector_lock);
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static cpumask_var_t vector_cpumask, vector_searchmask, searched_cpumask;
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static struct irq_chip lapic_controller;
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static struct irq_matrix *vector_matrix;
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#ifdef CONFIG_SMP
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static DEFINE_PER_CPU(struct hlist_head, cleanup_list);
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#endif
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@ -404,6 +405,36 @@ int __init arch_probe_nr_irqs(void)
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return legacy_pic->probe();
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}
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void lapic_assign_legacy_vector(unsigned int irq, bool replace)
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{
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/*
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* Use assign system here so it wont get accounted as allocated
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* and moveable in the cpu hotplug check and it prevents managed
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* irq reservation from touching it.
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*/
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irq_matrix_assign_system(vector_matrix, ISA_IRQ_VECTOR(irq), replace);
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}
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void __init lapic_assign_system_vectors(void)
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{
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unsigned int i, vector = 0;
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for_each_set_bit_from(vector, system_vectors, NR_VECTORS)
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irq_matrix_assign_system(vector_matrix, vector, false);
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if (nr_legacy_irqs() > 1)
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lapic_assign_legacy_vector(PIC_CASCADE_IR, false);
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/* System vectors are reserved, online it */
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irq_matrix_online(vector_matrix);
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/* Mark the preallocated legacy interrupts */
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for (i = 0; i < nr_legacy_irqs(); i++) {
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if (i != PIC_CASCADE_IR)
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irq_matrix_assign(vector_matrix, ISA_IRQ_VECTOR(i));
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}
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}
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int __init arch_early_irq_init(void)
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{
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struct fwnode_handle *fn;
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@ -423,6 +454,14 @@ int __init arch_early_irq_init(void)
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BUG_ON(!alloc_cpumask_var(&vector_searchmask, GFP_KERNEL));
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BUG_ON(!alloc_cpumask_var(&searched_cpumask, GFP_KERNEL));
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/*
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* Allocate the vector matrix allocator data structure and limit the
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* search area.
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*/
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vector_matrix = irq_alloc_matrix(NR_VECTORS, FIRST_EXTERNAL_VECTOR,
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FIRST_SYSTEM_VECTOR);
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BUG_ON(!vector_matrix);
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return arch_early_ioapic_init();
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}
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@ -454,14 +493,16 @@ static struct irq_desc *__setup_vector_irq(int vector)
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return irq_to_desc(isairq);
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}
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/*
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* Setup the vector to irq mappings. Must be called with vector_lock held.
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*/
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void setup_vector_irq(int cpu)
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/* Online the local APIC infrastructure and initialize the vectors */
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void lapic_online(void)
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{
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unsigned int vector;
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lockdep_assert_held(&vector_lock);
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/* Online the vector matrix array for this CPU */
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irq_matrix_online(vector_matrix);
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/*
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* The interrupt affinity logic never targets interrupts to offline
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* CPUs. The exception are the legacy PIC interrupts. In general
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@ -482,6 +523,13 @@ void setup_vector_irq(int cpu)
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vector_update_shutdown_irqs();
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}
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void lapic_offline(void)
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{
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lock_vector_lock();
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irq_matrix_offline(vector_matrix);
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unlock_vector_lock();
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}
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static int apic_retrigger_irq(struct irq_data *irqd)
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{
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struct apic_chip_data *apicd = apic_chip_data(irqd);
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@ -113,6 +113,7 @@ static void make_8259A_irq(unsigned int irq)
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io_apic_irqs &= ~(1<<irq);
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irq_set_chip_and_handler(irq, &i8259A_chip, handle_level_irq);
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enable_irq(irq);
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lapic_assign_legacy_vector(irq, true);
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}
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/*
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@ -90,6 +90,7 @@ void __init native_init_IRQ(void)
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x86_init.irqs.pre_vector_init();
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idt_setup_apic_and_irq_gates();
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lapic_assign_system_vectors();
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if (!acpi_ioapic && !of_ioapic && nr_legacy_irqs())
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setup_irq(2, &irq2);
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@ -260,7 +260,7 @@ static void notrace start_secondary(void *unused)
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* from seeing a half valid vector space.
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*/
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lock_vector_lock();
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setup_vector_irq(smp_processor_id());
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lapic_online();
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set_cpu_online(smp_processor_id(), true);
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unlock_vector_lock();
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cpu_set_state_online(smp_processor_id());
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@ -1518,6 +1518,7 @@ void cpu_disable_common(void)
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remove_cpu_from_maps(cpu);
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unlock_vector_lock();
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fixup_irqs();
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lapic_offline();
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}
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int native_cpu_disable(void)
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