MIPS: Always use IRQ domains for CPU IRQs
Use an IRQ domain for the 8 CPU IRQs in both the DT and non-DT cases. Signed-off-by: Andrew Bresticker <abrestic@chromium.org> Reviewed-by: Qais Yousef <qais.yousef@imgtec.com> Tested-by: Qais Yousef <qais.yousef@imgtec.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Andrew Bresticker <abrestic@chromium.org> Cc: Jeffrey Deans <jeffrey.deans@imgtec.com> Cc: Markos Chandras <markos.chandras@imgtec.com> Cc: Paul Burton <paul.burton@imgtec.com> Cc: Qais Yousef <qais.yousef@imgtec.com> Cc: Jonas Gorski <jogo@openwrt.org> Cc: John Crispin <blogic@openwrt.org> Cc: David Daney <ddaney.cavm@gmail.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/7799/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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@ -1055,6 +1055,7 @@ config MIPS_HUGE_TLB_SUPPORT
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config IRQ_CPU
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bool
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select IRQ_DOMAIN
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config IRQ_CPU_RM7K
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bool
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@ -94,28 +94,6 @@ static struct irq_chip mips_mt_cpu_irq_controller = {
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.irq_eoi = unmask_mips_irq,
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};
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void __init mips_cpu_irq_init(void)
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{
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int irq_base = MIPS_CPU_IRQ_BASE;
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int i;
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/* Mask interrupts. */
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clear_c0_status(ST0_IM);
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clear_c0_cause(CAUSEF_IP);
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/* Software interrupts are used for MT/CMT IPI */
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for (i = irq_base; i < irq_base + 2; i++)
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irq_set_chip_and_handler(i, cpu_has_mipsmt ?
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&mips_mt_cpu_irq_controller :
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&mips_cpu_irq_controller,
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handle_percpu_irq);
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for (i = irq_base + 2; i < irq_base + 8; i++)
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irq_set_chip_and_handler(i, &mips_cpu_irq_controller,
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handle_percpu_irq);
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}
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#ifdef CONFIG_IRQ_DOMAIN
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static int mips_cpu_intc_map(struct irq_domain *d, unsigned int irq,
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irq_hw_number_t hw)
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{
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@ -138,8 +116,7 @@ static const struct irq_domain_ops mips_cpu_intc_irq_domain_ops = {
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.xlate = irq_domain_xlate_onecell,
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};
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int __init mips_cpu_intc_init(struct device_node *of_node,
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struct device_node *parent)
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static void __init __mips_cpu_irq_init(struct device_node *of_node)
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{
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struct irq_domain *domain;
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@ -151,7 +128,16 @@ int __init mips_cpu_intc_init(struct device_node *of_node,
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&mips_cpu_intc_irq_domain_ops, NULL);
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if (!domain)
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panic("Failed to add irqdomain for MIPS CPU");
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}
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void __init mips_cpu_irq_init(void)
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{
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__mips_cpu_irq_init(NULL);
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}
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int __init mips_cpu_intc_init(struct device_node *of_node,
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struct device_node *parent)
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{
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__mips_cpu_irq_init(of_node);
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return 0;
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}
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#endif /* CONFIG_IRQ_DOMAIN */
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