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Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus 

* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus: (62 commits)
  [MIPS] PNX8550: Cleanup proc code.
  [MIPS] WRPPMC: Fix build.
  [MIPS] Yosemite: Fix modpost warnings.
  [MIPS] Change names of local variables to silence sparse
  [MIPS] SB1: Fix modpost warning.
  [MIPS] PNX: Fix modpost warnings.
  [MIPS] Alchemy: Fix modpost warnings.
  [MIPS] Non-FPAFF: Fix warning.
  [MIPS] DEC: Fix modpost warning.
  [MIPS] MIPSsim: Enable MIPSsim virtual network driver.
  [MIPS] Delete Ocelot 3 support.
  [MIPS] remove LASAT Networks platforms support
  [MIPS] Early check for SMTC kernel on non-MT processor
  [MIPS] Add debugfs files to show fpuemu statistics
  [MIPS] Add some debugfs files to debug unaligned accesses
  [MIPS] rbtx4938: Fix secondary PCIC and glue internal NICs
  [MIPS] tc35815: Load MAC address via platform_device
  [MIPS] Move FPU affinity code into separate file.
  [MIPS] Make ioremap() work on TX39/49 special unmapped segment
  [MIPS] rbtx4938: Update and minimize defconfig
  ...
This commit is contained in:
Linus Torvalds 2007-07-10 14:48:43 -07:00
parent 5f60cfd932 105b1bca4d
commit 0f166396e7
292 changed files with 10774 additions and 14156 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

198
arch/mips/Kconfig
View File

@ -15,6 +15,29 @@ choice
prompt "System type"
default SGI_IP22
config LEMOTE_FULONG
bool "Lemote Fulong mini-PC"
select ARCH_SPARSEMEM_ENABLE
select SYS_HAS_CPU_LOONGSON2
select DMA_NONCOHERENT
select BOOT_ELF32
select BOARD_SCACHE
select HAVE_STD_PC_SERIAL_PORT
select HW_HAS_PCI
select I8259
select ISA
select IRQ_CPU
select SYS_SUPPORTS_32BIT_KERNEL
select SYS_SUPPORTS_64BIT_KERNEL
select SYS_SUPPORTS_LITTLE_ENDIAN
select SYS_SUPPORTS_HIGHMEM
select SYS_HAS_EARLY_PRINTK
select GENERIC_HARDIRQS_NO__DO_IRQ
select CPU_HAS_WB
help
Lemote Fulong mini-PC board based on the Chinese Loongson-2E CPU and
an FPGA northbridge
config MACH_ALCHEMY
bool "Alchemy processor based machines"
@ -63,7 +86,7 @@ config MACH_DECSTATION
bool "DECstations"
select BOOT_ELF32
select DMA_NONCOHERENT
select SYS_HAS_EARLY_PRINTK
select NO_IOPORT
select IRQ_CPU
select SYS_HAS_CPU_R3000
select SYS_HAS_CPU_R4X00
@ -88,24 +111,6 @@ config MACH_DECSTATION
otherwise choose R3000.
config MIPS_EV64120
bool "Galileo EV64120 Evaluation board (EXPERIMENTAL)"
depends on EXPERIMENTAL
select DMA_NONCOHERENT
select HW_HAS_PCI
select PCI_GT64XXX_PCI0
select SYS_HAS_CPU_R5000
select SYS_SUPPORTS_32BIT_KERNEL
select SYS_SUPPORTS_64BIT_KERNEL
select SYS_SUPPORTS_BIG_ENDIAN
select SYS_SUPPORTS_KGDB
help
This is an evaluation board based on the Galileo GT-64120
single-chip system controller that contains a MIPS R5000 compatible
core running at 75/100MHz. Their website is located at
<http://www.marvell.com/>. Say Y here if you wish to build a
kernel for this platform.
config MACH_JAZZ
bool "Jazz family of machines"
select ARC
@ -126,20 +131,6 @@ config MACH_JAZZ
Members include the Acer PICA, MIPS Magnum 4000, MIPS Millenium and
Olivetti M700-10 workstations.
config LASAT
bool "LASAT Networks platforms"
select DMA_NONCOHERENT
select SYS_HAS_EARLY_PRINTK
select HW_HAS_PCI
select PCI_GT64XXX_PCI0
select MIPS_NILE4
select R5000_CPU_SCACHE
select SYS_HAS_CPU_R5000
select SYS_SUPPORTS_32BIT_KERNEL
select SYS_SUPPORTS_64BIT_KERNEL if BROKEN
select SYS_SUPPORTS_LITTLE_ENDIAN
select GENERIC_HARDIRQS_NO__DO_IRQ
config MIPS_ATLAS
bool "MIPS Atlas board"
select BOOT_ELF32
@ -173,7 +164,6 @@ config MIPS_MALTA
bool "MIPS Malta board"
select ARCH_MAY_HAVE_PC_FDC
select BOOT_ELF32
select HAVE_STD_PC_SERIAL_PORT
select DMA_NONCOHERENT
select GENERIC_ISA_DMA
select IRQ_CPU
@ -246,11 +236,13 @@ config MIPS_SIM
select DMA_NONCOHERENT
select SYS_HAS_EARLY_PRINTK
select IRQ_CPU
select BOOT_RAW
select SYS_HAS_CPU_MIPS32_R1
select SYS_HAS_CPU_MIPS32_R2
select SYS_HAS_EARLY_PRINTK
select SYS_SUPPORTS_32BIT_KERNEL
select SYS_SUPPORTS_BIG_ENDIAN
select SYS_SUPPORTS_MULTITHREADING
select SYS_SUPPORTS_LITTLE_ENDIAN
help
This option enables support for MIPS Technologies MIPSsim software
@ -274,43 +266,6 @@ config MOMENCO_OCELOT
The Ocelot is a MIPS-based Single Board Computer (SBC) made by
Momentum Computer <http://www.momenco.com/>.
config MOMENCO_OCELOT_3
bool "Momentum Ocelot-3 board"
select BOOT_ELF32
select DMA_NONCOHERENT
select HW_HAS_PCI
select IRQ_CPU
select IRQ_CPU_RM7K
select IRQ_MV64340
select PCI_MARVELL
select RM7000_CPU_SCACHE
select SWAP_IO_SPACE
select SYS_HAS_CPU_RM9000
select SYS_SUPPORTS_32BIT_KERNEL
select SYS_SUPPORTS_64BIT_KERNEL
select SYS_SUPPORTS_BIG_ENDIAN
help
The Ocelot-3 is based off Discovery III System Controller and
PMC-Sierra Rm79000 core.
config MOMENCO_OCELOT_C
bool "Momentum Ocelot-C board"
select DMA_NONCOHERENT
select HW_HAS_PCI
select IRQ_CPU
select IRQ_MV64340
select PCI_MARVELL
select RM7000_CPU_SCACHE
select SWAP_IO_SPACE
select SYS_HAS_CPU_RM7000
select SYS_SUPPORTS_32BIT_KERNEL
select SYS_SUPPORTS_64BIT_KERNEL
select SYS_SUPPORTS_BIG_ENDIAN
select GENERIC_HARDIRQS_NO__DO_IRQ
help
The Ocelot is a MIPS-based Single Board Computer (SBC) made by
Momentum Computer <http://www.momenco.com/>.
config PNX8550_JBS
bool "Philips PNX8550 based JBS board"
select PNX8550
@ -346,6 +301,27 @@ config MACH_VR41XX
select SYS_HAS_CPU_VR41XX
select GENERIC_HARDIRQS_NO__DO_IRQ
config PMC_MSP
bool "PMC-Sierra MSP chipsets"
depends on EXPERIMENTAL
select DMA_NONCOHERENT
select SWAP_IO_SPACE
select NO_EXCEPT_FILL
select BOOT_RAW
select SYS_HAS_CPU_MIPS32_R1
select SYS_HAS_CPU_MIPS32_R2
select SYS_SUPPORTS_32BIT_KERNEL
select SYS_SUPPORTS_BIG_ENDIAN
select SYS_SUPPORTS_KGDB
select IRQ_CPU
select SERIAL_8250
select SERIAL_8250_CONSOLE
help
This adds support for the PMC-Sierra family of Multi-Service
Processor System-On-A-Chips. These parts include a number
of integrated peripherals, interfaces and DSPs in addition to
a variety of MIPS cores.
config PMC_YOSEMITE
bool "PMC-Sierra Yosemite eval board"
select DMA_COHERENT
@ -450,8 +426,7 @@ config SGI_IP27
here.
config SGI_IP32
bool "SGI IP32 (O2) (EXPERIMENTAL)"
depends on EXPERIMENTAL
bool "SGI IP32 (O2)"
select ARC
select ARC32
select BOOT_ELF32
@ -652,6 +627,7 @@ config TOSHIBA_RBTX4938
select SYS_SUPPORTS_BIG_ENDIAN
select SYS_SUPPORTS_KGDB
select GENERIC_HARDIRQS_NO__DO_IRQ
select GENERIC_GPIO
help
This Toshiba board is based on the TX4938 processor. Say Y here to
support this machine type
@ -660,9 +636,7 @@ endchoice
source "arch/mips/au1000/Kconfig"
source "arch/mips/ddb5xxx/Kconfig"
source "arch/mips/gt64120/ev64120/Kconfig"
source "arch/mips/jazz/Kconfig"
source "arch/mips/lasat/Kconfig"
source "arch/mips/pmc-sierra/Kconfig"
source "arch/mips/sgi-ip27/Kconfig"
source "arch/mips/sibyte/Kconfig"
@ -721,6 +695,9 @@ config ARC
config ARCH_MAY_HAVE_PC_FDC
bool
config BOOT_RAW
bool
config DMA_COHERENT
bool
@ -768,16 +745,19 @@ config MIPS_BONITO64
config MIPS_MSC
bool
config MIPS_NILE4
bool
config MIPS_DISABLE_OBSOLETE_IDE
bool
config NO_IOPORT
def_bool n
config GENERIC_ISA_DMA_SUPPORT_BROKEN
bool
select ZONE_DMA
config GENERIC_GPIO
bool
#
# Endianess selection. Sufficiently obscure so many users don't know what to
# answer,so we try hard to limit the available choices. Also the use of a
@ -821,7 +801,10 @@ config IRQ_CPU_RM7K
config IRQ_CPU_RM9K
bool
config IRQ_MV64340
config IRQ_MSP_SLP
bool
config IRQ_MSP_CIC
bool
config DDB5XXX_COMMON
@ -834,6 +817,9 @@ config MIPS_BOARDS_GEN
config PCI_GT64XXX_PCI0
bool
config NO_EXCEPT_FILL
bool
config MIPS_TX3927
bool
select HAS_TXX9_SERIAL
@ -841,14 +827,6 @@ config MIPS_TX3927
config MIPS_RM9122
bool
select SERIAL_RM9000
select GPI_RM9000
select WDT_RM9000
config PCI_MARVELL
bool
config SERIAL_RM9000
bool
config PNX8550
bool
@ -863,6 +841,7 @@ config SOC_PNX8550
select SYS_SUPPORTS_32BIT_KERNEL
select GENERIC_HARDIRQS_NO__DO_IRQ
select SYS_SUPPORTS_KGDB
select GENERIC_GPIO
config SWAP_IO_SPACE
bool
@ -875,31 +854,17 @@ config EMMA2RH
config SERIAL_RM9000
bool
config GPI_RM9000
bool
config WDT_RM9000
bool
#
# Unfortunately not all GT64120 systems run the chip at the same clock.
# As the user for the clock rate and try to minimize the available options.
#
choice
prompt "Galileo Chip Clock"
#default SYSCLK_83 if MIPS_EV64120
depends on MIPS_EV64120 || MOMENCO_OCELOT
default SYSCLK_83 if MIPS_EV64120
depends on MOMENCO_OCELOT
default SYSCLK_100 if MOMENCO_OCELOT
config SYSCLK_75
bool "75" if MIPS_EV64120
config SYSCLK_83
bool "83.3" if MIPS_EV64120
config SYSCLK_100
bool "100" if MIPS_EV64120 || MOMENCO_OCELOT
bool "100" if MOMENCO_OCELOT
endchoice
@ -911,8 +876,9 @@ config BOOT_ELF32
config MIPS_L1_CACHE_SHIFT
int
default "4" if MACH_DECSTATION || SNI_RM
default "7" if SGI_IP27
default "4" if MACH_DECSTATION
default "7" if SGI_IP27 || SNI_RM
default "4" if PMC_MSP4200_EVAL
default "5"
config HAVE_STD_PC_SERIAL_PORT
@ -944,6 +910,16 @@ choice
prompt "CPU type"
default CPU_R4X00
config CPU_LOONGSON2
bool "Loongson 2"
depends on SYS_HAS_CPU_LOONGSON2
select CPU_SUPPORTS_32BIT_KERNEL
select CPU_SUPPORTS_64BIT_KERNEL
select CPU_SUPPORTS_HIGHMEM
help
The Loongson 2E processor implements the MIPS III instruction set
with many extensions.
config CPU_MIPS32_R1
bool "MIPS32 Release 1"
depends on SYS_HAS_CPU_MIPS32_R1
@ -1154,6 +1130,9 @@ config CPU_SB1
endchoice
config SYS_HAS_CPU_LOONGSON2
bool
config SYS_HAS_CPU_MIPS32_R1
bool
@ -1488,6 +1467,15 @@ config CPU_HAS_SMARTMIPS
config CPU_HAS_WB
bool
config 64BIT_CONTEXT
bool "Save 64bit integer registers"
depends on 32BIT && CPU_LOONGSON2
help
Loongson2 CPU is 64bit , when used in 32BIT mode, its integer
registers can still be accessed as 64bit, mainly for multimedia
instructions. We must have all 64bit save/restored to make sure
those instructions to get correct result.
#
# Vectored interrupt mode is an R2 feature
#

84
arch/mips/Makefile
View File

@ -118,6 +118,7 @@ cflags-$(CONFIG_CPU_R4300) += -march=r4300 -Wa,--trap
cflags-$(CONFIG_CPU_VR41XX) += -march=r4100 -Wa,--trap
cflags-$(CONFIG_CPU_R4X00) += -march=r4600 -Wa,--trap
cflags-$(CONFIG_CPU_TX49XX) += -march=r4600 -Wa,--trap
cflags-$(CONFIG_CPU_LOONGSON2) += -march=r4600 -Wa,--trap
cflags-$(CONFIG_CPU_MIPS32_R1) += $(call cc-option,-march=mips32,-mips32 -U_MIPS_ISA -D_MIPS_ISA=_MIPS_ISA_MIPS32) \
-Wa,-mips32 -Wa,--trap
cflags-$(CONFIG_CPU_MIPS32_R2) += $(call cc-option,-march=mips32r2,-mips32r2 -U_MIPS_ISA -D_MIPS_ISA=_MIPS_ISA_MIPS32) \
@ -282,14 +283,6 @@ libs-$(CONFIG_MACH_DECSTATION) += arch/mips/dec/prom/
load-$(CONFIG_MACH_DECSTATION) += 0xffffffff80040000
CLEAN_FILES += drivers/tc/lk201-map.c
#
# Galileo EV64120 Board
#
core-$(CONFIG_MIPS_EV64120) += arch/mips/gt64120/ev64120/
core-$(CONFIG_MIPS_EV64120) += arch/mips/gt64120/common/
cflags-$(CONFIG_MIPS_EV64120) += -Iinclude/asm-mips/mach-ev64120
load-$(CONFIG_MIPS_EV64120) += 0xffffffff80100000
#
# Wind River PPMC Board (4KC + GT64120)
#
@ -297,6 +290,13 @@ core-$(CONFIG_WR_PPMC) += arch/mips/gt64120/wrppmc/
cflags-$(CONFIG_WR_PPMC) += -Iinclude/asm-mips/mach-wrppmc
load-$(CONFIG_WR_PPMC) += 0xffffffff80100000
#
# lemote fulong mini-PC board
#
core-$(CONFIG_LEMOTE_FULONG) +=arch/mips/lemote/lm2e/
load-$(CONFIG_LEMOTE_FULONG) +=0xffffffff80100000
cflags-$(CONFIG_LEMOTE_FULONG) += -Iinclude/asm-mips/mach-lemote
#
# For all MIPS, Inc. eval boards
#
@ -327,7 +327,7 @@ load-$(CONFIG_MIPS_SEAD) += 0xffffffff80100000
#
# MIPS SIM
#
core-$(CONFIG_MIPS_SIM) += arch/mips/mips-boards/sim/
core-$(CONFIG_MIPS_SIM) += arch/mips/mipssim/
cflags-$(CONFIG_MIPS_SIM) += -Iinclude/asm-mips/mach-sim
load-$(CONFIG_MIPS_SIM) += 0x80100000
@ -343,12 +343,12 @@ cflags-$(CONFIG_MOMENCO_OCELOT) += -Iinclude/asm-mips/mach-ocelot
load-$(CONFIG_MOMENCO_OCELOT) += 0xffffffff80100000
#
# Momentum Ocelot-C and -CS boards
# PMC-Sierra MSP SOCs
#
# The Ocelot-C[S] setup.o must be linked early - it does the ioremap() for the
# mips_io_port_base.
core-$(CONFIG_MOMENCO_OCELOT_C) += arch/mips/momentum/ocelot_c/
load-$(CONFIG_MOMENCO_OCELOT_C) += 0xffffffff80100000
core-$(CONFIG_PMC_MSP) += arch/mips/pmc-sierra/msp71xx/
cflags-$(CONFIG_PMC_MSP) += -Iinclude/asm-mips/pmc-sierra/msp71xx \
-mno-branch-likely
load-$(CONFIG_PMC_MSP) += 0xffffffff80100000
#
# PMC-Sierra Yosemite
@ -364,13 +364,6 @@ core-$(CONFIG_QEMU) += arch/mips/qemu/
cflags-$(CONFIG_QEMU) += -Iinclude/asm-mips/mach-qemu
load-$(CONFIG_QEMU) += 0xffffffff80010000
#
# Momentum Ocelot-3
#
core-$(CONFIG_MOMENCO_OCELOT_3) += arch/mips/momentum/ocelot_3/
cflags-$(CONFIG_MOMENCO_OCELOT_3) += -Iinclude/asm-mips/mach-ocelot3
load-$(CONFIG_MOMENCO_OCELOT_3) += 0xffffffff80100000
#
# Basler eXcite
#
@ -389,10 +382,6 @@ core-$(CONFIG_DDB5XXX_COMMON) += arch/mips/ddb5xxx/common/
core-$(CONFIG_DDB5477) += arch/mips/ddb5xxx/ddb5477/
load-$(CONFIG_DDB5477) += 0xffffffff80100000
core-$(CONFIG_LASAT) += arch/mips/lasat/
cflags-$(CONFIG_LASAT) += -Iinclude/asm-mips/mach-lasat
load-$(CONFIG_LASAT) += 0xffffffff80000000
#
# Common VR41xx
#
@ -580,6 +569,7 @@ load-$(CONFIG_TOSHIBA_JMR3927) += 0xffffffff80050000
#
core-$(CONFIG_TOSHIBA_RBTX4927) += arch/mips/tx4927/toshiba_rbtx4927/
core-$(CONFIG_TOSHIBA_RBTX4927) += arch/mips/tx4927/common/
cflags-$(CONFIG_TOSHIBA_RBTX4927) += -Iinclude/asm-mips/mach-tx49xx
load-$(CONFIG_TOSHIBA_RBTX4927) += 0xffffffff80020000
#
@ -587,6 +577,7 @@ load-$(CONFIG_TOSHIBA_RBTX4927) += 0xffffffff80020000
#
core-$(CONFIG_TOSHIBA_RBTX4938) += arch/mips/tx4938/toshiba_rbtx4938/
core-$(CONFIG_TOSHIBA_RBTX4938) += arch/mips/tx4938/common/
cflags-$(CONFIG_TOSHIBA_RBTX4938) += -Iinclude/asm-mips/mach-tx49xx
load-$(CONFIG_TOSHIBA_RBTX4938) += 0xffffffff80100000
cflags-y += -Iinclude/asm-mips/mach-generic
@ -603,7 +594,8 @@ JIFFIES = jiffies_64
endif
AFLAGS += $(cflags-y)
CFLAGS += $(cflags-y)
CFLAGS += $(cflags-y) \
-D"VMLINUX_LOAD_ADDRESS=$(load-y)"
LDFLAGS += -m $(ld-emul)
@ -633,18 +625,11 @@ CPPFLAGS_vmlinux.lds := \
head-y := arch/mips/kernel/head.o arch/mips/kernel/init_task.o
libs-y += arch/mips/lib/
libs-$(CONFIG_32BIT) += arch/mips/lib-32/
libs-$(CONFIG_64BIT) += arch/mips/lib-64/
core-y += arch/mips/kernel/ arch/mips/mm/ arch/mips/math-emu/
drivers-$(CONFIG_OPROFILE) += arch/mips/oprofile/
ifdef CONFIG_LASAT
rom.bin rom.sw: vmlinux
$(Q)$(MAKE) $(build)=arch/mips/lasat/image $@
endif
#
# Some machines like the Indy need 32-bit ELF binaries for booting purposes.
# Other need ECOFF, so we build a 32-bit ELF binary for them which we then
@ -702,32 +687,19 @@ vmlinux.srec: $(vmlinux-32)
CLEAN_FILES += vmlinux.ecoff \
vmlinux.srec
archprepare:
ifdef CONFIG_MIPS32_N32
@echo ' Checking missing-syscalls for N32'
$(Q)$(MAKE) $(build)=. missing-syscalls EXTRA_CFLAGS="-mabi=n32"
endif
ifdef CONFIG_MIPS32_O32
@echo ' Checking missing-syscalls for O32'
$(Q)$(MAKE) $(build)=. missing-syscalls EXTRA_CFLAGS="-mabi=32"
endif
archclean:
@$(MAKE) $(clean)=arch/mips/boot
@$(MAKE) $(clean)=arch/mips/lasat
CLEAN_FILES += vmlinux.32 \
vmlinux.64 \
vmlinux.ecoff
quiet_cmd_syscalls_n32 = CALL-N32 $<
cmd_syscalls_n32 = $(CONFIG_SHELL) $< $(CC) $(c_flags) -mabi=n32
quiet_cmd_syscalls_o32 = CALL-O32 $<
cmd_syscalls_o32 = $(CONFIG_SHELL) $< $(CC) $(c_flags) -mabi=32
PHONY += missing-syscalls-n32 missing-syscalls-o32
missing-syscalls-n32: scripts/checksyscalls.sh FORCE
$(call cmd,syscalls_n32)
missing-syscalls-o32: scripts/checksyscalls.sh FORCE
$(call cmd,syscalls_o32)
archprepare:
ifdef CONFIG_MIPS32_N32
$(Q)$(MAKE) $(build)=arch/mips missing-syscalls-n32
endif
ifdef CONFIG_MIPS32_O32
$(Q)$(MAKE) $(build)=arch/mips missing-syscalls-o32
endif

132
arch/mips/au1000/common/gpio.c
View File

@ -1,4 +1,7 @@
/*
* Copyright (C) 2007, OpenWrt.org, Florian Fainelli <florian@openwrt.org>
* Architecture specific GPIO support
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
@ -18,101 +21,136 @@
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*
* Notes :
* au1000 SoC have only one GPIO line : GPIO1
* others have a second one : GPIO2
*/
#include <linux/autoconf.h>
#include <linux/init.h>
#include <linux/io.h>
#include <linux/types.h>
#include <linux/module.h>
#include <au1000.h>
#include <au1xxx_gpio.h>
#include <asm/addrspace.h>
#include <asm/mach-au1x00/au1000.h>
#include <asm/gpio.h>
#define gpio1 sys
#if !defined(CONFIG_SOC_AU1000)
static AU1X00_GPIO2 * const gpio2 = (AU1X00_GPIO2 *)GPIO2_BASE;
#define GPIO2_OUTPUT_ENABLE_MASK 0x00010000
static struct au1x00_gpio2 *const gpio2 = (struct au1x00_gpio2 *) GPIO2_BASE;
#define GPIO2_OUTPUT_ENABLE_MASK 0x00010000
int au1xxx_gpio2_read(int signal)
static int au1xxx_gpio2_read(unsigned gpio)
{
signal -= 200;
/* gpio2->dir &= ~(0x01 << signal); //Set GPIO to input */
return ((gpio2->pinstate >> signal) & 0x01);
gpio -= AU1XXX_GPIO_BASE;
return ((gpio2->pinstate >> gpio) & 0x01);
}
void au1xxx_gpio2_write(int signal, int value)
static void au1xxx_gpio2_write(unsigned gpio, int value)
{
signal -= 200;
gpio -= AU1XXX_GPIO_BASE;
gpio2->output = (GPIO2_OUTPUT_ENABLE_MASK << signal) |
(value << signal);
gpio2->output = (GPIO2_OUTPUT_ENABLE_MASK << gpio) | (value << gpio);
}
void au1xxx_gpio2_tristate(int signal)
static int au1xxx_gpio2_direction_input(unsigned gpio)
{
signal -= 200;
gpio2->dir &= ~(0x01 << signal); /* Set GPIO to input */
}
#endif
int au1xxx_gpio1_read(int signal)
{
/* gpio1->trioutclr |= (0x01 << signal); */
return ((gpio1->pinstaterd >> signal) & 0x01);
gpio -= AU1XXX_GPIO_BASE;
gpio2->dir &= ~(0x01 << gpio);
return 0;
}
void au1xxx_gpio1_write(int signal, int value)
static int au1xxx_gpio2_direction_output(unsigned gpio, int value)
{
if(value)
gpio1->outputset = (0x01 << signal);
gpio -= AU1XXX_GPIO_BASE;
gpio2->dir = (0x01 << gpio) | (value << gpio);
return 0;
}
#endif /* !defined(CONFIG_SOC_AU1000) */
static int au1xxx_gpio1_read(unsigned gpio)
{
return ((gpio1->pinstaterd >> gpio) & 0x01);
}
static void au1xxx_gpio1_write(unsigned gpio, int value)
{
if (value)
gpio1->outputset = (0x01 << gpio);
else
gpio1->outputclr = (0x01 << signal); /* Output a Zero */
/* Output a zero */
gpio1->outputclr = (0x01 << gpio);
}
void au1xxx_gpio1_tristate(int signal)
static int au1xxx_gpio1_direction_input(unsigned gpio)
{
gpio1->trioutclr = (0x01 << signal); /* Tristate signal */
gpio1->pininputen = (0x01 << gpio);
return 0;
}
int au1xxx_gpio_read(int signal)
static int au1xxx_gpio1_direction_output(unsigned gpio, int value)
{
if(signal >= 200)
gpio1->trioutclr = (0x01 & gpio);
return 0;
}
int au1xxx_gpio_get_value(unsigned gpio)
{
if (gpio >= AU1XXX_GPIO_BASE)
#if defined(CONFIG_SOC_AU1000)
return 0;
#else
return au1xxx_gpio2_read(signal);
return au1xxx_gpio2_read(gpio);
#endif
else
return au1xxx_gpio1_read(signal);
return au1xxx_gpio1_read(gpio);
}
void au1xxx_gpio_write(int signal, int value)
EXPORT_SYMBOL(au1xxx_gpio_get_value);
void au1xxx_gpio_set_value(unsigned gpio, int value)
{
if(signal >= 200)
if (gpio >= AU1XXX_GPIO_BASE)
#if defined(CONFIG_SOC_AU1000)
;
#else
au1xxx_gpio2_write(signal, value);
au1xxx_gpio2_write(gpio, value);
#endif
else
au1xxx_gpio1_write(signal, value);
au1xxx_gpio1_write(gpio, value);
}
void au1xxx_gpio_tristate(int signal)
EXPORT_SYMBOL(au1xxx_gpio_set_value);
int au1xxx_gpio_direction_input(unsigned gpio)
{
if(signal >= 200)
if (gpio >= AU1XXX_GPIO_BASE)
#if defined(CONFIG_SOC_AU1000)
;
#else
au1xxx_gpio2_tristate(signal);
return au1xxx_gpio2_direction_input(gpio);
#endif
else
au1xxx_gpio1_tristate(signal);
return au1xxx_gpio1_direction_input(gpio);
}
void au1xxx_gpio1_set_inputs(void)
EXPORT_SYMBOL(au1xxx_gpio_direction_input);
int au1xxx_gpio_direction_output(unsigned gpio, int value)
{
gpio1->pininputen = 0;
if (gpio >= AU1XXX_GPIO_BASE)
#if defined(CONFIG_SOC_AU1000)
;
#else
return au1xxx_gpio2_direction_output(gpio, value);
#endif
else
return au1xxx_gpio1_direction_output(gpio, value);
}
EXPORT_SYMBOL(au1xxx_gpio1_set_inputs);
EXPORT_SYMBOL(au1xxx_gpio_tristate);
EXPORT_SYMBOL(au1xxx_gpio_write);
EXPORT_SYMBOL(au1xxx_gpio_read);
EXPORT_SYMBOL(au1xxx_gpio_direction_output);

2
arch/mips/au1000/common/platform.c
View File

@ -289,7 +289,7 @@ static struct platform_device *au1xxx_platform_devices[] __initdata = {
#endif
};
int au1xxx_platform_init(void)
int __init au1xxx_platform_init(void)
{
return platform_add_devices(au1xxx_platform_devices, ARRAY_SIZE(au1xxx_platform_devices));
}

4
arch/mips/configs/atlas_defconfig
View File

@ -25,9 +25,7 @@ CONFIG_ZONE_DMA=y
# CONFIG_BASLER_EXCITE is not set
# CONFIG_MIPS_COBALT is not set
# CONFIG_MACH_DECSTATION is not set
# CONFIG_MIPS_EV64120 is not set
# CONFIG_MACH_JAZZ is not set
# CONFIG_LASAT is not set
CONFIG_MIPS_ATLAS=y
# CONFIG_MIPS_MALTA is not set
# CONFIG_MIPS_SEAD is not set
@ -35,8 +33,6 @@ CONFIG_MIPS_ATLAS=y
# CONFIG_MIPS_SIM is not set
# CONFIG_MOMENCO_JAGUAR_ATX is not set
# CONFIG_MOMENCO_OCELOT is not set
# CONFIG_MOMENCO_OCELOT_3 is not set
# CONFIG_MOMENCO_OCELOT_C is not set
# CONFIG_MOMENCO_OCELOT_G is not set
# CONFIG_MIPS_XXS1500 is not set
# CONFIG_PNX8550_JBS is not set

4
arch/mips/configs/bigsur_defconfig
View File

@ -25,9 +25,7 @@ CONFIG_ZONE_DMA=y
# CONFIG_BASLER_EXCITE is not set
# CONFIG_MIPS_COBALT is not set
# CONFIG_MACH_DECSTATION is not set
# CONFIG_MIPS_EV64120 is not set
# CONFIG_MACH_JAZZ is not set
# CONFIG_LASAT is not set
# CONFIG_MIPS_ATLAS is not set
# CONFIG_MIPS_MALTA is not set
# CONFIG_MIPS_SEAD is not set
@ -35,8 +33,6 @@ CONFIG_ZONE_DMA=y
# CONFIG_MIPS_SIM is not set
# CONFIG_MOMENCO_JAGUAR_ATX is not set
# CONFIG_MOMENCO_OCELOT is not set
# CONFIG_MOMENCO_OCELOT_3 is not set
# CONFIG_MOMENCO_OCELOT_C is not set
# CONFIG_MOMENCO_OCELOT_G is not set
# CONFIG_MIPS_XXS1500 is not set
# CONFIG_PNX8550_JBS is not set

4
arch/mips/configs/capcella_defconfig
View File

@ -25,9 +25,7 @@ CONFIG_ZONE_DMA=y
# CONFIG_BASLER_EXCITE is not set
# CONFIG_MIPS_COBALT is not set
# CONFIG_MACH_DECSTATION is not set
# CONFIG_MIPS_EV64120 is not set
# CONFIG_MACH_JAZZ is not set
# CONFIG_LASAT is not set
# CONFIG_MIPS_ATLAS is not set
# CONFIG_MIPS_MALTA is not set
# CONFIG_MIPS_SEAD is not set
@ -35,8 +33,6 @@ CONFIG_ZONE_DMA=y
# CONFIG_MIPS_SIM is not set
# CONFIG_MOMENCO_JAGUAR_ATX is not set
# CONFIG_MOMENCO_OCELOT is not set
# CONFIG_MOMENCO_OCELOT_3 is not set
# CONFIG_MOMENCO_OCELOT_C is not set
# CONFIG_MOMENCO_OCELOT_G is not set
# CONFIG_MIPS_XXS1500 is not set
# CONFIG_PNX8550_JBS is not set

498
arch/mips/configs/cobalt_defconfig
View File

@ -1,44 +1,24 @@
#
# Automatically generated make config: don't edit
# Linux kernel version: 2.6.21-rc7
# Wed Apr 18 14:25:45 2007
# Linux kernel version: 2.6.22-rc2
# Fri May 25 11:17:29 2007
#
CONFIG_MIPS=y
#
# Machine selection
#
CONFIG_ZONE_DMA=y
# CONFIG_MIPS_MTX1 is not set
# CONFIG_MIPS_BOSPORUS is not set
# CONFIG_MIPS_PB1000 is not set
# CONFIG_MIPS_PB1100 is not set
# CONFIG_MIPS_PB1500 is not set
# CONFIG_MIPS_PB1550 is not set
# CONFIG_MIPS_PB1200 is not set
# CONFIG_MIPS_DB1000 is not set
# CONFIG_MIPS_DB1100 is not set
# CONFIG_MIPS_DB1500 is not set
# CONFIG_MIPS_DB1550 is not set
# CONFIG_MIPS_DB1200 is not set
# CONFIG_MIPS_MIRAGE is not set
# CONFIG_MACH_ALCHEMY is not set
# CONFIG_BASLER_EXCITE is not set
CONFIG_MIPS_COBALT=y
# CONFIG_MACH_DECSTATION is not set
# CONFIG_MIPS_EV64120 is not set
# CONFIG_MACH_JAZZ is not set
# CONFIG_LASAT is not set
# CONFIG_MIPS_ATLAS is not set
# CONFIG_MIPS_MALTA is not set
# CONFIG_MIPS_SEAD is not set
# CONFIG_WR_PPMC is not set
# CONFIG_MIPS_SIM is not set
# CONFIG_MOMENCO_JAGUAR_ATX is not set
# CONFIG_MOMENCO_OCELOT is not set
# CONFIG_MOMENCO_OCELOT_3 is not set
# CONFIG_MOMENCO_OCELOT_C is not set
# CONFIG_MOMENCO_OCELOT_G is not set
# CONFIG_MIPS_XXS1500 is not set
# CONFIG_PNX8550_JBS is not set
# CONFIG_PNX8550_STB810 is not set
# CONFIG_DDB5477 is not set
@ -138,7 +118,7 @@ CONFIG_FLAT_NODE_MEM_MAP=y
# CONFIG_SPARSEMEM_STATIC is not set
CONFIG_SPLIT_PTLOCK_CPUS=4
# CONFIG_RESOURCES_64BIT is not set
CONFIG_ZONE_DMA_FLAG=1
CONFIG_ZONE_DMA_FLAG=0
# CONFIG_HZ_48 is not set
# CONFIG_HZ_100 is not set
# CONFIG_HZ_128 is not set
@ -178,6 +158,7 @@ CONFIG_SYSVIPC_SYSCTL=y
# CONFIG_UTS_NS is not set
# CONFIG_AUDIT is not set
# CONFIG_IKCONFIG is not set
CONFIG_LOG_BUF_SHIFT=14
CONFIG_SYSFS_DEPRECATED=y
CONFIG_RELAY=y
# CONFIG_BLK_DEV_INITRD is not set
@ -193,14 +174,19 @@ CONFIG_BUG=y
CONFIG_ELF_CORE=y
CONFIG_BASE_FULL=y
CONFIG_FUTEX=y
CONFIG_ANON_INODES=y
CONFIG_EPOLL=y
CONFIG_SIGNALFD=y
CONFIG_TIMERFD=y
CONFIG_EVENTFD=y
CONFIG_SHMEM=y
CONFIG_SLAB=y
CONFIG_VM_EVENT_COUNTERS=y
CONFIG_SLAB=y
# CONFIG_SLUB is not set
# CONFIG_SLOB is not set
CONFIG_RT_MUTEXES=y
# CONFIG_TINY_SHMEM is not set
CONFIG_BASE_SMALL=0
# CONFIG_SLOB is not set
#
# Loadable module support
@ -233,16 +219,13 @@ CONFIG_DEFAULT_IOSCHED="anticipatory"
#
CONFIG_HW_HAS_PCI=y
CONFIG_PCI=y
# CONFIG_ARCH_SUPPORTS_MSI is not set
CONFIG_MMU=y
#
# PCCARD (PCMCIA/CardBus) support
#
# CONFIG_PCCARD is not set
#
# PCI Hotplug Support
#
# CONFIG_HOTPLUG_PCI is not set
#
@ -268,7 +251,6 @@ CONFIG_NET=y
#
# Networking options
#
# CONFIG_NETDEBUG is not set
CONFIG_PACKET=y
# CONFIG_PACKET_MMAP is not set
CONFIG_UNIX=y
@ -300,11 +282,11 @@ CONFIG_INET_TCP_DIAG=y
# CONFIG_TCP_CONG_ADVANCED is not set
CONFIG_TCP_CONG_CUBIC=y
CONFIG_DEFAULT_TCP_CONG="cubic"
CONFIG_TCP_MD5SIG=y
# CONFIG_TCP_MD5SIG is not set
# CONFIG_IPV6 is not set
# CONFIG_INET6_XFRM_TUNNEL is not set
# CONFIG_INET6_TUNNEL is not set
CONFIG_NETWORK_SECMARK=y
# CONFIG_NETWORK_SECMARK is not set
# CONFIG_NETFILTER is not set
#
@ -345,13 +327,16 @@ CONFIG_NETWORK_SECMARK=y
# CONFIG_HAMRADIO is not set
# CONFIG_IRDA is not set
# CONFIG_BT is not set
CONFIG_IEEE80211=y
# CONFIG_IEEE80211_DEBUG is not set
CONFIG_IEEE80211_CRYPT_WEP=y
CONFIG_IEEE80211_CRYPT_CCMP=y
CONFIG_IEEE80211_SOFTMAC=y
# CONFIG_IEEE80211_SOFTMAC_DEBUG is not set
CONFIG_WIRELESS_EXT=y
# CONFIG_AF_RXRPC is not set
#
# Wireless
#
# CONFIG_CFG80211 is not set
# CONFIG_WIRELESS_EXT is not set
# CONFIG_MAC80211 is not set
# CONFIG_IEEE80211 is not set
# CONFIG_RFKILL is not set
#
# Device Drivers
@ -370,10 +355,6 @@ CONFIG_FW_LOADER=y
#
CONFIG_CONNECTOR=y
CONFIG_PROC_EVENTS=y
#
# Memory Technology Devices (MTD)
#
CONFIG_MTD=y
# CONFIG_MTD_DEBUG is not set
# CONFIG_MTD_CONCAT is not set
@ -418,7 +399,6 @@ CONFIG_MTD_CFI_UTIL=y
# CONFIG_MTD_RAM is not set
# CONFIG_MTD_ROM is not set
# CONFIG_MTD_ABSENT is not set
# CONFIG_MTD_OBSOLETE_CHIPS is not set
#
# Mapping drivers for chip access
@ -445,16 +425,13 @@ CONFIG_MTD_PHYSMAP_BANKWIDTH=0
# CONFIG_MTD_DOC2000 is not set
# CONFIG_MTD_DOC2001 is not set
# CONFIG_MTD_DOC2001PLUS is not set
#
# NAND Flash Device Drivers
#
# CONFIG_MTD_NAND is not set
# CONFIG_MTD_ONENAND is not set
#
# OneNAND Flash Device Drivers
# UBI - Unsorted block images
#
# CONFIG_MTD_ONENAND is not set
# CONFIG_MTD_UBI is not set
#
# Parallel port support
@ -479,87 +456,145 @@ CONFIG_BLK_DEV_LOOP=y
# CONFIG_BLK_DEV_NBD is not set
# CONFIG_BLK_DEV_SX8 is not set
# CONFIG_BLK_DEV_RAM is not set
CONFIG_CDROM_PKTCDVD=y
CONFIG_CDROM_PKTCDVD_BUFFERS=8
# CONFIG_CDROM_PKTCDVD_WCACHE is not set
CONFIG_ATA_OVER_ETH=y
# CONFIG_CDROM_PKTCDVD is not set
# CONFIG_ATA_OVER_ETH is not set
#
# Misc devices
#
CONFIG_SGI_IOC4=y
# CONFIG_PHANTOM is not set
# CONFIG_SGI_IOC4 is not set
# CONFIG_TIFM_CORE is not set
#
# ATA/ATAPI/MFM/RLL support
#
CONFIG_IDE=y
CONFIG_IDE_MAX_HWIFS=4
CONFIG_BLK_DEV_IDE=y
#
# Please see Documentation/ide.txt for help/info on IDE drives
#
# CONFIG_BLK_DEV_IDE_SATA is not set
CONFIG_BLK_DEV_IDEDISK=y
# CONFIG_IDEDISK_MULTI_MODE is not set
# CONFIG_BLK_DEV_IDECD is not set
# CONFIG_BLK_DEV_IDETAPE is not set
# CONFIG_BLK_DEV_IDEFLOPPY is not set
# CONFIG_IDE_TASK_IOCTL is not set
#
# IDE chipset support/bugfixes
#
CONFIG_IDE_GENERIC=y
CONFIG_BLK_DEV_IDEPCI=y
# CONFIG_IDEPCI_SHARE_IRQ is not set
# CONFIG_BLK_DEV_OFFBOARD is not set
# CONFIG_BLK_DEV_GENERIC is not set
# CONFIG_BLK_DEV_OPTI621 is not set
CONFIG_BLK_DEV_IDEDMA_PCI=y
# CONFIG_BLK_DEV_IDEDMA_FORCED is not set
# CONFIG_IDEDMA_ONLYDISK is not set
# CONFIG_BLK_DEV_AEC62XX is not set
# CONFIG_BLK_DEV_ALI15X3 is not set
# CONFIG_BLK_DEV_AMD74XX is not set
# CONFIG_BLK_DEV_CMD64X is not set
# CONFIG_BLK_DEV_TRIFLEX is not set
# CONFIG_BLK_DEV_CY82C693 is not set
# CONFIG_BLK_DEV_CS5520 is not set
# CONFIG_BLK_DEV_CS5530 is not set
# CONFIG_BLK_DEV_HPT34X is not set
# CONFIG_BLK_DEV_HPT366 is not set
# CONFIG_BLK_DEV_JMICRON is not set
# CONFIG_BLK_DEV_SC1200 is not set
# CONFIG_BLK_DEV_PIIX is not set
CONFIG_BLK_DEV_IT8213=y
# CONFIG_BLK_DEV_IT821X is not set
# CONFIG_BLK_DEV_NS87415 is not set
# CONFIG_BLK_DEV_PDC202XX_OLD is not set
# CONFIG_BLK_DEV_PDC202XX_NEW is not set
# CONFIG_BLK_DEV_SVWKS is not set
# CONFIG_BLK_DEV_SIIMAGE is not set
# CONFIG_BLK_DEV_SLC90E66 is not set
# CONFIG_BLK_DEV_TRM290 is not set
CONFIG_BLK_DEV_VIA82CXXX=y
CONFIG_BLK_DEV_TC86C001=y
# CONFIG_IDE_ARM is not set
CONFIG_BLK_DEV_IDEDMA=y
# CONFIG_IDEDMA_IVB is not set
# CONFIG_BLK_DEV_HD is not set
# CONFIG_BLINK is not set
# CONFIG_IDE is not set
#
# SCSI device support
#
CONFIG_RAID_ATTRS=y
# CONFIG_SCSI is not set
CONFIG_SCSI=y
# CONFIG_SCSI_TGT is not set
# CONFIG_SCSI_NETLINK is not set
CONFIG_SCSI_PROC_FS=y
#
# Serial ATA (prod) and Parallel ATA (experimental) drivers
# SCSI support type (disk, tape, CD-ROM)
#
# CONFIG_ATA is not set
CONFIG_BLK_DEV_SD=y
# CONFIG_CHR_DEV_ST is not set
# CONFIG_CHR_DEV_OSST is not set
# CONFIG_BLK_DEV_SR is not set
# CONFIG_CHR_DEV_SG is not set
# CONFIG_CHR_DEV_SCH is not set
#
# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
#
# CONFIG_SCSI_MULTI_LUN is not set
# CONFIG_SCSI_CONSTANTS is not set
# CONFIG_SCSI_LOGGING is not set
# CONFIG_SCSI_SCAN_ASYNC is not set
#
# SCSI Transports
#
# CONFIG_SCSI_SPI_ATTRS is not set
# CONFIG_SCSI_FC_ATTRS is not set
# CONFIG_SCSI_ISCSI_ATTRS is not set
# CONFIG_SCSI_SAS_ATTRS is not set
# CONFIG_SCSI_SAS_LIBSAS is not set
#
# SCSI low-level drivers
#
# CONFIG_ISCSI_TCP is not set
# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
# CONFIG_SCSI_3W_9XXX is not set
# CONFIG_SCSI_ACARD is not set
# CONFIG_SCSI_AACRAID is not set
# CONFIG_SCSI_AIC7XXX is not set
# CONFIG_SCSI_AIC7XXX_OLD is not set
# CONFIG_SCSI_AIC79XX is not set
# CONFIG_SCSI_AIC94XX is not set
# CONFIG_SCSI_DPT_I2O is not set
# CONFIG_SCSI_ARCMSR is not set
# CONFIG_MEGARAID_NEWGEN is not set
# CONFIG_MEGARAID_LEGACY is not set
# CONFIG_MEGARAID_SAS is not set
# CONFIG_SCSI_HPTIOP is not set
# CONFIG_SCSI_DMX3191D is not set
# CONFIG_SCSI_FUTURE_DOMAIN is not set
# CONFIG_SCSI_IPS is not set
# CONFIG_SCSI_INITIO is not set
# CONFIG_SCSI_INIA100 is not set
# CONFIG_SCSI_STEX is not set
# CONFIG_SCSI_SYM53C8XX_2 is not set
# CONFIG_SCSI_IPR is not set
# CONFIG_SCSI_QLOGIC_1280 is not set
# CONFIG_SCSI_QLA_FC is not set
# CONFIG_SCSI_QLA_ISCSI is not set
# CONFIG_SCSI_LPFC is not set
# CONFIG_SCSI_DC395x is not set
# CONFIG_SCSI_DC390T is not set
# CONFIG_SCSI_NSP32 is not set
# CONFIG_SCSI_DEBUG is not set
# CONFIG_SCSI_ESP_CORE is not set
# CONFIG_SCSI_SRP is not set
CONFIG_ATA=y
# CONFIG_ATA_NONSTANDARD is not set
# CONFIG_SATA_AHCI is not set
# CONFIG_SATA_SVW is not set
# CONFIG_ATA_PIIX is not set
# CONFIG_SATA_MV is not set
# CONFIG_SATA_NV is not set
# CONFIG_PDC_ADMA is not set
# CONFIG_SATA_QSTOR is not set
# CONFIG_SATA_PROMISE is not set
# CONFIG_SATA_SX4 is not set
# CONFIG_SATA_SIL is not set
# CONFIG_SATA_SIL24 is not set
# CONFIG_SATA_SIS is not set
# CONFIG_SATA_ULI is not set
# CONFIG_SATA_VIA is not set
# CONFIG_SATA_VITESSE is not set
# CONFIG_SATA_INIC162X is not set
# CONFIG_PATA_ALI is not set
# CONFIG_PATA_AMD is not set
# CONFIG_PATA_ARTOP is not set
# CONFIG_PATA_ATIIXP is not set
# CONFIG_PATA_CMD640_PCI is not set
# CONFIG_PATA_CMD64X is not set
# CONFIG_PATA_CS5520 is not set
# CONFIG_PATA_CS5530 is not set
# CONFIG_PATA_CYPRESS is not set
# CONFIG_PATA_EFAR is not set
# CONFIG_ATA_GENERIC is not set
# CONFIG_PATA_HPT366 is not set
# CONFIG_PATA_HPT37X is not set
# CONFIG_PATA_HPT3X2N is not set
# CONFIG_PATA_HPT3X3 is not set
# CONFIG_PATA_IT821X is not set
# CONFIG_PATA_IT8213 is not set
# CONFIG_PATA_JMICRON is not set
# CONFIG_PATA_TRIFLEX is not set
# CONFIG_PATA_MARVELL is not set
# CONFIG_PATA_MPIIX is not set
# CONFIG_PATA_OLDPIIX is not set
# CONFIG_PATA_NETCELL is not set
# CONFIG_PATA_NS87410 is not set
# CONFIG_PATA_OPTI is not set
# CONFIG_PATA_OPTIDMA is not set
# CONFIG_PATA_PDC_OLD is not set
# CONFIG_PATA_RADISYS is not set
# CONFIG_PATA_RZ1000 is not set
# CONFIG_PATA_SC1200 is not set
# CONFIG_PATA_SERVERWORKS is not set
# CONFIG_PATA_PDC2027X is not set
# CONFIG_PATA_SIL680 is not set
# CONFIG_PATA_SIS is not set
CONFIG_PATA_VIA=y
# CONFIG_PATA_WINBOND is not set
# CONFIG_PATA_PLATFORM is not set
#
# Multi-device support (RAID and LVM)
@ -570,10 +605,14 @@ CONFIG_RAID_ATTRS=y
# Fusion MPT device support
#
# CONFIG_FUSION is not set
# CONFIG_FUSION_SPI is not set
# CONFIG_FUSION_FC is not set
# CONFIG_FUSION_SAS is not set
#
# IEEE 1394 (FireWire) support
#
# CONFIG_FIREWIRE is not set
# CONFIG_IEEE1394 is not set
#
@ -594,24 +633,7 @@ CONFIG_NETDEVICES=y
# ARCnet devices
#
# CONFIG_ARCNET is not set
#
# PHY device support
#
CONFIG_PHYLIB=y
#
# MII PHY device drivers
#
CONFIG_MARVELL_PHY=y
CONFIG_DAVICOM_PHY=y
CONFIG_QSEMI_PHY=y
CONFIG_LXT_PHY=y
CONFIG_CICADA_PHY=y
CONFIG_VITESSE_PHY=y
CONFIG_SMSC_PHY=y
# CONFIG_BROADCOM_PHY is not set
# CONFIG_FIXED_PHY is not set
# CONFIG_PHYLIB is not set
#
# Ethernet (10 or 100Mbit)
@ -639,35 +661,8 @@ CONFIG_TULIP=y
# CONFIG_ULI526X is not set
# CONFIG_HP100 is not set
# CONFIG_NET_PCI is not set
#
# Ethernet (1000 Mbit)
#
# CONFIG_ACENIC is not set
# CONFIG_DL2K is not set
# CONFIG_E1000 is not set
# CONFIG_NS83820 is not set
# CONFIG_HAMACHI is not set
# CONFIG_YELLOWFIN is not set
# CONFIG_R8169 is not set
# CONFIG_SIS190 is not set
# CONFIG_SKGE is not set
# CONFIG_SKY2 is not set
# CONFIG_SK98LIN is not set
# CONFIG_TIGON3 is not set
# CONFIG_BNX2 is not set
CONFIG_QLA3XXX=y
# CONFIG_ATL1 is not set
#
# Ethernet (10000 Mbit)
#
# CONFIG_CHELSIO_T1 is not set
CONFIG_CHELSIO_T3=y
# CONFIG_IXGB is not set
# CONFIG_S2IO is not set
# CONFIG_MYRI10GE is not set
CONFIG_NETXEN_NIC=y
# CONFIG_NETDEV_1000 is not set
# CONFIG_NETDEV_10000 is not set
#
# Token Ring devices
@ -675,18 +670,16 @@ CONFIG_NETXEN_NIC=y
# CONFIG_TR is not set
#
# Wireless LAN (non-hamradio)
#
# CONFIG_NET_RADIO is not set
#
# Wan interfaces
# Wireless LAN
#
# CONFIG_WLAN_PRE80211 is not set
# CONFIG_WLAN_80211 is not set
# CONFIG_WAN is not set
# CONFIG_FDDI is not set
# CONFIG_HIPPI is not set
# CONFIG_PPP is not set
# CONFIG_SLIP is not set
# CONFIG_NET_FC is not set
# CONFIG_SHAPER is not set
# CONFIG_NETCONSOLE is not set
# CONFIG_NETPOLL is not set
@ -711,10 +704,7 @@ CONFIG_INPUT=y
#
# Userland interfaces
#
CONFIG_INPUT_MOUSEDEV=y
CONFIG_INPUT_MOUSEDEV_PSAUX=y
CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
# CONFIG_INPUT_MOUSEDEV is not set
# CONFIG_INPUT_JOYDEV is not set
# CONFIG_INPUT_TSDEV is not set
# CONFIG_INPUT_EVDEV is not set
@ -726,18 +716,23 @@ CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
# CONFIG_INPUT_KEYBOARD is not set
# CONFIG_INPUT_MOUSE is not set
# CONFIG_INPUT_JOYSTICK is not set
# CONFIG_INPUT_TABLET is not set
# CONFIG_INPUT_TOUCHSCREEN is not set
# CONFIG_INPUT_MISC is not set
CONFIG_INPUT_MISC=y
# CONFIG_INPUT_PCSPKR is not set
CONFIG_INPUT_COBALT_BTNS=y
# CONFIG_INPUT_ATI_REMOTE is not set
# CONFIG_INPUT_ATI_REMOTE2 is not set
# CONFIG_INPUT_KEYSPAN_REMOTE is not set
# CONFIG_INPUT_POWERMATE is not set
# CONFIG_INPUT_YEALINK is not set
# CONFIG_INPUT_UINPUT is not set
CONFIG_INPUT_POLLDEV=y
#
# Hardware I/O ports
#
CONFIG_SERIO=y
# CONFIG_SERIO_I8042 is not set
CONFIG_SERIO_SERPORT=y
# CONFIG_SERIO_PCIPS2 is not set
# CONFIG_SERIO_LIBPS2 is not set
CONFIG_SERIO_RAW=y
# CONFIG_SERIO is not set
# CONFIG_GAMEPORT is not set
#
@ -754,7 +749,7 @@ CONFIG_VT_HW_CONSOLE_BINDING=y
#
CONFIG_SERIAL_8250=y
CONFIG_SERIAL_8250_CONSOLE=y
CONFIG_SERIAL_8250_PCI=y
# CONFIG_SERIAL_8250_PCI is not set
CONFIG_SERIAL_8250_NR_UARTS=4
CONFIG_SERIAL_8250_RUNTIME_UARTS=4
# CONFIG_SERIAL_8250_EXTENDED is not set
@ -773,16 +768,11 @@ CONFIG_LEGACY_PTY_COUNT=256
# IPMI
#
# CONFIG_IPMI_HANDLER is not set
#
# Watchdog Cards
#
# CONFIG_WATCHDOG is not set
# CONFIG_HW_RANDOM is not set
# CONFIG_RTC is not set
# CONFIG_GEN_RTC is not set
CONFIG_COBALT_LCD=y
# CONFIG_DTLK is not set
# CONFIG_R3964 is not set
# CONFIG_APPLICOM is not set
# CONFIG_DRM is not set
@ -792,10 +782,7 @@ CONFIG_COBALT_LCD=y
# TPM devices
#
# CONFIG_TCG_TPM is not set
#
# I2C support
#
CONFIG_DEVPORT=y
# CONFIG_I2C is not set
#
@ -808,12 +795,7 @@ CONFIG_COBALT_LCD=y
# Dallas's 1-wire bus
#
# CONFIG_W1 is not set
#
# Hardware Monitoring support
#
# CONFIG_HWMON is not set
# CONFIG_HWMON_VID is not set
#
# Multifunction device drivers
@ -824,16 +806,19 @@ CONFIG_COBALT_LCD=y
# Multimedia devices
#
# CONFIG_VIDEO_DEV is not set
#
# Digital Video Broadcasting Devices
#
# CONFIG_DVB is not set
# CONFIG_DVB_CORE is not set
# CONFIG_DAB is not set
#
# Graphics support
#
# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
#
# Display device support
#
# CONFIG_DISPLAY_SUPPORT is not set
# CONFIG_VGASTATE is not set
# CONFIG_FB is not set
#
@ -868,10 +853,6 @@ CONFIG_USB_ARCH_HAS_EHCI=y
# USB Gadget Support
#
# CONFIG_USB_GADGET is not set
#
# MMC/SD Card support
#
# CONFIG_MMC is not set
#
@ -912,17 +893,29 @@ CONFIG_RTC_INTF_SYSFS=y
CONFIG_RTC_INTF_PROC=y
CONFIG_RTC_INTF_DEV=y
# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
# CONFIG_RTC_DRV_TEST is not set
#
# RTC drivers
# I2C RTC drivers
#
#
# SPI RTC drivers
#
#
# Platform RTC drivers
#
CONFIG_RTC_DRV_CMOS=y
# CONFIG_RTC_DRV_DS1553 is not set
# CONFIG_RTC_DRV_DS1742 is not set
# CONFIG_RTC_DRV_M48T86 is not set
# CONFIG_RTC_DRV_TEST is not set
# CONFIG_RTC_DRV_V3020 is not set
#
# on-CPU RTC drivers
#
#
# DMA Engine support
#
@ -936,14 +929,6 @@ CONFIG_RTC_DRV_CMOS=y
# DMA Devices
#
#
# Auxiliary Display support
#
#
# Virtualization
#
#
# File systems
#
@ -952,8 +937,13 @@ CONFIG_EXT2_FS_XATTR=y
CONFIG_EXT2_FS_POSIX_ACL=y
CONFIG_EXT2_FS_SECURITY=y
# CONFIG_EXT2_FS_XIP is not set
# CONFIG_EXT3_FS is not set
CONFIG_EXT3_FS=y
CONFIG_EXT3_FS_XATTR=y
CONFIG_EXT3_FS_POSIX_ACL=y
CONFIG_EXT3_FS_SECURITY=y
# CONFIG_EXT4DEV_FS is not set
CONFIG_JBD=y
# CONFIG_JBD_DEBUG is not set
CONFIG_FS_MBCACHE=y
# CONFIG_REISERFS_FS is not set
# CONFIG_JFS_FS is not set
@ -969,7 +959,7 @@ CONFIG_INOTIFY_USER=y
CONFIG_DNOTIFY=y
# CONFIG_AUTOFS_FS is not set
# CONFIG_AUTOFS4_FS is not set
CONFIG_FUSE_FS=y
# CONFIG_FUSE_FS is not set
CONFIG_GENERIC_ACL=y
#
@ -1003,7 +993,6 @@ CONFIG_CONFIGFS_FS=y
#
# CONFIG_ADFS_FS is not set
# CONFIG_AFFS_FS is not set
# CONFIG_ECRYPT_FS is not set
# CONFIG_HFS_FS is not set
# CONFIG_HFSPLUS_FS is not set
# CONFIG_BEFS_FS is not set
@ -1021,13 +1010,23 @@ CONFIG_CONFIGFS_FS=y
# Network File Systems
#
CONFIG_NFS_FS=y
# CONFIG_NFS_V3 is not set
CONFIG_NFS_V3=y
CONFIG_NFS_V3_ACL=y
# CONFIG_NFS_V4 is not set
# CONFIG_NFS_DIRECTIO is not set
# CONFIG_NFSD is not set
CONFIG_NFSD=y
CONFIG_NFSD_V2_ACL=y
CONFIG_NFSD_V3=y
CONFIG_NFSD_V3_ACL=y
# CONFIG_NFSD_V4 is not set
CONFIG_NFSD_TCP=y
CONFIG_LOCKD=y
CONFIG_LOCKD_V4=y
CONFIG_EXPORTFS=y
CONFIG_NFS_ACL_SUPPORT=y
CONFIG_NFS_COMMON=y
CONFIG_SUNRPC=y
# CONFIG_SUNRPC_BIND34 is not set
# CONFIG_RPCSEC_GSS_KRB5 is not set
# CONFIG_RPCSEC_GSS_SPKM3 is not set
# CONFIG_SMB_FS is not set
@ -1051,10 +1050,7 @@ CONFIG_MSDOS_PARTITION=y
#
# Distributed Lock Manager
#
CONFIG_DLM=y
CONFIG_DLM_TCP=y
# CONFIG_DLM_SCTP is not set
# CONFIG_DLM_DEBUG is not set
# CONFIG_DLM is not set
#
# Profiling support
@ -1072,72 +1068,30 @@ CONFIG_ENABLE_MUST_CHECK=y
# CONFIG_DEBUG_FS is not set
# CONFIG_HEADERS_CHECK is not set
# CONFIG_DEBUG_KERNEL is not set
CONFIG_LOG_BUF_SHIFT=14
CONFIG_CROSSCOMPILE=y
CONFIG_CMDLINE=""
#
# Security options
#
CONFIG_KEYS=y
CONFIG_KEYS_DEBUG_PROC_KEYS=y
# CONFIG_KEYS is not set
# CONFIG_SECURITY is not set
#
# Cryptographic options
#
CONFIG_CRYPTO=y
CONFIG_CRYPTO_ALGAPI=y
CONFIG_CRYPTO_BLKCIPHER=y
CONFIG_CRYPTO_HASH=y
CONFIG_CRYPTO_MANAGER=y
CONFIG_CRYPTO_HMAC=y
CONFIG_CRYPTO_XCBC=y
CONFIG_CRYPTO_NULL=y
CONFIG_CRYPTO_MD4=y
CONFIG_CRYPTO_MD5=y
CONFIG_CRYPTO_SHA1=y
CONFIG_CRYPTO_SHA256=y
CONFIG_CRYPTO_SHA512=y
CONFIG_CRYPTO_WP512=y
CONFIG_CRYPTO_TGR192=y
CONFIG_CRYPTO_GF128MUL=y
CONFIG_CRYPTO_ECB=y
CONFIG_CRYPTO_CBC=y
CONFIG_CRYPTO_PCBC=y
CONFIG_CRYPTO_LRW=y
CONFIG_CRYPTO_DES=y
CONFIG_CRYPTO_FCRYPT=y
CONFIG_CRYPTO_BLOWFISH=y
CONFIG_CRYPTO_TWOFISH=y
CONFIG_CRYPTO_TWOFISH_COMMON=y
CONFIG_CRYPTO_SERPENT=y
CONFIG_CRYPTO_AES=y
CONFIG_CRYPTO_CAST5=y
CONFIG_CRYPTO_CAST6=y
CONFIG_CRYPTO_TEA=y
CONFIG_CRYPTO_ARC4=y
CONFIG_CRYPTO_KHAZAD=y
CONFIG_CRYPTO_ANUBIS=y
CONFIG_CRYPTO_DEFLATE=y
CONFIG_CRYPTO_MICHAEL_MIC=y
CONFIG_CRYPTO_CRC32C=y
CONFIG_CRYPTO_CAMELLIA=y
#
# Hardware crypto devices
#
# CONFIG_CRYPTO is not set
#
# Library routines
#
CONFIG_BITREVERSE=y
# CONFIG_CRC_CCITT is not set
CONFIG_CRC16=y
# CONFIG_CRC16 is not set
# CONFIG_CRC_ITU_T is not set
CONFIG_CRC32=y
CONFIG_LIBCRC32C=y
CONFIG_ZLIB_INFLATE=y
CONFIG_ZLIB_DEFLATE=y
CONFIG_PLIST=y
CONFIG_HAS_IOMEM=y
CONFIG_HAS_IOPORT=y
CONFIG_HAS_DMA=y

4
arch/mips/configs/db1000_defconfig
View File

@ -26,9 +26,7 @@ CONFIG_MIPS_DB1000=y
# CONFIG_BASLER_EXCITE is not set
# CONFIG_MIPS_COBALT is not set
# CONFIG_MACH_DECSTATION is not set
# CONFIG_MIPS_EV64120 is not set
# CONFIG_MACH_JAZZ is not set
# CONFIG_LASAT is not set
# CONFIG_MIPS_ATLAS is not set
# CONFIG_MIPS_MALTA is not set
# CONFIG_MIPS_SEAD is not set
@ -36,8 +34,6 @@ CONFIG_MIPS_DB1000=y
# CONFIG_MIPS_SIM is not set
# CONFIG_MOMENCO_JAGUAR_ATX is not set
# CONFIG_MOMENCO_OCELOT is not set
# CONFIG_MOMENCO_OCELOT_3 is not set
# CONFIG_MOMENCO_OCELOT_C is not set
# CONFIG_MOMENCO_OCELOT_G is not set
# CONFIG_MIPS_XXS1500 is not set
# CONFIG_PNX8550_JBS is not set

4
arch/mips/configs/db1100_defconfig
View File

@ -26,9 +26,7 @@ CONFIG_MIPS_DB1100=y
# CONFIG_BASLER_EXCITE is not set
# CONFIG_MIPS_COBALT is not set
# CONFIG_MACH_DECSTATION is not set
# CONFIG_MIPS_EV64120 is not set
# CONFIG_MACH_JAZZ is not set
# CONFIG_LASAT is not set
# CONFIG_MIPS_ATLAS is not set
# CONFIG_MIPS_MALTA is not set
# CONFIG_MIPS_SEAD is not set
@ -36,8 +34,6 @@ CONFIG_MIPS_DB1100=y
# CONFIG_MIPS_SIM is not set
# CONFIG_MOMENCO_JAGUAR_ATX is not set
# CONFIG_MOMENCO_OCELOT is not set
# CONFIG_MOMENCO_OCELOT_3 is not set
# CONFIG_MOMENCO_OCELOT_C is not set
# CONFIG_MOMENCO_OCELOT_G is not set
# CONFIG_MIPS_XXS1500 is not set
# CONFIG_PNX8550_JBS is not set

4
arch/mips/configs/db1200_defconfig
View File

@ -26,9 +26,7 @@ CONFIG_MIPS_DB1200=y
# CONFIG_BASLER_EXCITE is not set
# CONFIG_MIPS_COBALT is not set
# CONFIG_MACH_DECSTATION is not set
# CONFIG_MIPS_EV64120 is not set
# CONFIG_MACH_JAZZ is not set
# CONFIG_LASAT is not set
# CONFIG_MIPS_ATLAS is not set
# CONFIG_MIPS_MALTA is not set
# CONFIG_MIPS_SEAD is not set
@ -36,8 +34,6 @@ CONFIG_MIPS_DB1200=y
# CONFIG_MIPS_SIM is not set
# CONFIG_MOMENCO_JAGUAR_ATX is not set
# CONFIG_MOMENCO_OCELOT is not set
# CONFIG_MOMENCO_OCELOT_3 is not set
# CONFIG_MOMENCO_OCELOT_C is not set
# CONFIG_MOMENCO_OCELOT_G is not set
# CONFIG_MIPS_XXS1500 is not set
# CONFIG_PNX8550_JBS is not set

4
arch/mips/configs/db1500_defconfig
View File

@ -26,9 +26,7 @@ CONFIG_MIPS_DB1500=y
# CONFIG_BASLER_EXCITE is not set
# CONFIG_MIPS_COBALT is not set
# CONFIG_MACH_DECSTATION is not set
# CONFIG_MIPS_EV64120 is not set
# CONFIG_MACH_JAZZ is not set
# CONFIG_LASAT is not set
# CONFIG_MIPS_ATLAS is not set
# CONFIG_MIPS_MALTA is not set
# CONFIG_MIPS_SEAD is not set
@ -36,8 +34,6 @@ CONFIG_MIPS_DB1500=y
# CONFIG_MIPS_SIM is not set
# CONFIG_MOMENCO_JAGUAR_ATX is not set
# CONFIG_MOMENCO_OCELOT is not set
# CONFIG_MOMENCO_OCELOT_3 is not set
# CONFIG_MOMENCO_OCELOT_C is not set
# CONFIG_MOMENCO_OCELOT_G is not set
# CONFIG_MIPS_XXS1500 is not set
# CONFIG_PNX8550_JBS is not set

4
arch/mips/configs/db1550_defconfig
View File

@ -26,9 +26,7 @@ CONFIG_MIPS_DB1550=y
# CONFIG_BASLER_EXCITE is not set
# CONFIG_MIPS_COBALT is not set
# CONFIG_MACH_DECSTATION is not set
# CONFIG_MIPS_EV64120 is not set
# CONFIG_MACH_JAZZ is not set
# CONFIG_LASAT is not set
# CONFIG_MIPS_ATLAS is not set
# CONFIG_MIPS_MALTA is not set
# CONFIG_MIPS_SEAD is not set
@ -36,8 +34,6 @@ CONFIG_MIPS_DB1550=y
# CONFIG_MIPS_SIM is not set
# CONFIG_MOMENCO_JAGUAR_ATX is not set
# CONFIG_MOMENCO_OCELOT is not set
# CONFIG_MOMENCO_OCELOT_3 is not set
# CONFIG_MOMENCO_OCELOT_C is not set
# CONFIG_MOMENCO_OCELOT_G is not set
# CONFIG_MIPS_XXS1500 is not set
# CONFIG_PNX8550_JBS is not set

4
arch/mips/configs/ddb5477_defconfig
View File

@ -25,9 +25,7 @@ CONFIG_ZONE_DMA=y
# CONFIG_BASLER_EXCITE is not set
# CONFIG_MIPS_COBALT is not set
# CONFIG_MACH_DECSTATION is not set
# CONFIG_MIPS_EV64120 is not set
# CONFIG_MACH_JAZZ is not set
# CONFIG_LASAT is not set
# CONFIG_MIPS_ATLAS is not set
# CONFIG_MIPS_MALTA is not set
# CONFIG_MIPS_SEAD is not set
@ -35,8 +33,6 @@ CONFIG_ZONE_DMA=y
# CONFIG_MIPS_SIM is not set
# CONFIG_MOMENCO_JAGUAR_ATX is not set
# CONFIG_MOMENCO_OCELOT is not set
# CONFIG_MOMENCO_OCELOT_3 is not set
# CONFIG_MOMENCO_OCELOT_C is not set
# CONFIG_MOMENCO_OCELOT_G is not set
# CONFIG_MIPS_XXS1500 is not set
# CONFIG_PNX8550_JBS is not set

4
arch/mips/configs/decstation_defconfig
View File

@ -25,9 +25,7 @@ CONFIG_ZONE_DMA=y
# CONFIG_BASLER_EXCITE is not set
# CONFIG_MIPS_COBALT is not set
CONFIG_MACH_DECSTATION=y
# CONFIG_MIPS_EV64120 is not set
# CONFIG_MACH_JAZZ is not set
# CONFIG_LASAT is not set
# CONFIG_MIPS_ATLAS is not set
# CONFIG_MIPS_MALTA is not set
# CONFIG_MIPS_SEAD is not set
@ -35,8 +33,6 @@ CONFIG_MACH_DECSTATION=y
# CONFIG_MIPS_SIM is not set
# CONFIG_MOMENCO_JAGUAR_ATX is not set
# CONFIG_MOMENCO_OCELOT is not set
# CONFIG_MOMENCO_OCELOT_3 is not set
# CONFIG_MOMENCO_OCELOT_C is not set
# CONFIG_MOMENCO_OCELOT_G is not set
# CONFIG_MIPS_XXS1500 is not set
# CONFIG_PNX8550_JBS is not set

4
arch/mips/configs/e55_defconfig
View File

@ -25,9 +25,7 @@ CONFIG_ZONE_DMA=y
# CONFIG_BASLER_EXCITE is not set
# CONFIG_MIPS_COBALT is not set
# CONFIG_MACH_DECSTATION is not set
# CONFIG_MIPS_EV64120 is not set
# CONFIG_MACH_JAZZ is not set
# CONFIG_LASAT is not set
# CONFIG_MIPS_ATLAS is not set
# CONFIG_MIPS_MALTA is not set
# CONFIG_MIPS_SEAD is not set
@ -35,8 +33,6 @@ CONFIG_ZONE_DMA=y
# CONFIG_MIPS_SIM is not set
# CONFIG_MOMENCO_JAGUAR_ATX is not set
# CONFIG_MOMENCO_OCELOT is not set
# CONFIG_MOMENCO_OCELOT_3 is not set
# CONFIG_MOMENCO_OCELOT_C is not set
# CONFIG_MOMENCO_OCELOT_G is not set
# CONFIG_MIPS_XXS1500 is not set
# CONFIG_PNX8550_JBS is not set

4
arch/mips/configs/emma2rh_defconfig
View File

@ -25,9 +25,7 @@ CONFIG_ZONE_DMA=y
# CONFIG_BASLER_EXCITE is not set
# CONFIG_MIPS_COBALT is not set
# CONFIG_MACH_DECSTATION is not set
# CONFIG_MIPS_EV64120 is not set
# CONFIG_MACH_JAZZ is not set
# CONFIG_LASAT is not set
# CONFIG_MIPS_ATLAS is not set
# CONFIG_MIPS_MALTA is not set
# CONFIG_MIPS_SEAD is not set
@ -35,8 +33,6 @@ CONFIG_ZONE_DMA=y
# CONFIG_MIPS_SIM is not set
# CONFIG_MOMENCO_JAGUAR_ATX is not set
# CONFIG_MOMENCO_OCELOT is not set
# CONFIG_MOMENCO_OCELOT_3 is not set
# CONFIG_MOMENCO_OCELOT_C is not set
# CONFIG_MOMENCO_OCELOT_G is not set
# CONFIG_MIPS_XXS1500 is not set
# CONFIG_PNX8550_JBS is not set

985
arch/mips/configs/ev64120_defconfig
View File

@ -1,985 +0,0 @@
#
# Automatically generated make config: don't edit
# Linux kernel version: 2.6.20
# Tue Feb 20 21:47:30 2007
#
CONFIG_MIPS=y
#
# Machine selection
#
CONFIG_ZONE_DMA=y
# CONFIG_MIPS_MTX1 is not set
# CONFIG_MIPS_BOSPORUS is not set
# CONFIG_MIPS_PB1000 is not set
# CONFIG_MIPS_PB1100 is not set
# CONFIG_MIPS_PB1500 is not set
# CONFIG_MIPS_PB1550 is not set
# CONFIG_MIPS_PB1200 is not set
# CONFIG_MIPS_DB1000 is not set
# CONFIG_MIPS_DB1100 is not set
# CONFIG_MIPS_DB1500 is not set
# CONFIG_MIPS_DB1550 is not set
# CONFIG_MIPS_DB1200 is not set
# CONFIG_MIPS_MIRAGE is not set
# CONFIG_BASLER_EXCITE is not set
# CONFIG_MIPS_COBALT is not set
# CONFIG_MACH_DECSTATION is not set
CONFIG_MIPS_EV64120=y
# CONFIG_MACH_JAZZ is not set
# CONFIG_LASAT is not set
# CONFIG_MIPS_ATLAS is not set
# CONFIG_MIPS_MALTA is not set
# CONFIG_MIPS_SEAD is not set
# CONFIG_WR_PPMC is not set
# CONFIG_MIPS_SIM is not set
# CONFIG_MOMENCO_JAGUAR_ATX is not set
# CONFIG_MOMENCO_OCELOT is not set
# CONFIG_MOMENCO_OCELOT_3 is not set
# CONFIG_MOMENCO_OCELOT_C is not set
# CONFIG_MOMENCO_OCELOT_G is not set
# CONFIG_MIPS_XXS1500 is not set
# CONFIG_PNX8550_JBS is not set
# CONFIG_PNX8550_STB810 is not set
# CONFIG_DDB5477 is not set
# CONFIG_MACH_VR41XX is not set
# CONFIG_PMC_YOSEMITE is not set
# CONFIG_QEMU is not set
# CONFIG_MARKEINS is not set
# CONFIG_SGI_IP22 is not set
# CONFIG_SGI_IP27 is not set
# CONFIG_SGI_IP32 is not set
# CONFIG_SIBYTE_BIGSUR is not set
# CONFIG_SIBYTE_SWARM is not set
# CONFIG_SIBYTE_SENTOSA is not set
# CONFIG_SIBYTE_RHONE is not set
# CONFIG_SIBYTE_CARMEL is not set
# CONFIG_SIBYTE_PTSWARM is not set
# CONFIG_SIBYTE_LITTLESUR is not set
# CONFIG_SIBYTE_CRHINE is not set
# CONFIG_SIBYTE_CRHONE is not set
# CONFIG_SNI_RM is not set
# CONFIG_TOSHIBA_JMR3927 is not set
# CONFIG_TOSHIBA_RBTX4927 is not set
# CONFIG_TOSHIBA_RBTX4938 is not set
# CONFIG_EVB_PCI1 is not set
CONFIG_RWSEM_GENERIC_SPINLOCK=y
# CONFIG_ARCH_HAS_ILOG2_U32 is not set
# CONFIG_ARCH_HAS_ILOG2_U64 is not set
CONFIG_GENERIC_FIND_NEXT_BIT=y
CONFIG_GENERIC_HWEIGHT=y
CONFIG_GENERIC_CALIBRATE_DELAY=y
CONFIG_GENERIC_TIME=y
CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
# CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ is not set
CONFIG_DMA_NONCOHERENT=y
CONFIG_DMA_NEED_PCI_MAP_STATE=y
CONFIG_CPU_BIG_ENDIAN=y
# CONFIG_CPU_LITTLE_ENDIAN is not set
CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y
CONFIG_MIPS_GT64120=y
# CONFIG_SYSCLK_75 is not set
# CONFIG_SYSCLK_83 is not set
CONFIG_SYSCLK_100=y
CONFIG_MIPS_L1_CACHE_SHIFT=5
#
# CPU selection
#
# CONFIG_CPU_MIPS32_R1 is not set
# CONFIG_CPU_MIPS32_R2 is not set
# CONFIG_CPU_MIPS64_R1 is not set
# CONFIG_CPU_MIPS64_R2 is not set
# CONFIG_CPU_R3000 is not set
# CONFIG_CPU_TX39XX is not set
# CONFIG_CPU_VR41XX is not set
# CONFIG_CPU_R4300 is not set
# CONFIG_CPU_R4X00 is not set
# CONFIG_CPU_TX49XX is not set
CONFIG_CPU_R5000=y
# CONFIG_CPU_R5432 is not set
# CONFIG_CPU_R6000 is not set
# CONFIG_CPU_NEVADA is not set
# CONFIG_CPU_R8000 is not set
# CONFIG_CPU_R10000 is not set
# CONFIG_CPU_RM7000 is not set
# CONFIG_CPU_RM9000 is not set
# CONFIG_CPU_SB1 is not set
CONFIG_SYS_HAS_CPU_R5000=y
CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
CONFIG_SYS_SUPPORTS_64BIT_KERNEL=y
CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
CONFIG_CPU_SUPPORTS_64BIT_KERNEL=y
#
# Kernel type
#
CONFIG_32BIT=y
# CONFIG_64BIT is not set
CONFIG_PAGE_SIZE_4KB=y
# CONFIG_PAGE_SIZE_8KB is not set
# CONFIG_PAGE_SIZE_16KB is not set
# CONFIG_PAGE_SIZE_64KB is not set
CONFIG_MIPS_MT_DISABLED=y
# CONFIG_MIPS_MT_SMP is not set
# CONFIG_MIPS_MT_SMTC is not set
# CONFIG_MIPS_VPE_LOADER is not set
# CONFIG_64BIT_PHYS_ADDR is not set
CONFIG_CPU_HAS_LLSC=y
CONFIG_CPU_HAS_SYNC=y
CONFIG_GENERIC_HARDIRQS=y
CONFIG_GENERIC_IRQ_PROBE=y
CONFIG_ARCH_FLATMEM_ENABLE=y
CONFIG_SELECT_MEMORY_MODEL=y
CONFIG_FLATMEM_MANUAL=y
# CONFIG_DISCONTIGMEM_MANUAL is not set
# CONFIG_SPARSEMEM_MANUAL is not set
CONFIG_FLATMEM=y
CONFIG_FLAT_NODE_MEM_MAP=y
# CONFIG_SPARSEMEM_STATIC is not set
CONFIG_SPLIT_PTLOCK_CPUS=4
# CONFIG_RESOURCES_64BIT is not set
CONFIG_ZONE_DMA_FLAG=1
# CONFIG_HZ_48 is not set
# CONFIG_HZ_100 is not set
# CONFIG_HZ_128 is not set
# CONFIG_HZ_250 is not set
# CONFIG_HZ_256 is not set
CONFIG_HZ_1000=y
# CONFIG_HZ_1024 is not set
CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
CONFIG_HZ=1000
CONFIG_PREEMPT_NONE=y
# CONFIG_PREEMPT_VOLUNTARY is not set
# CONFIG_PREEMPT is not set
# CONFIG_KEXEC is not set
CONFIG_LOCKDEP_SUPPORT=y
CONFIG_STACKTRACE_SUPPORT=y
CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
#
# Code maturity level options
#
CONFIG_EXPERIMENTAL=y
CONFIG_BROKEN_ON_SMP=y
CONFIG_INIT_ENV_ARG_LIMIT=32
#
# General setup
#
CONFIG_LOCALVERSION=""
CONFIG_LOCALVERSION_AUTO=y
CONFIG_SWAP=y
CONFIG_SYSVIPC=y
# CONFIG_IPC_NS is not set
CONFIG_SYSVIPC_SYSCTL=y
# CONFIG_POSIX_MQUEUE is not set
# CONFIG_BSD_PROCESS_ACCT is not set
# CONFIG_TASKSTATS is not set
# CONFIG_UTS_NS is not set
# CONFIG_AUDIT is not set
# CONFIG_IKCONFIG is not set
CONFIG_SYSFS_DEPRECATED=y
CONFIG_RELAY=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
CONFIG_SYSCTL=y
CONFIG_EMBEDDED=y
CONFIG_SYSCTL_SYSCALL=y
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_EXTRA_PASS is not set
CONFIG_HOTPLUG=y
CONFIG_PRINTK=y
CONFIG_BUG=y
CONFIG_ELF_CORE=y
CONFIG_BASE_FULL=y
CONFIG_FUTEX=y
CONFIG_EPOLL=y
CONFIG_SHMEM=y
CONFIG_SLAB=y
CONFIG_VM_EVENT_COUNTERS=y
CONFIG_RT_MUTEXES=y
# CONFIG_TINY_SHMEM is not set
CONFIG_BASE_SMALL=0
# CONFIG_SLOB is not set
#
# Loadable module support
#
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
# CONFIG_MODULE_FORCE_UNLOAD is not set
CONFIG_MODVERSIONS=y
CONFIG_MODULE_SRCVERSION_ALL=y
# CONFIG_KMOD is not set
#
# Block layer
#
CONFIG_BLOCK=y
# CONFIG_LBD is not set
# CONFIG_BLK_DEV_IO_TRACE is not set
# CONFIG_LSF is not set
#
# IO Schedulers
#
CONFIG_IOSCHED_NOOP=y
CONFIG_IOSCHED_AS=y
CONFIG_IOSCHED_DEADLINE=y
CONFIG_IOSCHED_CFQ=y
CONFIG_DEFAULT_AS=y
# CONFIG_DEFAULT_DEADLINE is not set
# CONFIG_DEFAULT_CFQ is not set
# CONFIG_DEFAULT_NOOP is not set
CONFIG_DEFAULT_IOSCHED="anticipatory"
#
# Bus options (PCI, PCMCIA, EISA, ISA, TC)
#
CONFIG_HW_HAS_PCI=y
CONFIG_PCI=y
CONFIG_MMU=y
#
# PCCARD (PCMCIA/CardBus) support
#
# CONFIG_PCCARD is not set
#
# PCI Hotplug Support
#
# CONFIG_HOTPLUG_PCI is not set
#
# Executable file formats
#
CONFIG_BINFMT_ELF=y
# CONFIG_BINFMT_MISC is not set
CONFIG_TRAD_SIGNALS=y
#
# Power management options
#
CONFIG_PM=y
# CONFIG_PM_LEGACY is not set
# CONFIG_PM_DEBUG is not set
# CONFIG_PM_SYSFS_DEPRECATED is not set
#
# Networking
#
CONFIG_NET=y
#
# Networking options
#
# CONFIG_NETDEBUG is not set
# CONFIG_PACKET is not set
CONFIG_UNIX=y
CONFIG_XFRM=y
CONFIG_XFRM_USER=m
# CONFIG_XFRM_SUB_POLICY is not set
CONFIG_XFRM_MIGRATE=y
CONFIG_NET_KEY=y
CONFIG_NET_KEY_MIGRATE=y
CONFIG_INET=y
# CONFIG_IP_MULTICAST is not set
# CONFIG_IP_ADVANCED_ROUTER is not set
CONFIG_IP_FIB_HASH=y
CONFIG_IP_PNP=y
# CONFIG_IP_PNP_DHCP is not set
# CONFIG_IP_PNP_BOOTP is not set
# CONFIG_IP_PNP_RARP is not set
# CONFIG_NET_IPIP is not set
# CONFIG_NET_IPGRE is not set
# CONFIG_ARPD is not set
# CONFIG_SYN_COOKIES is not set
# CONFIG_INET_AH is not set
# CONFIG_INET_ESP is not set
# CONFIG_INET_IPCOMP is not set
# CONFIG_INET_XFRM_TUNNEL is not set
# CONFIG_INET_TUNNEL is not set
CONFIG_INET_XFRM_MODE_TRANSPORT=m
CONFIG_INET_XFRM_MODE_TUNNEL=m
CONFIG_INET_XFRM_MODE_BEET=m
CONFIG_INET_DIAG=y
CONFIG_INET_TCP_DIAG=y
# CONFIG_TCP_CONG_ADVANCED is not set
CONFIG_TCP_CONG_CUBIC=y
CONFIG_DEFAULT_TCP_CONG="cubic"
CONFIG_TCP_MD5SIG=y
# CONFIG_IPV6 is not set
# CONFIG_INET6_XFRM_TUNNEL is not set
# CONFIG_INET6_TUNNEL is not set
CONFIG_NETWORK_SECMARK=y
# CONFIG_NETFILTER is not set
#
# DCCP Configuration (EXPERIMENTAL)
#
# CONFIG_IP_DCCP is not set
#
# SCTP Configuration (EXPERIMENTAL)
#
# CONFIG_IP_SCTP is not set
#
# TIPC Configuration (EXPERIMENTAL)
#
# CONFIG_TIPC is not set
# CONFIG_ATM is not set
# CONFIG_BRIDGE is not set
# CONFIG_VLAN_8021Q is not set
# CONFIG_DECNET is not set
# CONFIG_LLC2 is not set
# CONFIG_IPX is not set
# CONFIG_ATALK is not set
# CONFIG_X25 is not set
# CONFIG_LAPB is not set
# CONFIG_ECONET is not set
# CONFIG_WAN_ROUTER is not set
#
# QoS and/or fair queueing
#
# CONFIG_NET_SCHED is not set
#
# Network testing
#
# CONFIG_NET_PKTGEN is not set
# CONFIG_HAMRADIO is not set
# CONFIG_IRDA is not set
# CONFIG_BT is not set
CONFIG_IEEE80211=m
# CONFIG_IEEE80211_DEBUG is not set
CONFIG_IEEE80211_CRYPT_WEP=m
CONFIG_IEEE80211_CRYPT_CCMP=m
CONFIG_IEEE80211_SOFTMAC=m
# CONFIG_IEEE80211_SOFTMAC_DEBUG is not set
CONFIG_WIRELESS_EXT=y
#
# Device Drivers
#
#
# Generic Driver Options
#
CONFIG_STANDALONE=y
CONFIG_PREVENT_FIRMWARE_BUILD=y
CONFIG_FW_LOADER=m
# CONFIG_SYS_HYPERVISOR is not set
#
# Connector - unified userspace <-> kernelspace linker
#
CONFIG_CONNECTOR=m
#
# Memory Technology Devices (MTD)
#
# CONFIG_MTD is not set
#
# Parallel port support
#
# CONFIG_PARPORT is not set
#
# Plug and Play support
#
# CONFIG_PNPACPI is not set
#
# Block devices
#
# CONFIG_BLK_CPQ_DA is not set
# CONFIG_BLK_CPQ_CISS_DA is not set
# CONFIG_BLK_DEV_DAC960 is not set
# CONFIG_BLK_DEV_UMEM is not set
# CONFIG_BLK_DEV_COW_COMMON is not set
# CONFIG_BLK_DEV_LOOP is not set
# CONFIG_BLK_DEV_NBD is not set
# CONFIG_BLK_DEV_SX8 is not set
# CONFIG_BLK_DEV_RAM is not set
# CONFIG_BLK_DEV_INITRD is not set
CONFIG_CDROM_PKTCDVD=m
CONFIG_CDROM_PKTCDVD_BUFFERS=8
# CONFIG_CDROM_PKTCDVD_WCACHE is not set
CONFIG_ATA_OVER_ETH=m
#
# Misc devices
#
CONFIG_SGI_IOC4=m
# CONFIG_TIFM_CORE is not set
#
# ATA/ATAPI/MFM/RLL support
#
# CONFIG_IDE is not set
#
# SCSI device support
#
CONFIG_RAID_ATTRS=m
# CONFIG_SCSI is not set
# CONFIG_SCSI_NETLINK is not set
#
# Serial ATA (prod) and Parallel ATA (experimental) drivers
#
# CONFIG_ATA is not set
#
# Multi-device support (RAID and LVM)
#
# CONFIG_MD is not set
#
# Fusion MPT device support
#
# CONFIG_FUSION is not set
#
# IEEE 1394 (FireWire) support
#
# CONFIG_IEEE1394 is not set
#
# I2O device support
#
# CONFIG_I2O is not set
#
# Network device support
#
CONFIG_NETDEVICES=y
# CONFIG_DUMMY is not set
# CONFIG_BONDING is not set
# CONFIG_EQUALIZER is not set
# CONFIG_TUN is not set
#
# ARCnet devices
#
# CONFIG_ARCNET is not set
#
# PHY device support
#
CONFIG_PHYLIB=m
#
# MII PHY device drivers
#
CONFIG_MARVELL_PHY=m
CONFIG_DAVICOM_PHY=m
CONFIG_QSEMI_PHY=m
CONFIG_LXT_PHY=m
CONFIG_CICADA_PHY=m
CONFIG_VITESSE_PHY=m
CONFIG_SMSC_PHY=m
# CONFIG_BROADCOM_PHY is not set
# CONFIG_FIXED_PHY is not set
#
# Ethernet (10 or 100Mbit)
#
CONFIG_NET_ETHERNET=y
# CONFIG_MII is not set
# CONFIG_HAPPYMEAL is not set
# CONFIG_SUNGEM is not set
# CONFIG_CASSINI is not set
# CONFIG_NET_VENDOR_3COM is not set
# CONFIG_DM9000 is not set
#
# Tulip family network device support
#
# CONFIG_NET_TULIP is not set
# CONFIG_HP100 is not set
# CONFIG_NET_PCI is not set
#
# Ethernet (1000 Mbit)
#
# CONFIG_ACENIC is not set
# CONFIG_DL2K is not set
# CONFIG_E1000 is not set
# CONFIG_NS83820 is not set
# CONFIG_HAMACHI is not set
# CONFIG_YELLOWFIN is not set
# CONFIG_R8169 is not set
# CONFIG_SIS190 is not set
# CONFIG_SKGE is not set
# CONFIG_SKY2 is not set
# CONFIG_SK98LIN is not set
# CONFIG_TIGON3 is not set
# CONFIG_BNX2 is not set
CONFIG_QLA3XXX=m
# CONFIG_ATL1 is not set
#
# Ethernet (10000 Mbit)
#
# CONFIG_CHELSIO_T1 is not set
CONFIG_CHELSIO_T3=m
# CONFIG_IXGB is not set
# CONFIG_S2IO is not set
# CONFIG_MYRI10GE is not set
CONFIG_NETXEN_NIC=m
#
# Token Ring devices
#
# CONFIG_TR is not set
#
# Wireless LAN (non-hamradio)
#
# CONFIG_NET_RADIO is not set
#
# Wan interfaces
#
# CONFIG_WAN is not set
# CONFIG_FDDI is not set
# CONFIG_HIPPI is not set
CONFIG_PPP=y
# CONFIG_PPP_MULTILINK is not set
# CONFIG_PPP_FILTER is not set
CONFIG_PPP_ASYNC=y
# CONFIG_PPP_SYNC_TTY is not set
# CONFIG_PPP_DEFLATE is not set
# CONFIG_PPP_BSDCOMP is not set
CONFIG_PPP_MPPE=m
# CONFIG_PPPOE is not set
# CONFIG_SLIP is not set
CONFIG_SLHC=y
# CONFIG_SHAPER is not set
# CONFIG_NETCONSOLE is not set
# CONFIG_NETPOLL is not set
# CONFIG_NET_POLL_CONTROLLER is not set
#
# ISDN subsystem
#
# CONFIG_ISDN is not set
#
# Telephony Support
#
# CONFIG_PHONE is not set
#
# Input device support
#
CONFIG_INPUT=y
# CONFIG_INPUT_FF_MEMLESS is not set
#
# Userland interfaces
#
CONFIG_INPUT_MOUSEDEV=y
CONFIG_INPUT_MOUSEDEV_PSAUX=y
CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
# CONFIG_INPUT_JOYDEV is not set
# CONFIG_INPUT_TSDEV is not set
# CONFIG_INPUT_EVDEV is not set
# CONFIG_INPUT_EVBUG is not set
#
# Input Device Drivers
#
# CONFIG_INPUT_KEYBOARD is not set
# CONFIG_INPUT_MOUSE is not set
# CONFIG_INPUT_JOYSTICK is not set
# CONFIG_INPUT_TOUCHSCREEN is not set
# CONFIG_INPUT_MISC is not set
#
# Hardware I/O ports
#
CONFIG_SERIO=y
# CONFIG_SERIO_I8042 is not set
CONFIG_SERIO_SERPORT=y
# CONFIG_SERIO_PCIPS2 is not set
# CONFIG_SERIO_LIBPS2 is not set
CONFIG_SERIO_RAW=m
# CONFIG_GAMEPORT is not set
#
# Character devices
#
CONFIG_VT=y
CONFIG_VT_CONSOLE=y
CONFIG_HW_CONSOLE=y
CONFIG_VT_HW_CONSOLE_BINDING=y
# CONFIG_SERIAL_NONSTANDARD is not set
#
# Serial drivers
#
CONFIG_SERIAL_8250=y
CONFIG_SERIAL_8250_CONSOLE=y
CONFIG_SERIAL_8250_PCI=y
CONFIG_SERIAL_8250_NR_UARTS=4
CONFIG_SERIAL_8250_RUNTIME_UARTS=4
# CONFIG_SERIAL_8250_EXTENDED is not set
#
# Non-8250 serial port support
#
CONFIG_SERIAL_CORE=y
CONFIG_SERIAL_CORE_CONSOLE=y
# CONFIG_SERIAL_JSM is not set
CONFIG_UNIX98_PTYS=y
CONFIG_LEGACY_PTYS=y
CONFIG_LEGACY_PTY_COUNT=256
#
# IPMI
#
# CONFIG_IPMI_HANDLER is not set
#
# Watchdog Cards
#
# CONFIG_WATCHDOG is not set
# CONFIG_HW_RANDOM is not set
# CONFIG_RTC is not set
# CONFIG_GEN_RTC is not set
# CONFIG_DTLK is not set
# CONFIG_R3964 is not set
# CONFIG_APPLICOM is not set
# CONFIG_DRM is not set
# CONFIG_RAW_DRIVER is not set
#
# TPM devices
#
# CONFIG_TCG_TPM is not set
#
# I2C support
#
# CONFIG_I2C is not set
#
# SPI support
#
# CONFIG_SPI is not set
# CONFIG_SPI_MASTER is not set
#
# Dallas's 1-wire bus
#
# CONFIG_W1 is not set
#
# Hardware Monitoring support
#
# CONFIG_HWMON is not set
# CONFIG_HWMON_VID is not set
#
# Multimedia devices
#
# CONFIG_VIDEO_DEV is not set
#
# Digital Video Broadcasting Devices
#
# CONFIG_DVB is not set
#
# Graphics support
#
# CONFIG_FIRMWARE_EDID is not set
# CONFIG_FB is not set
#
# Console display driver support
#
# CONFIG_VGA_CONSOLE is not set
CONFIG_DUMMY_CONSOLE=y
# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
#
# Sound
#
# CONFIG_SOUND is not set
#
# HID Devices
#
# CONFIG_HID is not set
#
# USB support
#
CONFIG_USB_ARCH_HAS_HCD=y
CONFIG_USB_ARCH_HAS_OHCI=y
CONFIG_USB_ARCH_HAS_EHCI=y
# CONFIG_USB is not set
#
# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
#
#
# USB Gadget Support
#
# CONFIG_USB_GADGET is not set
#
# MMC/SD Card support
#
# CONFIG_MMC is not set
#
# LED devices
#
# CONFIG_NEW_LEDS is not set
#
# LED drivers
#
#
# LED Triggers
#
#
# InfiniBand support
#
# CONFIG_INFINIBAND is not set
#
# EDAC - error detection and reporting (RAS) (EXPERIMENTAL)
#
#
# Real Time Clock
#
# CONFIG_RTC_CLASS is not set
#
# DMA Engine support
#
# CONFIG_DMA_ENGINE is not set
#
# DMA Clients
#
#
# DMA Devices
#
#
# Auxiliary Display support
#
#
# Virtualization
#
#
# File systems
#
CONFIG_EXT2_FS=y
# CONFIG_EXT2_FS_XATTR is not set
# CONFIG_EXT2_FS_XIP is not set
# CONFIG_EXT3_FS is not set
# CONFIG_EXT4DEV_FS is not set
# CONFIG_REISERFS_FS is not set
# CONFIG_JFS_FS is not set
# CONFIG_FS_POSIX_ACL is not set
# CONFIG_XFS_FS is not set
# CONFIG_GFS2_FS is not set
# CONFIG_OCFS2_FS is not set
# CONFIG_MINIX_FS is not set
# CONFIG_ROMFS_FS is not set
CONFIG_INOTIFY=y
CONFIG_INOTIFY_USER=y
# CONFIG_QUOTA is not set
CONFIG_DNOTIFY=y
# CONFIG_AUTOFS_FS is not set
# CONFIG_AUTOFS4_FS is not set
CONFIG_FUSE_FS=m
#
# CD-ROM/DVD Filesystems
#
# CONFIG_ISO9660_FS is not set
# CONFIG_UDF_FS is not set
#
# DOS/FAT/NT Filesystems
#
# CONFIG_MSDOS_FS is not set
# CONFIG_VFAT_FS is not set
# CONFIG_NTFS_FS is not set
#
# Pseudo filesystems
#
CONFIG_PROC_FS=y
CONFIG_PROC_KCORE=y
CONFIG_PROC_SYSCTL=y
CONFIG_SYSFS=y
# CONFIG_TMPFS is not set
# CONFIG_HUGETLB_PAGE is not set
CONFIG_RAMFS=y
CONFIG_CONFIGFS_FS=m
#
# Miscellaneous filesystems
#
# CONFIG_ADFS_FS is not set
# CONFIG_AFFS_FS is not set
# CONFIG_ECRYPT_FS is not set
# CONFIG_HFS_FS is not set
# CONFIG_HFSPLUS_FS is not set
# CONFIG_BEFS_FS is not set
# CONFIG_BFS_FS is not set
# CONFIG_EFS_FS is not set
# CONFIG_CRAMFS is not set
# CONFIG_VXFS_FS is not set
# CONFIG_HPFS_FS is not set
# CONFIG_QNX4FS_FS is not set
# CONFIG_SYSV_FS is not set
# CONFIG_UFS_FS is not set
#
# Network File Systems
#
CONFIG_NFS_FS=y
# CONFIG_NFS_V3 is not set
# CONFIG_NFS_V4 is not set
# CONFIG_NFS_DIRECTIO is not set
# CONFIG_NFSD is not set
CONFIG_ROOT_NFS=y
CONFIG_LOCKD=y
CONFIG_NFS_COMMON=y
CONFIG_SUNRPC=y
# CONFIG_RPCSEC_GSS_KRB5 is not set
# CONFIG_RPCSEC_GSS_SPKM3 is not set
# CONFIG_SMB_FS is not set
# CONFIG_CIFS is not set
# CONFIG_NCP_FS is not set
# CONFIG_CODA_FS is not set
# CONFIG_AFS_FS is not set
# CONFIG_9P_FS is not set
#
# Partition Types
#
# CONFIG_PARTITION_ADVANCED is not set
CONFIG_MSDOS_PARTITION=y
#
# Native Language Support
#
# CONFIG_NLS is not set
#
# Distributed Lock Manager
#
CONFIG_DLM=m
CONFIG_DLM_TCP=y
# CONFIG_DLM_SCTP is not set
# CONFIG_DLM_DEBUG is not set
#
# Profiling support
#
# CONFIG_PROFILING is not set
#
# Kernel hacking
#
CONFIG_TRACE_IRQFLAGS_SUPPORT=y
# CONFIG_PRINTK_TIME is not set
CONFIG_ENABLE_MUST_CHECK=y
# CONFIG_MAGIC_SYSRQ is not set
# CONFIG_UNUSED_SYMBOLS is not set
# CONFIG_DEBUG_FS is not set
# CONFIG_HEADERS_CHECK is not set
# CONFIG_DEBUG_KERNEL is not set
CONFIG_LOG_BUF_SHIFT=14
CONFIG_CROSSCOMPILE=y
CONFIG_CMDLINE="console=ttyS0,115200 root=/dev/nfs rw nfsroot=192.168.1.1:/mnt/disk2/fs.gal ip=192.168.1.211:192.168.1.1:::gt::"
CONFIG_SYS_SUPPORTS_KGDB=y
#
# Security options
#
CONFIG_KEYS=y
CONFIG_KEYS_DEBUG_PROC_KEYS=y
# CONFIG_SECURITY is not set
#
# Cryptographic options
#
CONFIG_CRYPTO=y
CONFIG_CRYPTO_ALGAPI=y
CONFIG_CRYPTO_BLKCIPHER=m
CONFIG_CRYPTO_HASH=y
CONFIG_CRYPTO_MANAGER=y
CONFIG_CRYPTO_HMAC=y
CONFIG_CRYPTO_XCBC=m
CONFIG_CRYPTO_NULL=m
CONFIG_CRYPTO_MD4=m
CONFIG_CRYPTO_MD5=y
CONFIG_CRYPTO_SHA1=m
CONFIG_CRYPTO_SHA256=m
CONFIG_CRYPTO_SHA512=m
CONFIG_CRYPTO_WP512=m
CONFIG_CRYPTO_TGR192=m
CONFIG_CRYPTO_GF128MUL=m
CONFIG_CRYPTO_ECB=m
CONFIG_CRYPTO_CBC=m
CONFIG_CRYPTO_PCBC=m
CONFIG_CRYPTO_LRW=m
CONFIG_CRYPTO_DES=m
CONFIG_CRYPTO_FCRYPT=m
CONFIG_CRYPTO_BLOWFISH=m
CONFIG_CRYPTO_TWOFISH=m
CONFIG_CRYPTO_TWOFISH_COMMON=m
CONFIG_CRYPTO_SERPENT=m
CONFIG_CRYPTO_AES=m
CONFIG_CRYPTO_CAST5=m
CONFIG_CRYPTO_CAST6=m
CONFIG_CRYPTO_TEA=m
CONFIG_CRYPTO_ARC4=m
CONFIG_CRYPTO_KHAZAD=m
CONFIG_CRYPTO_ANUBIS=m
CONFIG_CRYPTO_DEFLATE=m
CONFIG_CRYPTO_MICHAEL_MIC=m
CONFIG_CRYPTO_CRC32C=m
CONFIG_CRYPTO_CAMELLIA=m
# CONFIG_CRYPTO_TEST is not set
#
# Hardware crypto devices
#
#
# Library routines
#
CONFIG_BITREVERSE=m
CONFIG_CRC_CCITT=y
CONFIG_CRC16=m
CONFIG_CRC32=m
CONFIG_LIBCRC32C=m
CONFIG_ZLIB_INFLATE=m
CONFIG_ZLIB_DEFLATE=m
CONFIG_PLIST=y
CONFIG_HAS_IOMEM=y
CONFIG_HAS_IOPORT=y

4
arch/mips/configs/excite_defconfig
View File

@ -26,9 +26,7 @@ CONFIG_BASLER_EXCITE=y
# CONFIG_BASLER_EXCITE_PROTOTYPE is not set
# CONFIG_MIPS_COBALT is not set
# CONFIG_MACH_DECSTATION is not set
# CONFIG_MIPS_EV64120 is not set
# CONFIG_MACH_JAZZ is not set
# CONFIG_LASAT is not set
# CONFIG_MIPS_ATLAS is not set
# CONFIG_MIPS_MALTA is not set
# CONFIG_MIPS_SEAD is not set
@ -36,8 +34,6 @@ CONFIG_BASLER_EXCITE=y
# CONFIG_MIPS_SIM is not set
# CONFIG_MOMENCO_JAGUAR_ATX is not set
# CONFIG_MOMENCO_OCELOT is not set
# CONFIG_MOMENCO_OCELOT_3 is not set
# CONFIG_MOMENCO_OCELOT_C is not set
# CONFIG_MOMENCO_OCELOT_G is not set
# CONFIG_MIPS_XXS1500 is not set
# CONFIG_PNX8550_JBS is not set

1765
arch/mips/configs/fulong_defconfig Normal file
View File

File diff suppressed because it is too large Load Diff

4
arch/mips/configs/ip22_defconfig
View File

@ -25,9 +25,7 @@ CONFIG_ZONE_DMA=y
# CONFIG_BASLER_EXCITE is not set
# CONFIG_MIPS_COBALT is not set
# CONFIG_MACH_DECSTATION is not set
# CONFIG_MIPS_EV64120 is not set
# CONFIG_MACH_JAZZ is not set
# CONFIG_LASAT is not set
# CONFIG_MIPS_ATLAS is not set
# CONFIG_MIPS_MALTA is not set
# CONFIG_MIPS_SEAD is not set
@ -35,8 +33,6 @@ CONFIG_ZONE_DMA=y
# CONFIG_MIPS_SIM is not set
# CONFIG_MOMENCO_JAGUAR_ATX is not set
# CONFIG_MOMENCO_OCELOT is not set
# CONFIG_MOMENCO_OCELOT_3 is not set
# CONFIG_MOMENCO_OCELOT_C is not set
# CONFIG_MOMENCO_OCELOT_G is not set
# CONFIG_MIPS_XXS1500 is not set
# CONFIG_PNX8550_JBS is not set

4
arch/mips/configs/ip27_defconfig
View File

@ -25,9 +25,7 @@ CONFIG_ZONE_DMA=y
# CONFIG_BASLER_EXCITE is not set
# CONFIG_MIPS_COBALT is not set
# CONFIG_MACH_DECSTATION is not set
# CONFIG_MIPS_EV64120 is not set
# CONFIG_MACH_JAZZ is not set
# CONFIG_LASAT is not set
# CONFIG_MIPS_ATLAS is not set
# CONFIG_MIPS_MALTA is not set
# CONFIG_MIPS_SEAD is not set
@ -35,8 +33,6 @@ CONFIG_ZONE_DMA=y
# CONFIG_MIPS_SIM is not set
# CONFIG_MOMENCO_JAGUAR_ATX is not set
# CONFIG_MOMENCO_OCELOT is not set
# CONFIG_MOMENCO_OCELOT_3 is not set
# CONFIG_MOMENCO_OCELOT_C is not set
# CONFIG_MOMENCO_OCELOT_G is not set
# CONFIG_MIPS_XXS1500 is not set
# CONFIG_PNX8550_JBS is not set

4
arch/mips/configs/ip32_defconfig
View File

@ -25,9 +25,7 @@ CONFIG_ZONE_DMA=y
# CONFIG_BASLER_EXCITE is not set
# CONFIG_MIPS_COBALT is not set
# CONFIG_MACH_DECSTATION is not set
# CONFIG_MIPS_EV64120 is not set
# CONFIG_MACH_JAZZ is not set
# CONFIG_LASAT is not set
# CONFIG_MIPS_ATLAS is not set
# CONFIG_MIPS_MALTA is not set
# CONFIG_MIPS_SEAD is not set
@ -35,8 +33,6 @@ CONFIG_ZONE_DMA=y
# CONFIG_MIPS_SIM is not set
# CONFIG_MOMENCO_JAGUAR_ATX is not set
# CONFIG_MOMENCO_OCELOT is not set
# CONFIG_MOMENCO_OCELOT_3 is not set
# CONFIG_MOMENCO_OCELOT_C is not set
# CONFIG_MOMENCO_OCELOT_G is not set
# CONFIG_MIPS_XXS1500 is not set
# CONFIG_PNX8550_JBS is not set

4
arch/mips/configs/jazz_defconfig
View File

@ -25,9 +25,7 @@ CONFIG_ZONE_DMA=y
# CONFIG_BASLER_EXCITE is not set
# CONFIG_MIPS_COBALT is not set
# CONFIG_MACH_DECSTATION is not set
# CONFIG_MIPS_EV64120 is not set
CONFIG_MACH_JAZZ=y
# CONFIG_LASAT is not set
# CONFIG_MIPS_ATLAS is not set
# CONFIG_MIPS_MALTA is not set
# CONFIG_MIPS_SEAD is not set
@ -35,8 +33,6 @@ CONFIG_MACH_JAZZ=y
# CONFIG_MIPS_SIM is not set
# CONFIG_MOMENCO_JAGUAR_ATX is not set
# CONFIG_MOMENCO_OCELOT is not set
# CONFIG_MOMENCO_OCELOT_3 is not set
# CONFIG_MOMENCO_OCELOT_C is not set
# CONFIG_MOMENCO_OCELOT_G is not set
# CONFIG_MIPS_XXS1500 is not set
# CONFIG_PNX8550_JBS is not set

4
arch/mips/configs/jmr3927_defconfig
View File

@ -25,9 +25,7 @@ CONFIG_ZONE_DMA=y
# CONFIG_BASLER_EXCITE is not set
# CONFIG_MIPS_COBALT is not set
# CONFIG_MACH_DECSTATION is not set
# CONFIG_MIPS_EV64120 is not set
# CONFIG_MACH_JAZZ is not set
# CONFIG_LASAT is not set
# CONFIG_MIPS_ATLAS is not set
# CONFIG_MIPS_MALTA is not set
# CONFIG_MIPS_SEAD is not set
@ -35,8 +33,6 @@ CONFIG_ZONE_DMA=y
# CONFIG_MIPS_SIM is not set
# CONFIG_MOMENCO_JAGUAR_ATX is not set
# CONFIG_MOMENCO_OCELOT is not set
# CONFIG_MOMENCO_OCELOT_3 is not set
# CONFIG_MOMENCO_OCELOT_C is not set
# CONFIG_MOMENCO_OCELOT_G is not set
# CONFIG_MIPS_XXS1500 is not set
# CONFIG_PNX8550_JBS is not set

1118
arch/mips/configs/lasat200_defconfig
View File

File diff suppressed because it is too large Load Diff

4
arch/mips/configs/malta_defconfig
View File

@ -25,9 +25,7 @@ CONFIG_ZONE_DMA=y
# CONFIG_BASLER_EXCITE is not set
# CONFIG_MIPS_COBALT is not set
# CONFIG_MACH_DECSTATION is not set
# CONFIG_MIPS_EV64120 is not set
# CONFIG_MACH_JAZZ is not set
# CONFIG_LASAT is not set
# CONFIG_MIPS_ATLAS is not set
CONFIG_MIPS_MALTA=y
# CONFIG_MIPS_SEAD is not set
@ -35,8 +33,6 @@ CONFIG_MIPS_MALTA=y
# CONFIG_MIPS_SIM is not set
# CONFIG_MOMENCO_JAGUAR_ATX is not set
# CONFIG_MOMENCO_OCELOT is not set
# CONFIG_MOMENCO_OCELOT_3 is not set
# CONFIG_MOMENCO_OCELOT_C is not set
# CONFIG_MOMENCO_OCELOT_G is not set
# CONFIG_MIPS_XXS1500 is not set
# CONFIG_PNX8550_JBS is not set

37
arch/mips/configs/mipssim_defconfig
View File

@ -25,9 +25,7 @@ CONFIG_ZONE_DMA=y
# CONFIG_BASLER_EXCITE is not set
# CONFIG_MIPS_COBALT is not set
# CONFIG_MACH_DECSTATION is not set
# CONFIG_MIPS_EV64120 is not set
# CONFIG_MACH_JAZZ is not set
# CONFIG_LASAT is not set
# CONFIG_MIPS_ATLAS is not set
# CONFIG_MIPS_MALTA is not set
# CONFIG_MIPS_SEAD is not set
@ -35,8 +33,6 @@ CONFIG_ZONE_DMA=y
CONFIG_MIPS_SIM=y
# CONFIG_MOMENCO_JAGUAR_ATX is not set
# CONFIG_MOMENCO_OCELOT is not set
# CONFIG_MOMENCO_OCELOT_3 is not set
# CONFIG_MOMENCO_OCELOT_C is not set
# CONFIG_MOMENCO_OCELOT_G is not set
# CONFIG_MIPS_XXS1500 is not set
# CONFIG_PNX8550_JBS is not set
@ -496,36 +492,23 @@ CONFIG_NETDEVICES=y
# CONFIG_BONDING is not set
# CONFIG_EQUALIZER is not set
# CONFIG_TUN is not set
#
# PHY device support
#
# CONFIG_PHYLIB is not set
#
# Ethernet (10 or 100Mbit)
#
# CONFIG_NET_ETHERNET is not set
CONFIG_NET_ETHERNET=y
# CONFIG_MII is not set
CONFIG_MIPS_SIM_NET=y
# CONFIG_DM9000 is not set
# CONFIG_NETDEV_1000 is not set
# CONFIG_NETDEV_10000 is not set
#
# Ethernet (1000 Mbit)
#
#
# Ethernet (10000 Mbit)
#
#
# Token Ring devices
#
#
# Wireless LAN (non-hamradio)
#
# CONFIG_NET_RADIO is not set
#
# Wan interfaces
# Wireless LAN
#
# CONFIG_WLAN_PRE80211 is not set
# CONFIG_WLAN_80211 is not set
# CONFIG_WAN is not set
# CONFIG_PPP is not set
# CONFIG_SLIP is not set

4
arch/mips/configs/mpc30x_defconfig
View File

@ -25,9 +25,7 @@ CONFIG_ZONE_DMA=y
# CONFIG_BASLER_EXCITE is not set
# CONFIG_MIPS_COBALT is not set
# CONFIG_MACH_DECSTATION is not set
# CONFIG_MIPS_EV64120 is not set
# CONFIG_MACH_JAZZ is not set
# CONFIG_LASAT is not set
# CONFIG_MIPS_ATLAS is not set
# CONFIG_MIPS_MALTA is not set
# CONFIG_MIPS_SEAD is not set
@ -35,8 +33,6 @@ CONFIG_ZONE_DMA=y
# CONFIG_MIPS_SIM is not set
# CONFIG_MOMENCO_JAGUAR_ATX is not set
# CONFIG_MOMENCO_OCELOT is not set
# CONFIG_MOMENCO_OCELOT_3 is not set
# CONFIG_MOMENCO_OCELOT_C is not set
# CONFIG_MOMENCO_OCELOT_G is not set
# CONFIG_MIPS_XXS1500 is not set
# CONFIG_PNX8550_JBS is not set

972
arch/mips/configs/ocelot_3_defconfig → arch/mips/configs/msp71xx_defconfig
View File

File diff suppressed because it is too large Load Diff

982
arch/mips/configs/ocelot_c_defconfig
View File

@ -1,982 +0,0 @@
#
# Automatically generated make config: don't edit
# Linux kernel version: 2.6.20
# Tue Feb 20 21:47:36 2007
#
CONFIG_MIPS=y
#
# Machine selection
#
CONFIG_ZONE_DMA=y
# CONFIG_MIPS_MTX1 is not set
# CONFIG_MIPS_BOSPORUS is not set
# CONFIG_MIPS_PB1000 is not set
# CONFIG_MIPS_PB1100 is not set
# CONFIG_MIPS_PB1500 is not set
# CONFIG_MIPS_PB1550 is not set
# CONFIG_MIPS_PB1200 is not set
# CONFIG_MIPS_DB1000 is not set
# CONFIG_MIPS_DB1100 is not set
# CONFIG_MIPS_DB1500 is not set
# CONFIG_MIPS_DB1550 is not set
# CONFIG_MIPS_DB1200 is not set
# CONFIG_MIPS_MIRAGE is not set
# CONFIG_BASLER_EXCITE is not set
# CONFIG_MIPS_COBALT is not set
# CONFIG_MACH_DECSTATION is not set
# CONFIG_MIPS_EV64120 is not set
# CONFIG_MACH_JAZZ is not set
# CONFIG_LASAT is not set
# CONFIG_MIPS_ATLAS is not set
# CONFIG_MIPS_MALTA is not set
# CONFIG_MIPS_SEAD is not set
# CONFIG_WR_PPMC is not set
# CONFIG_MIPS_SIM is not set
# CONFIG_MOMENCO_JAGUAR_ATX is not set
# CONFIG_MOMENCO_OCELOT is not set
# CONFIG_MOMENCO_OCELOT_3 is not set
CONFIG_MOMENCO_OCELOT_C=y
# CONFIG_MOMENCO_OCELOT_G is not set
# CONFIG_MIPS_XXS1500 is not set
# CONFIG_PNX8550_JBS is not set
# CONFIG_PNX8550_STB810 is not set
# CONFIG_DDB5477 is not set
# CONFIG_MACH_VR41XX is not set
# CONFIG_PMC_YOSEMITE is not set
# CONFIG_QEMU is not set
# CONFIG_MARKEINS is not set
# CONFIG_SGI_IP22 is not set
# CONFIG_SGI_IP27 is not set
# CONFIG_SGI_IP32 is not set
# CONFIG_SIBYTE_BIGSUR is not set
# CONFIG_SIBYTE_SWARM is not set
# CONFIG_SIBYTE_SENTOSA is not set
# CONFIG_SIBYTE_RHONE is not set
# CONFIG_SIBYTE_CARMEL is not set
# CONFIG_SIBYTE_PTSWARM is not set
# CONFIG_SIBYTE_LITTLESUR is not set
# CONFIG_SIBYTE_CRHINE is not set
# CONFIG_SIBYTE_CRHONE is not set
# CONFIG_SNI_RM is not set
# CONFIG_TOSHIBA_JMR3927 is not set
# CONFIG_TOSHIBA_RBTX4927 is not set
# CONFIG_TOSHIBA_RBTX4938 is not set
CONFIG_RWSEM_GENERIC_SPINLOCK=y
# CONFIG_ARCH_HAS_ILOG2_U32 is not set
# CONFIG_ARCH_HAS_ILOG2_U64 is not set
CONFIG_GENERIC_FIND_NEXT_BIT=y
CONFIG_GENERIC_HWEIGHT=y
CONFIG_GENERIC_CALIBRATE_DELAY=y
CONFIG_GENERIC_TIME=y
CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
CONFIG_DMA_NONCOHERENT=y
CONFIG_DMA_NEED_PCI_MAP_STATE=y
CONFIG_CPU_BIG_ENDIAN=y
# CONFIG_CPU_LITTLE_ENDIAN is not set
CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y
CONFIG_IRQ_CPU=y
CONFIG_IRQ_MV64340=y
CONFIG_PCI_MARVELL=y
CONFIG_SWAP_IO_SPACE=y
CONFIG_MIPS_L1_CACHE_SHIFT=5
#
# CPU selection
#
# CONFIG_CPU_MIPS32_R1 is not set
# CONFIG_CPU_MIPS32_R2 is not set
# CONFIG_CPU_MIPS64_R1 is not set
# CONFIG_CPU_MIPS64_R2 is not set
# CONFIG_CPU_R3000 is not set
# CONFIG_CPU_TX39XX is not set
# CONFIG_CPU_VR41XX is not set
# CONFIG_CPU_R4300 is not set
# CONFIG_CPU_R4X00 is not set
# CONFIG_CPU_TX49XX is not set
# CONFIG_CPU_R5000 is not set
# CONFIG_CPU_R5432 is not set
# CONFIG_CPU_R6000 is not set
# CONFIG_CPU_NEVADA is not set
# CONFIG_CPU_R8000 is not set
# CONFIG_CPU_R10000 is not set
CONFIG_CPU_RM7000=y
# CONFIG_CPU_RM9000 is not set
# CONFIG_CPU_SB1 is not set
CONFIG_SYS_HAS_CPU_RM7000=y
CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
CONFIG_SYS_SUPPORTS_64BIT_KERNEL=y
CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
CONFIG_CPU_SUPPORTS_64BIT_KERNEL=y
#
# Kernel type
#
# CONFIG_32BIT is not set
CONFIG_64BIT=y
CONFIG_PAGE_SIZE_4KB=y
# CONFIG_PAGE_SIZE_8KB is not set
# CONFIG_PAGE_SIZE_16KB is not set
# CONFIG_PAGE_SIZE_64KB is not set
CONFIG_BOARD_SCACHE=y
CONFIG_RM7000_CPU_SCACHE=y
CONFIG_CPU_HAS_PREFETCH=y
CONFIG_MIPS_MT_DISABLED=y
# CONFIG_MIPS_MT_SMP is not set
# CONFIG_MIPS_MT_SMTC is not set
# CONFIG_MIPS_VPE_LOADER is not set
CONFIG_CPU_HAS_LLSC=y
CONFIG_CPU_HAS_SYNC=y
CONFIG_GENERIC_HARDIRQS=y
CONFIG_GENERIC_IRQ_PROBE=y
CONFIG_CPU_SUPPORTS_HIGHMEM=y
CONFIG_ARCH_FLATMEM_ENABLE=y
CONFIG_SELECT_MEMORY_MODEL=y
CONFIG_FLATMEM_MANUAL=y
# CONFIG_DISCONTIGMEM_MANUAL is not set
# CONFIG_SPARSEMEM_MANUAL is not set
CONFIG_FLATMEM=y
CONFIG_FLAT_NODE_MEM_MAP=y
# CONFIG_SPARSEMEM_STATIC is not set
CONFIG_SPLIT_PTLOCK_CPUS=4
CONFIG_RESOURCES_64BIT=y
CONFIG_ZONE_DMA_FLAG=1
# CONFIG_HZ_48 is not set
# CONFIG_HZ_100 is not set
# CONFIG_HZ_128 is not set
# CONFIG_HZ_250 is not set
# CONFIG_HZ_256 is not set
CONFIG_HZ_1000=y
# CONFIG_HZ_1024 is not set
CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
CONFIG_HZ=1000
CONFIG_PREEMPT_NONE=y
# CONFIG_PREEMPT_VOLUNTARY is not set
# CONFIG_PREEMPT is not set
# CONFIG_KEXEC is not set
CONFIG_LOCKDEP_SUPPORT=y
CONFIG_STACKTRACE_SUPPORT=y
CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
#
# Code maturity level options
#
CONFIG_EXPERIMENTAL=y
CONFIG_BROKEN_ON_SMP=y
CONFIG_INIT_ENV_ARG_LIMIT=32
#
# General setup
#
CONFIG_LOCALVERSION=""
CONFIG_LOCALVERSION_AUTO=y
CONFIG_SWAP=y
CONFIG_SYSVIPC=y
# CONFIG_IPC_NS is not set
CONFIG_SYSVIPC_SYSCTL=y
# CONFIG_POSIX_MQUEUE is not set
# CONFIG_BSD_PROCESS_ACCT is not set
# CONFIG_TASKSTATS is not set
# CONFIG_UTS_NS is not set
# CONFIG_AUDIT is not set
# CONFIG_IKCONFIG is not set
CONFIG_SYSFS_DEPRECATED=y
CONFIG_RELAY=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
CONFIG_SYSCTL=y
CONFIG_EMBEDDED=y
CONFIG_SYSCTL_SYSCALL=y
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_EXTRA_PASS is not set
CONFIG_HOTPLUG=y
CONFIG_PRINTK=y
CONFIG_BUG=y
CONFIG_ELF_CORE=y
CONFIG_BASE_FULL=y
CONFIG_FUTEX=y
CONFIG_EPOLL=y
CONFIG_SHMEM=y
CONFIG_SLAB=y
CONFIG_VM_EVENT_COUNTERS=y
CONFIG_RT_MUTEXES=y
# CONFIG_TINY_SHMEM is not set
CONFIG_BASE_SMALL=0
# CONFIG_SLOB is not set
#
# Loadable module support
#
# CONFIG_MODULES is not set
#
# Block layer
#
CONFIG_BLOCK=y
# CONFIG_BLK_DEV_IO_TRACE is not set
#
# IO Schedulers
#
CONFIG_IOSCHED_NOOP=y
CONFIG_IOSCHED_AS=y
CONFIG_IOSCHED_DEADLINE=y
CONFIG_IOSCHED_CFQ=y
CONFIG_DEFAULT_AS=y
# CONFIG_DEFAULT_DEADLINE is not set
# CONFIG_DEFAULT_CFQ is not set
# CONFIG_DEFAULT_NOOP is not set
CONFIG_DEFAULT_IOSCHED="anticipatory"
#
# Bus options (PCI, PCMCIA, EISA, ISA, TC)
#
CONFIG_HW_HAS_PCI=y
CONFIG_PCI=y
CONFIG_MMU=y
#
# PCCARD (PCMCIA/CardBus) support
#
# CONFIG_PCCARD is not set
#
# PCI Hotplug Support
#
# CONFIG_HOTPLUG_PCI is not set
#
# Executable file formats
#
CONFIG_BINFMT_ELF=y
# CONFIG_BINFMT_MISC is not set
# CONFIG_BUILD_ELF64 is not set
CONFIG_MIPS32_COMPAT=y
CONFIG_COMPAT=y
CONFIG_SYSVIPC_COMPAT=y
CONFIG_MIPS32_O32=y
CONFIG_MIPS32_N32=y
CONFIG_BINFMT_ELF32=y
#
# Power management options
#
CONFIG_PM=y
# CONFIG_PM_LEGACY is not set
# CONFIG_PM_DEBUG is not set
# CONFIG_PM_SYSFS_DEPRECATED is not set
#
# Networking
#
CONFIG_NET=y
#
# Networking options
#
# CONFIG_NETDEBUG is not set
# CONFIG_PACKET is not set
CONFIG_UNIX=y
CONFIG_XFRM=y
CONFIG_XFRM_USER=y
# CONFIG_XFRM_SUB_POLICY is not set
CONFIG_XFRM_MIGRATE=y
CONFIG_NET_KEY=y
CONFIG_NET_KEY_MIGRATE=y
CONFIG_INET=y
# CONFIG_IP_MULTICAST is not set
# CONFIG_IP_ADVANCED_ROUTER is not set
CONFIG_IP_FIB_HASH=y
CONFIG_IP_PNP=y
CONFIG_IP_PNP_DHCP=y
# CONFIG_IP_PNP_BOOTP is not set
# CONFIG_IP_PNP_RARP is not set
# CONFIG_NET_IPIP is not set
# CONFIG_NET_IPGRE is not set
# CONFIG_ARPD is not set
# CONFIG_SYN_COOKIES is not set
# CONFIG_INET_AH is not set
# CONFIG_INET_ESP is not set
# CONFIG_INET_IPCOMP is not set
# CONFIG_INET_XFRM_TUNNEL is not set
# CONFIG_INET_TUNNEL is not set
CONFIG_INET_XFRM_MODE_TRANSPORT=y
CONFIG_INET_XFRM_MODE_TUNNEL=y
CONFIG_INET_XFRM_MODE_BEET=y
CONFIG_INET_DIAG=y
CONFIG_INET_TCP_DIAG=y
# CONFIG_TCP_CONG_ADVANCED is not set
CONFIG_TCP_CONG_CUBIC=y
CONFIG_DEFAULT_TCP_CONG="cubic"
CONFIG_TCP_MD5SIG=y
# CONFIG_IPV6 is not set
# CONFIG_INET6_XFRM_TUNNEL is not set
# CONFIG_INET6_TUNNEL is not set
CONFIG_NETWORK_SECMARK=y
# CONFIG_NETFILTER is not set
#
# DCCP Configuration (EXPERIMENTAL)
#
# CONFIG_IP_DCCP is not set
#
# SCTP Configuration (EXPERIMENTAL)
#
# CONFIG_IP_SCTP is not set
#
# TIPC Configuration (EXPERIMENTAL)
#
# CONFIG_TIPC is not set
# CONFIG_ATM is not set
# CONFIG_BRIDGE is not set
# CONFIG_VLAN_8021Q is not set
# CONFIG_DECNET is not set
# CONFIG_LLC2 is not set
# CONFIG_IPX is not set
# CONFIG_ATALK is not set
# CONFIG_X25 is not set
# CONFIG_LAPB is not set
# CONFIG_ECONET is not set
# CONFIG_WAN_ROUTER is not set
#
# QoS and/or fair queueing
#
# CONFIG_NET_SCHED is not set
#
# Network testing
#
# CONFIG_NET_PKTGEN is not set
# CONFIG_HAMRADIO is not set
# CONFIG_IRDA is not set
# CONFIG_BT is not set
CONFIG_IEEE80211=y
# CONFIG_IEEE80211_DEBUG is not set
CONFIG_IEEE80211_CRYPT_WEP=y
CONFIG_IEEE80211_CRYPT_CCMP=y
CONFIG_IEEE80211_SOFTMAC=y
# CONFIG_IEEE80211_SOFTMAC_DEBUG is not set
CONFIG_WIRELESS_EXT=y
#
# Device Drivers
#
#
# Generic Driver Options
#
CONFIG_STANDALONE=y
CONFIG_PREVENT_FIRMWARE_BUILD=y
CONFIG_FW_LOADER=y
# CONFIG_SYS_HYPERVISOR is not set
#
# Connector - unified userspace <-> kernelspace linker
#
CONFIG_CONNECTOR=y
CONFIG_PROC_EVENTS=y
#
# Memory Technology Devices (MTD)
#
# CONFIG_MTD is not set
#
# Parallel port support
#
# CONFIG_PARPORT is not set
#
# Plug and Play support
#
# CONFIG_PNPACPI is not set
#
# Block devices
#
# CONFIG_BLK_CPQ_DA is not set
# CONFIG_BLK_CPQ_CISS_DA is not set
# CONFIG_BLK_DEV_DAC960 is not set
# CONFIG_BLK_DEV_UMEM is not set
# CONFIG_BLK_DEV_COW_COMMON is not set
# CONFIG_BLK_DEV_LOOP is not set
# CONFIG_BLK_DEV_NBD is not set
# CONFIG_BLK_DEV_SX8 is not set
# CONFIG_BLK_DEV_RAM is not set
# CONFIG_BLK_DEV_INITRD is not set
CONFIG_CDROM_PKTCDVD=y
CONFIG_CDROM_PKTCDVD_BUFFERS=8
# CONFIG_CDROM_PKTCDVD_WCACHE is not set
CONFIG_ATA_OVER_ETH=y
#
# Misc devices
#
CONFIG_SGI_IOC4=y
# CONFIG_TIFM_CORE is not set
#
# ATA/ATAPI/MFM/RLL support
#
# CONFIG_IDE is not set
#
# SCSI device support
#
CONFIG_RAID_ATTRS=y
# CONFIG_SCSI is not set
# CONFIG_SCSI_NETLINK is not set
#
# Serial ATA (prod) and Parallel ATA (experimental) drivers
#
# CONFIG_ATA is not set
#
# Multi-device support (RAID and LVM)
#
# CONFIG_MD is not set
#
# Fusion MPT device support
#
# CONFIG_FUSION is not set
#
# IEEE 1394 (FireWire) support
#
# CONFIG_IEEE1394 is not set
#
# I2O device support
#
# CONFIG_I2O is not set
#
# Network device support
#
CONFIG_NETDEVICES=y
# CONFIG_DUMMY is not set
# CONFIG_BONDING is not set
# CONFIG_EQUALIZER is not set
# CONFIG_TUN is not set
#
# ARCnet devices
#
# CONFIG_ARCNET is not set
#
# PHY device support
#
CONFIG_PHYLIB=y
#
# MII PHY device drivers
#
CONFIG_MARVELL_PHY=y
CONFIG_DAVICOM_PHY=y
CONFIG_QSEMI_PHY=y
CONFIG_LXT_PHY=y
CONFIG_CICADA_PHY=y
CONFIG_VITESSE_PHY=y
CONFIG_SMSC_PHY=y
# CONFIG_BROADCOM_PHY is not set
# CONFIG_FIXED_PHY is not set
#
# Ethernet (10 or 100Mbit)
#
CONFIG_NET_ETHERNET=y
# CONFIG_MII is not set
# CONFIG_HAPPYMEAL is not set
# CONFIG_SUNGEM is not set
# CONFIG_CASSINI is not set
# CONFIG_NET_VENDOR_3COM is not set
# CONFIG_DM9000 is not set
#
# Tulip family network device support
#
# CONFIG_NET_TULIP is not set
# CONFIG_HP100 is not set
# CONFIG_NET_PCI is not set
#
# Ethernet (1000 Mbit)
#
# CONFIG_ACENIC is not set
# CONFIG_DL2K is not set
# CONFIG_E1000 is not set
# CONFIG_NS83820 is not set
# CONFIG_HAMACHI is not set
# CONFIG_YELLOWFIN is not set
# CONFIG_R8169 is not set
# CONFIG_SIS190 is not set
# CONFIG_SKGE is not set
# CONFIG_SKY2 is not set
# CONFIG_SK98LIN is not set
# CONFIG_TIGON3 is not set
# CONFIG_BNX2 is not set
# CONFIG_MV643XX_ETH is not set
CONFIG_QLA3XXX=y
# CONFIG_ATL1 is not set
#
# Ethernet (10000 Mbit)
#
# CONFIG_CHELSIO_T1 is not set
CONFIG_CHELSIO_T3=y
# CONFIG_IXGB is not set
# CONFIG_S2IO is not set
# CONFIG_MYRI10GE is not set
CONFIG_NETXEN_NIC=y
#
# Token Ring devices
#
# CONFIG_TR is not set
#
# Wireless LAN (non-hamradio)
#
# CONFIG_NET_RADIO is not set
#
# Wan interfaces
#
# CONFIG_WAN is not set
# CONFIG_FDDI is not set
# CONFIG_HIPPI is not set
# CONFIG_PPP is not set
# CONFIG_SLIP is not set
# CONFIG_SHAPER is not set
# CONFIG_NETCONSOLE is not set
# CONFIG_NETPOLL is not set
# CONFIG_NET_POLL_CONTROLLER is not set
#
# ISDN subsystem
#
# CONFIG_ISDN is not set
#
# Telephony Support
#
# CONFIG_PHONE is not set
#
# Input device support
#
CONFIG_INPUT=y
# CONFIG_INPUT_FF_MEMLESS is not set
#
# Userland interfaces
#
CONFIG_INPUT_MOUSEDEV=y
CONFIG_INPUT_MOUSEDEV_PSAUX=y
CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
# CONFIG_INPUT_JOYDEV is not set
# CONFIG_INPUT_TSDEV is not set
# CONFIG_INPUT_EVDEV is not set
# CONFIG_INPUT_EVBUG is not set
#
# Input Device Drivers
#
# CONFIG_INPUT_KEYBOARD is not set
# CONFIG_INPUT_MOUSE is not set
# CONFIG_INPUT_JOYSTICK is not set
# CONFIG_INPUT_TOUCHSCREEN is not set
# CONFIG_INPUT_MISC is not set
#
# Hardware I/O ports
#
CONFIG_SERIO=y
# CONFIG_SERIO_I8042 is not set
CONFIG_SERIO_SERPORT=y
# CONFIG_SERIO_PCIPS2 is not set
# CONFIG_SERIO_LIBPS2 is not set
CONFIG_SERIO_RAW=y
# CONFIG_GAMEPORT is not set
#
# Character devices
#
CONFIG_VT=y
CONFIG_VT_CONSOLE=y
CONFIG_HW_CONSOLE=y
CONFIG_VT_HW_CONSOLE_BINDING=y
# CONFIG_SERIAL_NONSTANDARD is not set
#
# Serial drivers
#
CONFIG_SERIAL_8250=y
CONFIG_SERIAL_8250_CONSOLE=y
CONFIG_SERIAL_8250_PCI=y
CONFIG_SERIAL_8250_NR_UARTS=4
CONFIG_SERIAL_8250_RUNTIME_UARTS=4
# CONFIG_SERIAL_8250_EXTENDED is not set
#
# Non-8250 serial port support
#
CONFIG_SERIAL_CORE=y
CONFIG_SERIAL_CORE_CONSOLE=y
# CONFIG_SERIAL_JSM is not set
CONFIG_UNIX98_PTYS=y
CONFIG_LEGACY_PTYS=y
CONFIG_LEGACY_PTY_COUNT=256
#
# IPMI
#
# CONFIG_IPMI_HANDLER is not set
#
# Watchdog Cards
#
# CONFIG_WATCHDOG is not set
# CONFIG_HW_RANDOM is not set
# CONFIG_RTC is not set
# CONFIG_GEN_RTC is not set
# CONFIG_DTLK is not set
# CONFIG_R3964 is not set
# CONFIG_APPLICOM is not set
# CONFIG_DRM is not set
# CONFIG_RAW_DRIVER is not set
#
# TPM devices
#
# CONFIG_TCG_TPM is not set
#
# I2C support
#
# CONFIG_I2C is not set
#
# SPI support
#
# CONFIG_SPI is not set
# CONFIG_SPI_MASTER is not set
#
# Dallas's 1-wire bus
#
# CONFIG_W1 is not set
#
# Hardware Monitoring support
#
# CONFIG_HWMON is not set
# CONFIG_HWMON_VID is not set
#
# Multimedia devices
#
# CONFIG_VIDEO_DEV is not set
#
# Digital Video Broadcasting Devices
#
# CONFIG_DVB is not set
#
# Graphics support
#
# CONFIG_FIRMWARE_EDID is not set
# CONFIG_FB is not set
#
# Console display driver support
#
# CONFIG_VGA_CONSOLE is not set
CONFIG_DUMMY_CONSOLE=y
# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
#
# Sound
#
# CONFIG_SOUND is not set
#
# HID Devices
#
# CONFIG_HID is not set
#
# USB support
#
CONFIG_USB_ARCH_HAS_HCD=y
CONFIG_USB_ARCH_HAS_OHCI=y
CONFIG_USB_ARCH_HAS_EHCI=y
# CONFIG_USB is not set
#
# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
#
#
# USB Gadget Support
#
# CONFIG_USB_GADGET is not set
#
# MMC/SD Card support
#
# CONFIG_MMC is not set
#
# LED devices
#
# CONFIG_NEW_LEDS is not set
#
# LED drivers
#
#
# LED Triggers
#
#
# InfiniBand support
#
# CONFIG_INFINIBAND is not set
#
# EDAC - error detection and reporting (RAS) (EXPERIMENTAL)
#
#
# Real Time Clock
#
# CONFIG_RTC_CLASS is not set
#
# DMA Engine support
#
# CONFIG_DMA_ENGINE is not set
#
# DMA Clients
#
#
# DMA Devices
#
#
# Auxiliary Display support
#
#
# Virtualization
#
#
# File systems
#
CONFIG_EXT2_FS=y
# CONFIG_EXT2_FS_XATTR is not set
# CONFIG_EXT2_FS_XIP is not set
# CONFIG_EXT3_FS is not set
# CONFIG_EXT4DEV_FS is not set
# CONFIG_REISERFS_FS is not set
# CONFIG_JFS_FS is not set
CONFIG_FS_POSIX_ACL=y
# CONFIG_XFS_FS is not set
# CONFIG_GFS2_FS is not set
# CONFIG_OCFS2_FS is not set
# CONFIG_MINIX_FS is not set
# CONFIG_ROMFS_FS is not set
CONFIG_INOTIFY=y
CONFIG_INOTIFY_USER=y
# CONFIG_QUOTA is not set
CONFIG_DNOTIFY=y
# CONFIG_AUTOFS_FS is not set
# CONFIG_AUTOFS4_FS is not set
CONFIG_FUSE_FS=y
CONFIG_GENERIC_ACL=y
#
# CD-ROM/DVD Filesystems
#
# CONFIG_ISO9660_FS is not set
# CONFIG_UDF_FS is not set
#
# DOS/FAT/NT Filesystems
#
# CONFIG_MSDOS_FS is not set
# CONFIG_VFAT_FS is not set
# CONFIG_NTFS_FS is not set
#
# Pseudo filesystems
#
CONFIG_PROC_FS=y
CONFIG_PROC_KCORE=y
CONFIG_PROC_SYSCTL=y
CONFIG_SYSFS=y
CONFIG_TMPFS=y
CONFIG_TMPFS_POSIX_ACL=y
# CONFIG_HUGETLB_PAGE is not set
CONFIG_RAMFS=y
CONFIG_CONFIGFS_FS=y
#
# Miscellaneous filesystems
#
# CONFIG_ADFS_FS is not set
# CONFIG_AFFS_FS is not set
# CONFIG_ECRYPT_FS is not set
# CONFIG_HFS_FS is not set
# CONFIG_HFSPLUS_FS is not set
# CONFIG_BEFS_FS is not set
# CONFIG_BFS_FS is not set
# CONFIG_EFS_FS is not set
# CONFIG_CRAMFS is not set
# CONFIG_VXFS_FS is not set
# CONFIG_HPFS_FS is not set
# CONFIG_QNX4FS_FS is not set
# CONFIG_SYSV_FS is not set
# CONFIG_UFS_FS is not set
#
# Network File Systems
#
CONFIG_NFS_FS=y
# CONFIG_NFS_V3 is not set
# CONFIG_NFS_V4 is not set
# CONFIG_NFS_DIRECTIO is not set
CONFIG_NFSD=y
# CONFIG_NFSD_V3 is not set
# CONFIG_NFSD_TCP is not set
CONFIG_ROOT_NFS=y
CONFIG_LOCKD=y
CONFIG_EXPORTFS=y
CONFIG_NFS_COMMON=y
CONFIG_SUNRPC=y
# CONFIG_RPCSEC_GSS_KRB5 is not set
# CONFIG_RPCSEC_GSS_SPKM3 is not set
# CONFIG_SMB_FS is not set
# CONFIG_CIFS is not set
# CONFIG_NCP_FS is not set
# CONFIG_CODA_FS is not set
# CONFIG_AFS_FS is not set
# CONFIG_9P_FS is not set
#
# Partition Types
#
# CONFIG_PARTITION_ADVANCED is not set
CONFIG_MSDOS_PARTITION=y
#
# Native Language Support
#
# CONFIG_NLS is not set
#
# Distributed Lock Manager
#
CONFIG_DLM=y
CONFIG_DLM_TCP=y
# CONFIG_DLM_SCTP is not set
# CONFIG_DLM_DEBUG is not set
#
# Profiling support
#
# CONFIG_PROFILING is not set
#
# Kernel hacking
#
CONFIG_TRACE_IRQFLAGS_SUPPORT=y
# CONFIG_PRINTK_TIME is not set
CONFIG_ENABLE_MUST_CHECK=y
# CONFIG_MAGIC_SYSRQ is not set
# CONFIG_UNUSED_SYMBOLS is not set
# CONFIG_DEBUG_FS is not set
# CONFIG_HEADERS_CHECK is not set
# CONFIG_DEBUG_KERNEL is not set
CONFIG_LOG_BUF_SHIFT=14
CONFIG_CROSSCOMPILE=y
CONFIG_CMDLINE=""
#
# Security options
#
CONFIG_KEYS=y
CONFIG_KEYS_DEBUG_PROC_KEYS=y
# CONFIG_SECURITY is not set
#
# Cryptographic options
#
CONFIG_CRYPTO=y
CONFIG_CRYPTO_ALGAPI=y
CONFIG_CRYPTO_BLKCIPHER=y
CONFIG_CRYPTO_HASH=y
CONFIG_CRYPTO_MANAGER=y
CONFIG_CRYPTO_HMAC=y
CONFIG_CRYPTO_XCBC=y
CONFIG_CRYPTO_NULL=y
CONFIG_CRYPTO_MD4=y
CONFIG_CRYPTO_MD5=y
CONFIG_CRYPTO_SHA1=y
CONFIG_CRYPTO_SHA256=y
CONFIG_CRYPTO_SHA512=y
CONFIG_CRYPTO_WP512=y
CONFIG_CRYPTO_TGR192=y
CONFIG_CRYPTO_GF128MUL=y
CONFIG_CRYPTO_ECB=y
CONFIG_CRYPTO_CBC=y
CONFIG_CRYPTO_PCBC=y
CONFIG_CRYPTO_LRW=y
CONFIG_CRYPTO_DES=y
CONFIG_CRYPTO_FCRYPT=y
CONFIG_CRYPTO_BLOWFISH=y
CONFIG_CRYPTO_TWOFISH=y
CONFIG_CRYPTO_TWOFISH_COMMON=y
CONFIG_CRYPTO_SERPENT=y
CONFIG_CRYPTO_AES=y
CONFIG_CRYPTO_CAST5=y
CONFIG_CRYPTO_CAST6=y
CONFIG_CRYPTO_TEA=y
CONFIG_CRYPTO_ARC4=y
CONFIG_CRYPTO_KHAZAD=y
CONFIG_CRYPTO_ANUBIS=y
CONFIG_CRYPTO_DEFLATE=y
CONFIG_CRYPTO_MICHAEL_MIC=y
CONFIG_CRYPTO_CRC32C=y
CONFIG_CRYPTO_CAMELLIA=y
#
# Hardware crypto devices
#
#
# Library routines
#
CONFIG_BITREVERSE=y
# CONFIG_CRC_CCITT is not set
CONFIG_CRC16=y
CONFIG_CRC32=y
CONFIG_LIBCRC32C=y
CONFIG_ZLIB_INFLATE=y
CONFIG_ZLIB_DEFLATE=y
CONFIG_PLIST=y
CONFIG_HAS_IOMEM=y
CONFIG_HAS_IOPORT=y

4
arch/mips/configs/ocelot_defconfig
View File

@ -25,9 +25,7 @@ CONFIG_ZONE_DMA=y
# CONFIG_BASLER_EXCITE is not set
# CONFIG_MIPS_COBALT is not set
# CONFIG_MACH_DECSTATION is not set
# CONFIG_MIPS_EV64120 is not set
# CONFIG_MACH_JAZZ is not set
# CONFIG_LASAT is not set
# CONFIG_MIPS_ATLAS is not set
# CONFIG_MIPS_MALTA is not set
# CONFIG_MIPS_SEAD is not set
@ -35,8 +33,6 @@ CONFIG_ZONE_DMA=y
# CONFIG_MIPS_SIM is not set
# CONFIG_MOMENCO_JAGUAR_ATX is not set
CONFIG_MOMENCO_OCELOT=y
# CONFIG_MOMENCO_OCELOT_3 is not set
# CONFIG_MOMENCO_OCELOT_C is not set
# CONFIG_MOMENCO_OCELOT_G is not set
# CONFIG_MIPS_XXS1500 is not set
# CONFIG_PNX8550_JBS is not set

4
arch/mips/configs/pb1100_defconfig
View File

@ -26,9 +26,7 @@ CONFIG_MIPS_PB1100=y
# CONFIG_BASLER_EXCITE is not set
# CONFIG_MIPS_COBALT is not set
# CONFIG_MACH_DECSTATION is not set
# CONFIG_MIPS_EV64120 is not set
# CONFIG_MACH_JAZZ is not set
# CONFIG_LASAT is not set
# CONFIG_MIPS_ATLAS is not set
# CONFIG_MIPS_MALTA is not set
# CONFIG_MIPS_SEAD is not set
@ -36,8 +34,6 @@ CONFIG_MIPS_PB1100=y
# CONFIG_MIPS_SIM is not set
# CONFIG_MOMENCO_JAGUAR_ATX is not set
# CONFIG_MOMENCO_OCELOT is not set
# CONFIG_MOMENCO_OCELOT_3 is not set
# CONFIG_MOMENCO_OCELOT_C is not set
# CONFIG_MOMENCO_OCELOT_G is not set
# CONFIG_MIPS_XXS1500 is not set
# CONFIG_PNX8550_JBS is not set

4
arch/mips/configs/pb1500_defconfig
View File

@ -26,9 +26,7 @@ CONFIG_MIPS_PB1500=y
# CONFIG_BASLER_EXCITE is not set
# CONFIG_MIPS_COBALT is not set
# CONFIG_MACH_DECSTATION is not set
# CONFIG_MIPS_EV64120 is not set
# CONFIG_MACH_JAZZ is not set
# CONFIG_LASAT is not set
# CONFIG_MIPS_ATLAS is not set
# CONFIG_MIPS_MALTA is not set
# CONFIG_MIPS_SEAD is not set
@ -36,8 +34,6 @@ CONFIG_MIPS_PB1500=y
# CONFIG_MIPS_SIM is not set
# CONFIG_MOMENCO_JAGUAR_ATX is not set
# CONFIG_MOMENCO_OCELOT is not set
# CONFIG_MOMENCO_OCELOT_3 is not set
# CONFIG_MOMENCO_OCELOT_C is not set
# CONFIG_MOMENCO_OCELOT_G is not set
# CONFIG_MIPS_XXS1500 is not set
# CONFIG_PNX8550_JBS is not set

4
arch/mips/configs/pb1550_defconfig
View File

@ -26,9 +26,7 @@ CONFIG_MIPS_PB1550=y
# CONFIG_BASLER_EXCITE is not set
# CONFIG_MIPS_COBALT is not set
# CONFIG_MACH_DECSTATION is not set
# CONFIG_MIPS_EV64120 is not set
# CONFIG_MACH_JAZZ is not set
# CONFIG_LASAT is not set
# CONFIG_MIPS_ATLAS is not set
# CONFIG_MIPS_MALTA is not set
# CONFIG_MIPS_SEAD is not set
@ -36,8 +34,6 @@ CONFIG_MIPS_PB1550=y
# CONFIG_MIPS_SIM is not set
# CONFIG_MOMENCO_JAGUAR_ATX is not set
# CONFIG_MOMENCO_OCELOT is not set
# CONFIG_MOMENCO_OCELOT_3 is not set
# CONFIG_MOMENCO_OCELOT_C is not set
# CONFIG_MOMENCO_OCELOT_G is not set
# CONFIG_MIPS_XXS1500 is not set
# CONFIG_PNX8550_JBS is not set

4
arch/mips/configs/pnx8550-jbs_defconfig
View File

@ -25,9 +25,7 @@ CONFIG_ZONE_DMA=y
# CONFIG_BASLER_EXCITE is not set
# CONFIG_MIPS_COBALT is not set
# CONFIG_MACH_DECSTATION is not set
# CONFIG_MIPS_EV64120 is not set
# CONFIG_MACH_JAZZ is not set
# CONFIG_LASAT is not set
# CONFIG_MIPS_ATLAS is not set
# CONFIG_MIPS_MALTA is not set
# CONFIG_MIPS_SEAD is not set
@ -35,8 +33,6 @@ CONFIG_ZONE_DMA=y
# CONFIG_MIPS_SIM is not set
# CONFIG_MOMENCO_JAGUAR_ATX is not set
# CONFIG_MOMENCO_OCELOT is not set
# CONFIG_MOMENCO_OCELOT_3 is not set
# CONFIG_MOMENCO_OCELOT_C is not set
# CONFIG_MOMENCO_OCELOT_G is not set
# CONFIG_MIPS_XXS1500 is not set
CONFIG_PNX8550_JBS=y

4
arch/mips/configs/pnx8550-stb810_defconfig
View File

@ -25,9 +25,7 @@ CONFIG_ZONE_DMA=y
# CONFIG_BASLER_EXCITE is not set
# CONFIG_MIPS_COBALT is not set
# CONFIG_MACH_DECSTATION is not set
# CONFIG_MIPS_EV64120 is not set
# CONFIG_MACH_JAZZ is not set
# CONFIG_LASAT is not set
# CONFIG_MIPS_ATLAS is not set
# CONFIG_MIPS_MALTA is not set
# CONFIG_MIPS_SEAD is not set
@ -35,8 +33,6 @@ CONFIG_ZONE_DMA=y
# CONFIG_MIPS_SIM is not set
# CONFIG_MOMENCO_JAGUAR_ATX is not set
# CONFIG_MOMENCO_OCELOT is not set
# CONFIG_MOMENCO_OCELOT_3 is not set
# CONFIG_MOMENCO_OCELOT_C is not set
# CONFIG_MOMENCO_OCELOT_G is not set
# CONFIG_MIPS_XXS1500 is not set
# CONFIG_PNX8550_JBS is not set

4
arch/mips/configs/qemu_defconfig
View File

@ -25,9 +25,7 @@ CONFIG_ZONE_DMA=y
# CONFIG_BASLER_EXCITE is not set
# CONFIG_MIPS_COBALT is not set
# CONFIG_MACH_DECSTATION is not set
# CONFIG_MIPS_EV64120 is not set
# CONFIG_MACH_JAZZ is not set
# CONFIG_LASAT is not set
# CONFIG_MIPS_ATLAS is not set
# CONFIG_MIPS_MALTA is not set
# CONFIG_MIPS_SEAD is not set
@ -35,8 +33,6 @@ CONFIG_ZONE_DMA=y
# CONFIG_MIPS_SIM is not set
# CONFIG_MOMENCO_JAGUAR_ATX is not set
# CONFIG_MOMENCO_OCELOT is not set
# CONFIG_MOMENCO_OCELOT_3 is not set
# CONFIG_MOMENCO_OCELOT_C is not set
# CONFIG_MOMENCO_OCELOT_G is not set
# CONFIG_MIPS_XXS1500 is not set
# CONFIG_PNX8550_JBS is not set

4
arch/mips/configs/rbhma4200_defconfig
View File

@ -24,17 +24,13 @@ CONFIG_MIPS=y
# CONFIG_BASLER_EXCITE is not set
# CONFIG_MIPS_COBALT is not set
# CONFIG_MACH_DECSTATION is not set
# CONFIG_MIPS_EV64120 is not set
# CONFIG_MACH_JAZZ is not set
# CONFIG_LASAT is not set
# CONFIG_MIPS_ATLAS is not set
# CONFIG_MIPS_MALTA is not set
# CONFIG_MIPS_SEAD is not set
# CONFIG_WR_PPMC is not set
# CONFIG_MIPS_SIM is not set
# CONFIG_MOMENCO_OCELOT is not set
# CONFIG_MOMENCO_OCELOT_3 is not set
# CONFIG_MOMENCO_OCELOT_C is not set
# CONFIG_MIPS_XXS1500 is not set
# CONFIG_PNX8550_JBS is not set
# CONFIG_PNX8550_STB810 is not set

957
arch/mips/configs/rbhma4500_defconfig
View File

File diff suppressed because it is too large Load Diff

4
arch/mips/configs/rm200_defconfig
View File

@ -25,9 +25,7 @@ CONFIG_ZONE_DMA=y
# CONFIG_BASLER_EXCITE is not set
# CONFIG_MIPS_COBALT is not set
# CONFIG_MACH_DECSTATION is not set
# CONFIG_MIPS_EV64120 is not set
# CONFIG_MACH_JAZZ is not set
# CONFIG_LASAT is not set
# CONFIG_MIPS_ATLAS is not set
# CONFIG_MIPS_MALTA is not set
# CONFIG_MIPS_SEAD is not set
@ -35,8 +33,6 @@ CONFIG_ZONE_DMA=y
# CONFIG_MIPS_SIM is not set
# CONFIG_MOMENCO_JAGUAR_ATX is not set
# CONFIG_MOMENCO_OCELOT is not set
# CONFIG_MOMENCO_OCELOT_3 is not set
# CONFIG_MOMENCO_OCELOT_C is not set
# CONFIG_MOMENCO_OCELOT_G is not set
# CONFIG_MIPS_XXS1500 is not set
# CONFIG_PNX8550_JBS is not set

4
arch/mips/configs/sb1250-swarm_defconfig
View File

@ -25,9 +25,7 @@ CONFIG_ZONE_DMA=y
# CONFIG_BASLER_EXCITE is not set
# CONFIG_MIPS_COBALT is not set
# CONFIG_MACH_DECSTATION is not set
# CONFIG_MIPS_EV64120 is not set
# CONFIG_MACH_JAZZ is not set
# CONFIG_LASAT is not set
# CONFIG_MIPS_ATLAS is not set
# CONFIG_MIPS_MALTA is not set
# CONFIG_MIPS_SEAD is not set
@ -35,8 +33,6 @@ CONFIG_ZONE_DMA=y
# CONFIG_MIPS_SIM is not set
# CONFIG_MOMENCO_JAGUAR_ATX is not set
# CONFIG_MOMENCO_OCELOT is not set
# CONFIG_MOMENCO_OCELOT_3 is not set
# CONFIG_MOMENCO_OCELOT_C is not set
# CONFIG_MOMENCO_OCELOT_G is not set
# CONFIG_MIPS_XXS1500 is not set
# CONFIG_PNX8550_JBS is not set

4
arch/mips/configs/sead_defconfig
View File

@ -25,9 +25,7 @@ CONFIG_ZONE_DMA=y
# CONFIG_BASLER_EXCITE is not set
# CONFIG_MIPS_COBALT is not set
# CONFIG_MACH_DECSTATION is not set
# CONFIG_MIPS_EV64120 is not set
# CONFIG_MACH_JAZZ is not set
# CONFIG_LASAT is not set
# CONFIG_MIPS_ATLAS is not set
# CONFIG_MIPS_MALTA is not set
CONFIG_MIPS_SEAD=y
@ -35,8 +33,6 @@ CONFIG_MIPS_SEAD=y
# CONFIG_MIPS_SIM is not set
# CONFIG_MOMENCO_JAGUAR_ATX is not set
# CONFIG_MOMENCO_OCELOT is not set
# CONFIG_MOMENCO_OCELOT_3 is not set
# CONFIG_MOMENCO_OCELOT_C is not set
# CONFIG_MOMENCO_OCELOT_G is not set
# CONFIG_MIPS_XXS1500 is not set
# CONFIG_PNX8550_JBS is not set

4
arch/mips/configs/tb0219_defconfig
View File

@ -25,9 +25,7 @@ CONFIG_ZONE_DMA=y
# CONFIG_BASLER_EXCITE is not set
# CONFIG_MIPS_COBALT is not set
# CONFIG_MACH_DECSTATION is not set
# CONFIG_MIPS_EV64120 is not set
# CONFIG_MACH_JAZZ is not set
# CONFIG_LASAT is not set
# CONFIG_MIPS_ATLAS is not set
# CONFIG_MIPS_MALTA is not set
# CONFIG_MIPS_SEAD is not set
@ -35,8 +33,6 @@ CONFIG_ZONE_DMA=y
# CONFIG_MIPS_SIM is not set
# CONFIG_MOMENCO_JAGUAR_ATX is not set
# CONFIG_MOMENCO_OCELOT is not set
# CONFIG_MOMENCO_OCELOT_3 is not set
# CONFIG_MOMENCO_OCELOT_C is not set
# CONFIG_MOMENCO_OCELOT_G is not set
# CONFIG_MIPS_XXS1500 is not set
# CONFIG_PNX8550_JBS is not set

4
arch/mips/configs/tb0226_defconfig
View File

@ -25,9 +25,7 @@ CONFIG_ZONE_DMA=y
# CONFIG_BASLER_EXCITE is not set
# CONFIG_MIPS_COBALT is not set
# CONFIG_MACH_DECSTATION is not set
# CONFIG_MIPS_EV64120 is not set
# CONFIG_MACH_JAZZ is not set
# CONFIG_LASAT is not set
# CONFIG_MIPS_ATLAS is not set
# CONFIG_MIPS_MALTA is not set
# CONFIG_MIPS_SEAD is not set
@ -35,8 +33,6 @@ CONFIG_ZONE_DMA=y
# CONFIG_MIPS_SIM is not set
# CONFIG_MOMENCO_JAGUAR_ATX is not set
# CONFIG_MOMENCO_OCELOT is not set
# CONFIG_MOMENCO_OCELOT_3 is not set
# CONFIG_MOMENCO_OCELOT_C is not set
# CONFIG_MOMENCO_OCELOT_G is not set
# CONFIG_MIPS_XXS1500 is not set
# CONFIG_PNX8550_JBS is not set

4
arch/mips/configs/tb0287_defconfig
View File

@ -25,9 +25,7 @@ CONFIG_ZONE_DMA=y
# CONFIG_BASLER_EXCITE is not set
# CONFIG_MIPS_COBALT is not set
# CONFIG_MACH_DECSTATION is not set
# CONFIG_MIPS_EV64120 is not set
# CONFIG_MACH_JAZZ is not set
# CONFIG_LASAT is not set
# CONFIG_MIPS_ATLAS is not set
# CONFIG_MIPS_MALTA is not set
# CONFIG_MIPS_SEAD is not set
@ -35,8 +33,6 @@ CONFIG_ZONE_DMA=y
# CONFIG_MIPS_SIM is not set
# CONFIG_MOMENCO_JAGUAR_ATX is not set
# CONFIG_MOMENCO_OCELOT is not set
# CONFIG_MOMENCO_OCELOT_3 is not set
# CONFIG_MOMENCO_OCELOT_C is not set
# CONFIG_MOMENCO_OCELOT_G is not set
# CONFIG_MIPS_XXS1500 is not set
# CONFIG_PNX8550_JBS is not set

4
arch/mips/configs/workpad_defconfig
View File

@ -25,9 +25,7 @@ CONFIG_ZONE_DMA=y
# CONFIG_BASLER_EXCITE is not set
# CONFIG_MIPS_COBALT is not set
# CONFIG_MACH_DECSTATION is not set
# CONFIG_MIPS_EV64120 is not set
# CONFIG_MACH_JAZZ is not set
# CONFIG_LASAT is not set
# CONFIG_MIPS_ATLAS is not set
# CONFIG_MIPS_MALTA is not set
# CONFIG_MIPS_SEAD is not set
@ -35,8 +33,6 @@ CONFIG_ZONE_DMA=y
# CONFIG_MIPS_SIM is not set
# CONFIG_MOMENCO_JAGUAR_ATX is not set
# CONFIG_MOMENCO_OCELOT is not set
# CONFIG_MOMENCO_OCELOT_3 is not set
# CONFIG_MOMENCO_OCELOT_C is not set
# CONFIG_MOMENCO_OCELOT_G is not set
# CONFIG_MIPS_XXS1500 is not set
# CONFIG_PNX8550_JBS is not set

4
arch/mips/configs/wrppmc_defconfig
View File

@ -25,9 +25,7 @@ CONFIG_ZONE_DMA=y
# CONFIG_BASLER_EXCITE is not set
# CONFIG_MIPS_COBALT is not set
# CONFIG_MACH_DECSTATION is not set
# CONFIG_MIPS_EV64120 is not set
# CONFIG_MACH_JAZZ is not set
# CONFIG_LASAT is not set
# CONFIG_MIPS_ATLAS is not set
# CONFIG_MIPS_MALTA is not set
# CONFIG_MIPS_SEAD is not set
@ -35,8 +33,6 @@ CONFIG_WR_PPMC=y
# CONFIG_MIPS_SIM is not set
# CONFIG_MOMENCO_JAGUAR_ATX is not set
# CONFIG_MOMENCO_OCELOT is not set
# CONFIG_MOMENCO_OCELOT_3 is not set
# CONFIG_MOMENCO_OCELOT_C is not set
# CONFIG_MOMENCO_OCELOT_G is not set
# CONFIG_MIPS_XXS1500 is not set
# CONFIG_PNX8550_JBS is not set

4
arch/mips/configs/yosemite_defconfig
View File

@ -25,9 +25,7 @@ CONFIG_ZONE_DMA=y
# CONFIG_BASLER_EXCITE is not set
# CONFIG_MIPS_COBALT is not set
# CONFIG_MACH_DECSTATION is not set
# CONFIG_MIPS_EV64120 is not set
# CONFIG_MACH_JAZZ is not set
# CONFIG_LASAT is not set
# CONFIG_MIPS_ATLAS is not set
# CONFIG_MIPS_MALTA is not set
# CONFIG_MIPS_SEAD is not set
@ -35,8 +33,6 @@ CONFIG_ZONE_DMA=y
# CONFIG_MIPS_SIM is not set
# CONFIG_MOMENCO_JAGUAR_ATX is not set
# CONFIG_MOMENCO_OCELOT is not set
# CONFIG_MOMENCO_OCELOT_3 is not set
# CONFIG_MOMENCO_OCELOT_C is not set
# CONFIG_MOMENCO_OCELOT_G is not set
# CONFIG_MIPS_XXS1500 is not set
# CONFIG_PNX8550_JBS is not set

3
arch/mips/ddb5xxx/ddb5477/Makefile
View File

@ -2,7 +2,8 @@
# Makefile for NEC DDB-Vrc5477 board
#
obj-y += irq.o irq_5477.o setup.o lcd44780.o
obj-y += ddb5477-platform.o irq.o irq_5477.o setup.o \
lcd44780.o
obj-$(CONFIG_RUNTIME_DEBUG) += debug.o
obj-$(CONFIG_KGDB) += kgdb_io.o

49
arch/mips/ddb5xxx/ddb5477/ddb5477-platform.c Normal file
View File

@ -0,0 +1,49 @@
/*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
* Copyright (C) 2007 Ralf Baechle (ralf@linux-mips.org)
*/
#include <linux/init.h>
#include <linux/module.h>
#include <linux/serial_8250.h>
#include <asm/ddb5xxx/ddb5477.h>
#define DDB_UART_FLAGS (UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP)
#define DDB5477_PORT(base, int) \
{ \
.mapbase = base, \
.irq = int, \
.uartclk = 1843200, \
.iotype = UPIO_MEM, \
.flags = DDB_UART_FLAGS, \
.regshift = 3, \
}
static struct plat_serial8250_port uart8250_data[] = {
DDB5477_PORT(0xbfa04200, VRC5477_IRQ_UART0),
DDB5477_PORT(0xbfa04240, VRC5477_IRQ_UART1),
{ },
};
static struct platform_device uart8250_device = {
.name = "serial8250",
.id = PLAT8250_DEV_PLATFORM,
.dev = {
.platform_data = uart8250_data,
},
};
static int __init uart8250_init(void)
{
return platform_device_register(&uart8250_device);
}
module_init(uart8250_init);
MODULE_AUTHOR("Ralf Baechle <ralf@linux-mips.org>");
MODULE_LICENSE("GPL");
MODULE_DESCRIPTION("8250 UART probe driver for the NEC DDB5477");

34
arch/mips/dec/prom/console.c
View File

@ -3,7 +3,7 @@
*
* DECstation PROM-based early console support.
*
* Copyright (C) 2004 Maciej W. Rozycki
* Copyright (C) 2004, 2007 Maciej W. Rozycki
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
@ -13,15 +13,35 @@
#include <linux/console.h>
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/string.h>
#include <asm/dec/prom.h>
void prom_putchar(char c)
static void __init prom_console_write(struct console *con, const char *s,
unsigned int c)
{
char s[2];
char buf[81];
unsigned int chunk = sizeof(buf) - 1;
s[0] = c;
s[1] = '\0';
prom_printf( s);
while (c > 0) {
if (chunk > c)
chunk = c;
memcpy(buf, s, chunk);
buf[chunk] = '\0';
prom_printf("%s", buf);
s += chunk;
c -= chunk;
}
}
static struct console promcons __initdata = {
.name = "prom",
.write = prom_console_write,
.flags = CON_BOOT | CON_PRINTBUFFER,
.index = -1,
};
void __init register_prom_console(void)
{
register_console(&promcons);
}

5
arch/mips/dec/prom/init.c
View File

@ -86,7 +86,7 @@ void __init which_prom(s32 magic, s32 *prom_vec)
void __init prom_init(void)
{
extern void ATTRIB_NORET dec_machine_halt(void);
extern void dec_machine_halt(void);
static char cpu_msg[] __initdata =
"Sorry, this kernel is compiled for a wrong CPU type!\n";
s32 argc = fw_arg0;
@ -103,6 +103,9 @@ void __init prom_init(void)
if (prom_is_rex(magic))
rex_clear_cache();
/* Register the early console. */
register_prom_console();
/* Were we compiled with the right CPU option? */
#if defined(CONFIG_CPU_R3000)
if ((current_cpu_data.cputype == CPU_R4000SC) ||

10
arch/mips/dec/reset.c
View File

@ -9,26 +9,26 @@
#include <asm/addrspace.h>
typedef void ATTRIB_NORET (* noret_func_t)(void);
typedef void __noreturn (* noret_func_t)(void);
static inline void ATTRIB_NORET back_to_prom(void)
static inline void __noreturn back_to_prom(void)
{
noret_func_t func = (void *)CKSEG1ADDR(0x1fc00000);
func();
}
void ATTRIB_NORET dec_machine_restart(char *command)
void __noreturn dec_machine_restart(char *command)
{
back_to_prom();
}
void ATTRIB_NORET dec_machine_halt(void)
void __noreturn dec_machine_halt(void)
{
back_to_prom();
}
void ATTRIB_NORET dec_machine_power_off(void)
void __noreturn dec_machine_power_off(void)
{
/* DECstations don't have a software power switch */
back_to_prom();

4
arch/mips/defconfig
View File

@ -25,9 +25,7 @@ CONFIG_ZONE_DMA=y
# CONFIG_BASLER_EXCITE is not set
# CONFIG_MIPS_COBALT is not set
# CONFIG_MACH_DECSTATION is not set
# CONFIG_MIPS_EV64120 is not set
# CONFIG_MACH_JAZZ is not set
# CONFIG_LASAT is not set
# CONFIG_MIPS_ATLAS is not set
# CONFIG_MIPS_MALTA is not set
# CONFIG_MIPS_SEAD is not set
@ -35,8 +33,6 @@ CONFIG_ZONE_DMA=y
# CONFIG_MIPS_SIM is not set
# CONFIG_MOMENCO_JAGUAR_ATX is not set
# CONFIG_MOMENCO_OCELOT is not set
# CONFIG_MOMENCO_OCELOT_3 is not set
# CONFIG_MOMENCO_OCELOT_C is not set
# CONFIG_MOMENCO_OCELOT_G is not set
# CONFIG_MIPS_XXS1500 is not set
# CONFIG_PNX8550_JBS is not set

3
arch/mips/gt64120/ev64120/Kconfig
View File

@ -1,3 +0,0 @@
config EVB_PCI1
bool "Enable Second PCI (PCI1)"
depends on MIPS_EV64120

9
arch/mips/gt64120/ev64120/Makefile
View File

@ -1,9 +0,0 @@
#
# Copyright 2000 RidgeRun, Inc.
# Author: RidgeRun, Inc.
# glonnon@ridgerun.com, skranz@ridgerun.com, stevej@ridgerun.com
#
# Makefile for the Galileo EV64120 board.
#
obj-y += irq.o promcon.o reset.o serialGT.o setup.o

116
arch/mips/gt64120/ev64120/irq.c
View File

@ -1,116 +0,0 @@
/*
* BRIEF MODULE DESCRIPTION
* Code to handle irqs on GT64120A boards
* Derived from mips/orion and Cort <cort@fsmlabs.com>
*
* Copyright (C) 2000 RidgeRun, Inc.
* Author: RidgeRun, Inc.
* glonnon@ridgerun.com, skranz@ridgerun.com, stevej@ridgerun.com
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*
* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
* NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#include <linux/errno.h>
#include <linux/init.h>
#include <linux/kernel_stat.h>
#include <linux/module.h>
#include <linux/signal.h>
#include <linux/sched.h>
#include <linux/types.h>
#include <linux/interrupt.h>
#include <linux/ioport.h>
#include <linux/timex.h>
#include <linux/slab.h>
#include <linux/random.h>
#include <linux/bitops.h>
#include <asm/bootinfo.h>
#include <asm/io.h>
#include <asm/mipsregs.h>
#include <asm/system.h>
#include <asm/gt64120.h>
asmlinkage void plat_irq_dispatch(void)
{
unsigned int pending = read_c0_status() & read_c0_cause() & ST0_IM;
if (pending & STATUSF_IP4) /* int2 hardware line (timer) */
do_IRQ(4);
else if (pending & STATUSF_IP2) /* int0 hardware line */
do_IRQ(GT_INTA);
else if (pending & STATUSF_IP5) /* int3 hardware line */
do_IRQ(GT_INTD);
else if (pending & STATUSF_IP6) /* int4 hardware line */
do_IRQ(6);
else if (pending & STATUSF_IP7) /* compare int */
do_IRQ(7);
else
spurious_interrupt();
}
static void disable_ev64120_irq(unsigned int irq_nr)
{
if (irq_nr >= 8) { // All PCI interrupts are on line 5 or 2
clear_c0_status(9 << 10);
} else {
clear_c0_status(1 << (irq_nr + 8));
}
}
static void enable_ev64120_irq(unsigned int irq_nr)
{
if (irq_nr >= 8) // All PCI interrupts are on line 5 or 2
set_c0_status(9 << 10);
else
set_c0_status(1 << (irq_nr + 8));
}
static void end_ev64120_irq(unsigned int irq)
{
if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
enable_ev64120_irq(irq);
}
static struct irq_chip ev64120_irq_type = {
.name = "EV64120",
.ack = disable_ev64120_irq,
.mask = disable_ev64120_irq,
.mask_ack = disable_ev64120_irq,
.unmask = enable_ev64120_irq,
.end = end_ev64120_irq,
};
void gt64120_irq_setup(void)
{
/*
* Clear all of the interrupts while we change the able around a bit.
*/
clear_c0_status(ST0_IM);
/*
* Enable timer. Other interrupts will be enabled as they are
* registered.
*/
set_c0_status(IE_IRQ2);
}
void __init arch_init_irq(void)
{
gt64120_irq_setup();
}

48
arch/mips/gt64120/ev64120/promcon.c
View File

@ -1,48 +0,0 @@
/*
* Wrap-around code for a console using the
* SGI PROM io-routines.
*
* Copyright (c) 1999 Ulf Carlsson
*
* Derived from DECstation promcon.c
* Copyright (c) 1998 Harald Koerfgen
*/
#include <linux/tty.h>
#include <linux/init.h>
#include <linux/console.h>
static void prom_console_write(struct console *co, const char *s,
unsigned count)
{
extern int CONSOLE_CHANNEL; // The default serial port
unsigned i;
for (i = 0; i < count; i++) {
if (*s == 10)
serial_putc(CONSOLE_CHANNEL, 13);
serial_putc(CONSOLE_CHANNEL, *s++);
}
}
static struct console sercons = {
.name = "ttyS",
.write = prom_console_write,
.flags = CON_PRINTBUFFER,
.index = -1,
};
/*
* Register console.
*/
static int gal_serial_console_init(void)
{
// serial_init();
//serial_set(115200);
register_console(&sercons);
return 0;
}
console_initcall(gal_serial_console_init);

45
arch/mips/gt64120/ev64120/reset.c
View File

@ -1,45 +0,0 @@
/*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
* Copyright (C) 1997 Ralf Baechle
*/
#include <linux/sched.h>
#include <linux/mm.h>
#include <asm/io.h>
#include <asm/pgtable.h>
#include <asm/processor.h>
#include <asm/reboot.h>
#include <asm/system.h>
void galileo_machine_restart(char *command)
{
*(volatile char *) 0xbc000000 = 0x0f;
/*
* Ouch, we're still alive ... This time we take the silver bullet ...
* ... and find that we leave the hardware in a state in which the
* kernel in the flush locks up somewhen during of after the PCI
* detection stuff.
*/
set_c0_status(ST0_BEV | ST0_ERL);
change_c0_config(CONF_CM_CMASK, CONF_CM_UNCACHED);
flush_cache_all();
write_c0_wired(0);
__asm__ __volatile__("jr\t%0"::"r"(0xbfc00000));
}
void galileo_machine_halt(void)
{
printk(KERN_NOTICE "You can safely turn off the power\n");
while (1)
__asm__(".set\tmips3\n\t"
"wait\n\t"
".set\tmips0");
}
void galileo_machine_power_off(void)
{
galileo_machine_halt();
}

212
arch/mips/gt64120/ev64120/serialGT.c
View File

@ -1,212 +0,0 @@
/*
* serialGT.c
*
* BRIEF MODULE DESCRIPTION
* Low Level Serial Port control for use
* with the Galileo EVB64120A MIPS eval board and
* its on board two channel 16552 Uart.
*
* Copyright (C) 2000 RidgeRun, Inc.
* Author: RidgeRun, Inc.
* glonnon@ridgerun.com, skranz@ridgerun.com, stevej@ridgerun.com
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*
* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
* NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*
*/
// Note:
// Serial CHANNELS - 0 is the bottom connector of evb64120A.
// (The one that maps to the "B" channel of the
// board's uart)
// 1 is the top connector of evb64120A.
// (The one that maps to the "A" channel of the
// board's uart)
int DEBUG_CHANNEL = 0; // See Note Above
int CONSOLE_CHANNEL = 1; // See Note Above
#define DUART 0xBD000000 /* Base address of Uart. */
#define CHANNELOFFSET 0x20 /* DUART+CHANNELOFFSET gets you to the ChanA
register set of the 16552 Uart device.
DUART+0 gets you to the ChanB register set.
*/
#define DUART_DELTA 0x4
#define FIFO_ENABLE 0x07
#define INT_ENABLE 0x04 /* default interrupt mask */
#define RBR 0x00
#define THR 0x00
#define DLL 0x00
#define IER 0x01
#define DLM 0x01
#define IIR 0x02
#define FCR 0x02
#define LCR 0x03
#define MCR 0x04
#define LSR 0x05
#define MSR 0x06
#define SCR 0x07
#define LCR_DLAB 0x80
#define XTAL 1843200
#define LSR_THRE 0x20
#define LSR_BI 0x10
#define LSR_DR 0x01
#define MCR_LOOP 0x10
#define ACCESS_DELAY 0x10000
/******************************
Routine:
Description:
******************************/
int inreg(int channel, int reg)
{
int val;
val =
*((volatile unsigned char *) DUART +
(channel * CHANNELOFFSET) + (reg * DUART_DELTA));
return val;
}
/******************************
Routine:
Description:
******************************/
void outreg(int channel, int reg, unsigned char val)
{
*((volatile unsigned char *) DUART + (channel * CHANNELOFFSET)
+ (reg * DUART_DELTA)) = val;
}
/******************************
Routine:
Description:
Initialize the device driver.
******************************/
void serial_init(int channel)
{
/*
* Configure active port, (CHANNELOFFSET already set.)
*
* Set 8 bits, 1 stop bit, no parity.
*
* LCR<7> 0 divisor latch access bit
* LCR<6> 0 break control (1=send break)
* LCR<5> 0 stick parity (0=space, 1=mark)
* LCR<4> 0 parity even (0=odd, 1=even)
* LCR<3> 0 parity enable (1=enabled)
* LCR<2> 0 # stop bits (0=1, 1=1.5)
* LCR<1:0> 11 bits per character(00=5, 01=6, 10=7, 11=8)
*/
outreg(channel, LCR, 0x3);
outreg(channel, FCR, FIFO_ENABLE); /* Enable the FIFO */
outreg(channel, IER, INT_ENABLE); /* Enable appropriate interrupts */
}
/******************************
Routine:
Description:
Set the baud rate.
******************************/
void serial_set(int channel, unsigned long baud)
{
unsigned char sav_lcr;
/*
* Enable access to the divisor latches by setting DLAB in LCR.
*
*/
sav_lcr = inreg(channel, LCR);
#if 0
/*
* Set baud rate
*/
outreg(channel, LCR, LCR_DLAB | sav_lcr);
// outreg(DLL,(XTAL/(16*2*(baud))-2));
outreg(channel, DLL, XTAL / (16 * baud));
// outreg(DLM,(XTAL/(16*2*(baud))-2)>>8);
outreg(channel, DLM, (XTAL / (16 * baud)) >> 8);
#else
/*
* Note: Set baud rate, hardcoded here for rate of 115200
* since became unsure of above "baud rate" algorithm (??).
*/
outreg(channel, LCR, 0x83);
outreg(channel, DLM, 0x00); // See note above
outreg(channel, DLL, 0x02); // See note above.
outreg(channel, LCR, 0x03);
#endif
/*
* Restore line control register
*/
outreg(channel, LCR, sav_lcr);
}
/******************************
Routine:
Description:
Transmit a character.
******************************/
void serial_putc(int channel, int c)
{
while ((inreg(channel, LSR) & LSR_THRE) == 0);
outreg(channel, THR, c);
}
/******************************
Routine:
Description:
Read a received character if one is
available. Return -1 otherwise.
******************************/
int serial_getc(int channel)
{
if (inreg(channel, LSR) & LSR_DR) {
return inreg(channel, RBR);
}
return -1;
}
/******************************
Routine:
Description:
Used by embedded gdb client. (example; gdb-stub.c)
******************************/
char getDebugChar()
{
int val;
while ((val = serial_getc(DEBUG_CHANNEL)) == -1); // loop until we get a character in.
return (char) val;
}
/******************************
Routine:
Description:
Used by embedded gdb target. (example; gdb-stub.c)
******************************/
void putDebugChar(char c)
{
serial_putc(DEBUG_CHANNEL, (int) c);
}

99
arch/mips/gt64120/ev64120/setup.c
View File

@ -1,99 +0,0 @@
/*
* Copyright (C) 2000 RidgeRun, Inc.
* Author: RidgeRun, Inc.
* glonnon@ridgerun.com, skranz@ridgerun.com, stevej@ridgerun.com
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*
* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
* NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*
*/
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/types.h>
#include <linux/mm.h>
#include <linux/swap.h>
#include <linux/ioport.h>
#include <linux/sched.h>
#include <linux/interrupt.h>
#include <linux/pci.h>
#include <linux/timex.h>
#include <linux/pm.h>
#include <asm/bootinfo.h>
#include <asm/page.h>
#include <asm/io.h>
#include <asm/irq.h>
#include <asm/pci.h>
#include <asm/processor.h>
#include <asm/time.h>
#include <asm/reboot.h>
#include <asm/traps.h>
#include <linux/bootmem.h>
unsigned long gt64120_base = KSEG1ADDR(0x14000000);
/* These functions are used for rebooting or halting the machine*/
extern void galileo_machine_restart(char *command);
extern void galileo_machine_halt(void);
extern void galileo_machine_power_off(void);
/*
*This structure holds pointers to the pci configuration space accesses
*and interrupts allocating routine for device over the PCI
*/
extern struct pci_ops galileo_pci_ops;
void __init prom_free_prom_memory(void)
{
}
/*
* Initializes basic routines and structures pointers, memory size (as
* given by the bios and saves the command line.
*/
void __init plat_mem_setup(void)
{
_machine_restart = galileo_machine_restart;
_machine_halt = galileo_machine_halt;
pm_power_off = galileo_machine_power_off;
set_io_port_base(KSEG1);
}
const char *get_system_type(void)
{
return "Galileo EV64120A";
}
/*
* Kernel arguments passed by the firmware
*
* $a0 - nothing
* $a1 - holds a pointer to the eprom parameters
* $a2 - nothing
*/
void __init prom_init(void)
{
mips_machgroup = MACH_GROUP_GALILEO;
mips_machtype = MACH_EV64120A;
add_memory_region(0, 32 << 20, BOOT_MEM_RAM);
}

2
arch/mips/gt64120/momenco_ocelot/Makefile
View File

@ -2,6 +2,6 @@
# Makefile for Momentum's Ocelot board.
#
obj-y += irq.o prom.o reset.o setup.o
obj-y += irq.o ocelot-platform.o prom.o reset.o setup.o
obj-$(CONFIG_KGDB) += dbg_io.o

46
arch/mips/gt64120/momenco_ocelot/ocelot-platform.c Normal file
View File

@ -0,0 +1,46 @@
/*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
* Copyright (C) 2007 Ralf Baechle (ralf@linux-mips.org)
*
* A NS16552 DUART with a 20MHz crystal.
*
*/
#include <linux/module.h>
#include <linux/init.h>
#include <linux/serial_8250.h>
#define OCELOT_UART_FLAGS (UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP)
static struct plat_serial8250_port uart8250_data[] = {
{
.mapbase = 0xe0001020,
.irq = 4,
.uartclk = 20000000,
.iotype = UPIO_MEM,
.flags = OCELOT_UART_FLAGS,
.regshift = 2,
},
{ },
};
static struct platform_device uart8250_device = {
.name = "serial8250",
.id = PLAT8250_DEV_PLATFORM,
.dev = {
.platform_data = uart8250_data,
},
};
static int __init uart8250_init(void)
{
return platform_device_register(&uart8250_device);
}
module_init(uart8250_init);
MODULE_AUTHOR("Ralf Baechle <ralf@linux-mips.org>");
MODULE_LICENSE("GPL");
MODULE_DESCRIPTION("8250 UART probe driver for the Momenco Ocelot");

4
arch/mips/gt64120/wrppmc/setup.c
View File

@ -158,8 +158,8 @@ const char *get_system_type(void)
*/
void __init prom_init(void)
{
mips_machgroup = MACH_GROUP_GALILEO;
mips_machtype = MACH_EV64120A;
mips_machgroup = MACH_GROUP_WINDRIVER;
mips_machtype = MACH_WRPPMC;
add_memory_region(WRPPMC_SDRAM_SCS0_BASE, WRPPMC_SDRAM_SCS0_SIZE, BOOT_MEM_RAM);
add_memory_region(WRPPMC_BOOTROM_BASE, WRPPMC_BOOTROM_SIZE, BOOT_MEM_ROM_DATA);

2
arch/mips/jazz/Makefile
View File

@ -2,4 +2,4 @@
# Makefile for the Jazz family specific parts of the kernel
#
obj-y := irq.o jazzdma.o reset.o setup.o
obj-y := irq.o jazzdma.o jazz-platform.o reset.o setup.o

60
arch/mips/jazz/jazz-platform.c Normal file
View File

@ -0,0 +1,60 @@
/*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
* Copyright (C) 2007 Ralf Baechle (ralf@linux-mips.org)
*/
#include <linux/init.h>
#include <linux/module.h>
#include <linux/serial_8250.h>
#include <asm/jazz.h>
/*
* Confusion ... It seems the original Microsoft Jazz machine used to have a
* 4.096MHz clock for its UART while the MIPS Magnum and Millenium systems
* had 8MHz. The Olivetti M700-10 and the Acer PICA have 1.8432MHz like PCs.
*/
#ifdef CONFIG_OLIVETTI_M700
#define JAZZ_BASE_BAUD 1843200
#else
#define JAZZ_BASE_BAUD 8000000 /* 3072000 */
#endif
#define JAZZ_UART_FLAGS (UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP)
#define JAZZ_PORT(base, int) \
{ \
.mapbase = base, \
.irq = int, \
.uartclk = JAZZ_BASE_BAUD, \
.iotype = UPIO_MEM, \
.flags = JAZZ_UART_FLAGS, \
.regshift = 0, \
}
static struct plat_serial8250_port uart8250_data[] = {
JAZZ_PORT(JAZZ_SERIAL1_BASE, JAZZ_SERIAL1_IRQ),
JAZZ_PORT(JAZZ_SERIAL2_BASE, JAZZ_SERIAL2_IRQ),
{ },
};
static struct platform_device uart8250_device = {
.name = "serial8250",
.id = PLAT8250_DEV_PLATFORM,
.dev = {
.platform_data = uart8250_data,
},
};
static int __init uart8250_init(void)
{
return platform_device_register(&uart8250_device);
}
module_init(uart8250_init);
MODULE_AUTHOR("Ralf Baechle <ralf@linux-mips.org>");
MODULE_LICENSE("GPL");
MODULE_DESCRIPTION("8250 UART probe driver for the Jazz family");

47
arch/mips/kernel/8250-platform.c Normal file
View File

@ -0,0 +1,47 @@
/*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
* Copyright (C) 2007 Ralf Baechle (ralf@linux-mips.org)
*/
#include <linux/module.h>
#include <linux/init.h>
#include <linux/serial_8250.h>
#define PORT(base, int) \
{ \
.iobase = base, \
.irq = int, \
.uartclk = 1843200, \
.iotype = UPIO_PORT, \
.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST, \
.regshift = 0, \
}
static struct plat_serial8250_port uart8250_data[] = {
PORT(0x3F8, 4),
PORT(0x2F8, 3),
PORT(0x3E8, 4),
PORT(0x2E8, 3),
{ },
};
static struct platform_device uart8250_device = {
.name = "serial8250",
.id = PLAT8250_DEV_PLATFORM,
.dev = {
.platform_data = uart8250_data,
},
};
static int __init uart8250_init(void)
{
return platform_device_register(&uart8250_device);
}
module_init(uart8250_init);
MODULE_AUTHOR("Ralf Baechle <ralf@linux-mips.org>");
MODULE_LICENSE("GPL");
MODULE_DESCRIPTION("Generic 8250 UART probe driver");

17
arch/mips/kernel/Makefile
View File

@ -14,14 +14,15 @@ binfmt_irix-objs := irixelf.o irixinv.o irixioctl.o irixsig.o \
obj-$(CONFIG_STACKTRACE) += stacktrace.o
obj-$(CONFIG_MODULES) += mips_ksyms.o module.o
obj-$(CONFIG_CPU_LOONGSON2) += r4k_fpu.o r4k_switch.o
obj-$(CONFIG_CPU_MIPS32) += r4k_fpu.o r4k_switch.o
obj-$(CONFIG_CPU_MIPS64) += r4k_fpu.o r4k_switch.o
obj-$(CONFIG_CPU_R3000) += r2300_fpu.o r2300_switch.o
obj-$(CONFIG_CPU_TX39XX) += r2300_fpu.o r2300_switch.o
obj-$(CONFIG_CPU_TX49XX) += r4k_fpu.o r4k_switch.o
obj-$(CONFIG_CPU_R4000) += r4k_fpu.o r4k_switch.o
obj-$(CONFIG_CPU_VR41XX) += r4k_fpu.o r4k_switch.o
obj-$(CONFIG_CPU_R4300) += r4k_fpu.o r4k_switch.o
obj-$(CONFIG_CPU_R4X00) += r4k_fpu.o r4k_switch.o
obj-$(CONFIG_CPU_R5000) += r4k_fpu.o r4k_switch.o
obj-$(CONFIG_CPU_R6000) += r6000_fpu.o r4k_switch.o
obj-$(CONFIG_CPU_R5432) += r4k_fpu.o r4k_switch.o
obj-$(CONFIG_CPU_R8000) += r4k_fpu.o r4k_switch.o
obj-$(CONFIG_CPU_RM7000) += r4k_fpu.o r4k_switch.o
@ -29,13 +30,14 @@ obj-$(CONFIG_CPU_RM9000) += r4k_fpu.o r4k_switch.o
obj-$(CONFIG_CPU_NEVADA) += r4k_fpu.o r4k_switch.o
obj-$(CONFIG_CPU_R10000) += r4k_fpu.o r4k_switch.o
obj-$(CONFIG_CPU_SB1) += r4k_fpu.o r4k_switch.o
obj-$(CONFIG_CPU_MIPS32) += r4k_fpu.o r4k_switch.o
obj-$(CONFIG_CPU_MIPS64) += r4k_fpu.o r4k_switch.o
obj-$(CONFIG_CPU_R6000) += r6000_fpu.o r4k_switch.o
obj-$(CONFIG_CPU_TX39XX) += r2300_fpu.o r2300_switch.o
obj-$(CONFIG_CPU_TX49XX) += r4k_fpu.o r4k_switch.o
obj-$(CONFIG_CPU_VR41XX) += r4k_fpu.o r4k_switch.o
obj-$(CONFIG_SMP) += smp.o
obj-$(CONFIG_MIPS_MT) += mips-mt.o
obj-$(CONFIG_MIPS_MT_FPAFF) += mips-mt-fpaff.o
obj-$(CONFIG_MIPS_MT_SMTC) += smtc.o smtc-asm.o smtc-proc.o
obj-$(CONFIG_MIPS_MT_SMP) += smp-mt.o
@ -47,7 +49,6 @@ obj-$(CONFIG_I8259) += i8259.o
obj-$(CONFIG_IRQ_CPU) += irq_cpu.o
obj-$(CONFIG_IRQ_CPU_RM7K) += irq-rm7000.o
obj-$(CONFIG_IRQ_CPU_RM9K) += irq-rm9000.o
obj-$(CONFIG_IRQ_MV64340) += irq-mv6434x.o
obj-$(CONFIG_MIPS_BOARDS_GEN) += irq-msc01.o
obj-$(CONFIG_32BIT) += scall32-o32.o
@ -68,3 +69,5 @@ obj-$(CONFIG_KEXEC) += machine_kexec.o relocate_kernel.o
obj-$(CONFIG_EARLY_PRINTK) += early_printk.o
CFLAGS_cpu-bugs64.o = $(shell if $(CC) $(CFLAGS) -Wa,-mdaddi -c -o /dev/null -xc /dev/null >/dev/null 2>&1; then echo "-DHAVE_AS_SET_DADDI"; fi)
obj-$(CONFIG_HAVE_STD_PC_SERIAL_PORT) += 8250-platform.o

30
arch/mips/kernel/cpu-probe.c
View File

@ -186,9 +186,29 @@ static inline void check_wait(void)
}
}
static inline void check_errata(void)
{
struct cpuinfo_mips *c = &current_cpu_data;
switch (c->cputype) {
case CPU_34K:
/*
* Erratum "RPS May Cause Incorrect Instruction Execution"
* This code only handles VPE0, any SMP/SMTC/RTOS code
* making use of VPE1 will be responsable for that VPE.
*/
if ((c->processor_id & PRID_REV_MASK) <= PRID_REV_34K_V1_0_2)
write_c0_config7(read_c0_config7() | MIPS_CONF7_RPS);
break;
default:
break;
}
}
void __init check_bugs32(void)
{
check_wait();
check_errata();
}
/*
@ -485,6 +505,14 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c)
MIPS_CPU_LLSC;
c->tlbsize = 64;
break;
case PRID_IMP_LOONGSON2:
c->cputype = CPU_LOONGSON2;
c->isa_level = MIPS_CPU_ISA_III;
c->options = R4K_OPTS |
MIPS_CPU_FPU | MIPS_CPU_LLSC |
MIPS_CPU_32FPR;
c->tlbsize = 64;
break;
}
}
@ -588,6 +616,8 @@ static inline unsigned int decode_config3(struct cpuinfo_mips *c)
c->options |= MIPS_CPU_VEIC;
if (config3 & MIPS_CONF3_MT)
c->ases |= MIPS_ASE_MIPSMT;
if (config3 & MIPS_CONF3_ULRI)
c->options |= MIPS_CPU_ULRI;
return config3 & MIPS_CONF_M;
}

10
arch/mips/kernel/head.S
View File

@ -16,6 +16,7 @@
#include <linux/init.h>
#include <linux/threads.h>
#include <asm/addrspace.h>
#include <asm/asm.h>
#include <asm/asmmacro.h>
#include <asm/irqflags.h>
@ -129,24 +130,25 @@
#endif
.endm
#ifndef CONFIG_NO_EXCEPT_FILL
/*
* Reserved space for exception handlers.
* Necessary for machines which link their kernels at KSEG0.
*/
.fill 0x400
#endif
EXPORT(stext) # used for profiling
EXPORT(_stext)
#ifdef CONFIG_MIPS_SIM
#ifdef CONFIG_BOOT_RAW
/*
* Give us a fighting chance of running if execution beings at the
* kernel load address. This is needed because this platform does
* not have a ELF loader yet.
*/
j kernel_entry
#endif
__INIT
#endif
NESTED(kernel_entry, 16, sp) # kernel entry point
@ -197,9 +199,7 @@ NESTED(kernel_entry, 16, sp) # kernel entry point
j start_kernel
END(kernel_entry)
#ifdef CONFIG_QEMU
__INIT
#endif
#ifdef CONFIG_SMP
/*

111
arch/mips/kernel/irq-mv6434x.c
View File

@ -1,111 +0,0 @@
/*
* Copyright 2002 Momentum Computer
* Author: mdharm@momenco.com
* Copyright (C) 2004, 06 Ralf Baechle <ralf@linux-mips.org>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
#include <linux/module.h>
#include <linux/interrupt.h>
#include <linux/kernel.h>
#include <linux/kernel_stat.h>
#include <linux/mv643xx.h>
#include <linux/sched.h>
#include <asm/io.h>
#include <asm/irq.h>
#include <asm/marvell.h>
static unsigned int irq_base;
static inline int ls1bit32(unsigned int x)
{
int b = 31, s;
s = 16; if (x << 16 == 0) s = 0; b -= s; x <<= s;
s = 8; if (x << 8 == 0) s = 0; b -= s; x <<= s;
s = 4; if (x << 4 == 0) s = 0; b -= s; x <<= s;
s = 2; if (x << 2 == 0) s = 0; b -= s; x <<= s;
s = 1; if (x << 1 == 0) s = 0; b -= s;
return b;
}
/* mask off an interrupt -- 1 is enable, 0 is disable */
static inline void mask_mv64340_irq(unsigned int irq)
{
uint32_t value;
if (irq < (irq_base + 32)) {
value = MV_READ(MV64340_INTERRUPT0_MASK_0_LOW);
value &= ~(1 << (irq - irq_base));
MV_WRITE(MV64340_INTERRUPT0_MASK_0_LOW, value);
} else {
value = MV_READ(MV64340_INTERRUPT0_MASK_0_HIGH);
value &= ~(1 << (irq - irq_base - 32));
MV_WRITE(MV64340_INTERRUPT0_MASK_0_HIGH, value);
}
}
/* unmask an interrupt -- 1 is enable, 0 is disable */
static inline void unmask_mv64340_irq(unsigned int irq)
{
uint32_t value;
if (irq < (irq_base + 32)) {
value = MV_READ(MV64340_INTERRUPT0_MASK_0_LOW);
value |= 1 << (irq - irq_base);
MV_WRITE(MV64340_INTERRUPT0_MASK_0_LOW, value);
} else {
value = MV_READ(MV64340_INTERRUPT0_MASK_0_HIGH);
value |= 1 << (irq - irq_base - 32);
MV_WRITE(MV64340_INTERRUPT0_MASK_0_HIGH, value);
}
}
/*
* Interrupt handler for interrupts coming from the Marvell chip.
* It could be built in ethernet ports etc...
*/
void ll_mv64340_irq(void)
{
unsigned int irq_src_low, irq_src_high;
unsigned int irq_mask_low, irq_mask_high;
/* read the interrupt status registers */
irq_mask_low = MV_READ(MV64340_INTERRUPT0_MASK_0_LOW);
irq_mask_high = MV_READ(MV64340_INTERRUPT0_MASK_0_HIGH);
irq_src_low = MV_READ(MV64340_MAIN_INTERRUPT_CAUSE_LOW);
irq_src_high = MV_READ(MV64340_MAIN_INTERRUPT_CAUSE_HIGH);
/* mask for just the interrupts we want */
irq_src_low &= irq_mask_low;
irq_src_high &= irq_mask_high;
if (irq_src_low)
do_IRQ(ls1bit32(irq_src_low) + irq_base);
else
do_IRQ(ls1bit32(irq_src_high) + irq_base + 32);
}
struct irq_chip mv64340_irq_type = {
.name = "MV-64340",
.ack = mask_mv64340_irq,
.mask = mask_mv64340_irq,
.mask_ack = mask_mv64340_irq,
.unmask = unmask_mv64340_irq,
};
void __init mv64340_irq_init(unsigned int base)
{
int i;
for (i = base; i < base + 64; i++)
set_irq_chip_and_handler(i, &mv64340_irq_type,
handle_level_irq);
irq_base = base;
}

176
arch/mips/kernel/mips-mt-fpaff.c Normal file
View File

@ -0,0 +1,176 @@
/*
* General MIPS MT support routines, usable in AP/SP, SMVP, or SMTC kernels
* Copyright (C) 2005 Mips Technologies, Inc
*/
#include <linux/cpu.h>
#include <linux/cpumask.h>
#include <linux/delay.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/sched.h>
#include <linux/security.h>
#include <linux/types.h>
#include <asm/uaccess.h>
/*
* CPU mask used to set process affinity for MT VPEs/TCs with FPUs
*/
cpumask_t mt_fpu_cpumask;
static int fpaff_threshold = -1;
unsigned long mt_fpemul_threshold = 0;
/*
* Replacement functions for the sys_sched_setaffinity() and
* sys_sched_getaffinity() system calls, so that we can integrate
* FPU affinity with the user's requested processor affinity.
* This code is 98% identical with the sys_sched_setaffinity()
* and sys_sched_getaffinity() system calls, and should be
* updated when kernel/sched.c changes.
*/
/*
* find_process_by_pid - find a process with a matching PID value.
* used in sys_sched_set/getaffinity() in kernel/sched.c, so
* cloned here.
*/
static inline struct task_struct *find_process_by_pid(pid_t pid)
{
return pid ? find_task_by_pid(pid) : current;
}
/*
* mipsmt_sys_sched_setaffinity - set the cpu affinity of a process
*/
asmlinkage long mipsmt_sys_sched_setaffinity(pid_t pid, unsigned int len,
unsigned long __user *user_mask_ptr)
{
cpumask_t new_mask;
cpumask_t effective_mask;
int retval;
struct task_struct *p;
if (len < sizeof(new_mask))
return -EINVAL;
if (copy_from_user(&new_mask, user_mask_ptr, sizeof(new_mask)))
return -EFAULT;
lock_cpu_hotplug();
read_lock(&tasklist_lock);
p = find_process_by_pid(pid);
if (!p) {
read_unlock(&tasklist_lock);
unlock_cpu_hotplug();
return -ESRCH;
}
/*
* It is not safe to call set_cpus_allowed with the
* tasklist_lock held. We will bump the task_struct's
* usage count and drop tasklist_lock before invoking
* set_cpus_allowed.
*/
get_task_struct(p);
retval = -EPERM;
if ((current->euid != p->euid) && (current->euid != p->uid) &&
!capable(CAP_SYS_NICE)) {
read_unlock(&tasklist_lock);
goto out_unlock;
}
retval = security_task_setscheduler(p, 0, NULL);
if (retval)
goto out_unlock;
/* Record new user-specified CPU set for future reference */
p->thread.user_cpus_allowed = new_mask;
/* Unlock the task list */
read_unlock(&tasklist_lock);
/* Compute new global allowed CPU set if necessary */
if ((p->thread.mflags & MF_FPUBOUND)
&& cpus_intersects(new_mask, mt_fpu_cpumask)) {
cpus_and(effective_mask, new_mask, mt_fpu_cpumask);
retval = set_cpus_allowed(p, effective_mask);
} else {
p->thread.mflags &= ~MF_FPUBOUND;
retval = set_cpus_allowed(p, new_mask);
}
out_unlock:
put_task_struct(p);
unlock_cpu_hotplug();
return retval;
}
/*
* mipsmt_sys_sched_getaffinity - get the cpu affinity of a process
*/
asmlinkage long mipsmt_sys_sched_getaffinity(pid_t pid, unsigned int len,
unsigned long __user *user_mask_ptr)
{
unsigned int real_len;
cpumask_t mask;
int retval;
struct task_struct *p;
real_len = sizeof(mask);
if (len < real_len)
return -EINVAL;
lock_cpu_hotplug();
read_lock(&tasklist_lock);
retval = -ESRCH;
p = find_process_by_pid(pid);
if (!p)
goto out_unlock;
retval = security_task_getscheduler(p);
if (retval)
goto out_unlock;
cpus_and(mask, p->thread.user_cpus_allowed, cpu_possible_map);
out_unlock:
read_unlock(&tasklist_lock);
unlock_cpu_hotplug();
if (retval)
return retval;
if (copy_to_user(user_mask_ptr, &mask, real_len))
return -EFAULT;
return real_len;
}
static int __init fpaff_thresh(char *str)
{
get_option(&str, &fpaff_threshold);
return 1;
}
__setup("fpaff=", fpaff_thresh);
/*
* FPU Use Factor empirically derived from experiments on 34K
*/
#define FPUSEFACTOR 333
static __init int mt_fp_affinity_init(void)
{
if (fpaff_threshold >= 0) {
mt_fpemul_threshold = fpaff_threshold;
} else {
mt_fpemul_threshold =
(FPUSEFACTOR * (loops_per_jiffy/(500000/HZ))) / HZ;
}
printk(KERN_DEBUG "FPU Affinity set after %ld emulations\n",
mt_fpemul_threshold);
return 0;
}
arch_initcall(mt_fp_affinity_init);

205
arch/mips/kernel/mips-mt.c
View File

@ -6,7 +6,6 @@
#include <linux/device.h>
#include <linux/kernel.h>
#include <linux/sched.h>
#include <linux/cpumask.h>
#include <linux/module.h>
#include <linux/interrupt.h>
#include <linux/security.h>
@ -22,149 +21,6 @@
#include <asm/r4kcache.h>
#include <asm/cacheflush.h>
/*
* CPU mask used to set process affinity for MT VPEs/TCs with FPUs
*/
cpumask_t mt_fpu_cpumask;
#ifdef CONFIG_MIPS_MT_FPAFF
#include <linux/cpu.h>
#include <linux/delay.h>
#include <asm/uaccess.h>
unsigned long mt_fpemul_threshold = 0;
/*
* Replacement functions for the sys_sched_setaffinity() and
* sys_sched_getaffinity() system calls, so that we can integrate
* FPU affinity with the user's requested processor affinity.
* This code is 98% identical with the sys_sched_setaffinity()
* and sys_sched_getaffinity() system calls, and should be
* updated when kernel/sched.c changes.
*/
/*
* find_process_by_pid - find a process with a matching PID value.
* used in sys_sched_set/getaffinity() in kernel/sched.c, so
* cloned here.
*/
static inline struct task_struct *find_process_by_pid(pid_t pid)
{
return pid ? find_task_by_pid(pid) : current;
}
/*
* mipsmt_sys_sched_setaffinity - set the cpu affinity of a process
*/
asmlinkage long mipsmt_sys_sched_setaffinity(pid_t pid, unsigned int len,
unsigned long __user *user_mask_ptr)
{
cpumask_t new_mask;
cpumask_t effective_mask;
int retval;
struct task_struct *p;
if (len < sizeof(new_mask))
return -EINVAL;
if (copy_from_user(&new_mask, user_mask_ptr, sizeof(new_mask)))
return -EFAULT;
lock_cpu_hotplug();
read_lock(&tasklist_lock);
p = find_process_by_pid(pid);
if (!p) {
read_unlock(&tasklist_lock);
unlock_cpu_hotplug();
return -ESRCH;
}
/*
* It is not safe to call set_cpus_allowed with the
* tasklist_lock held. We will bump the task_struct's
* usage count and drop tasklist_lock before invoking
* set_cpus_allowed.
*/
get_task_struct(p);
retval = -EPERM;
if ((current->euid != p->euid) && (current->euid != p->uid) &&
!capable(CAP_SYS_NICE)) {
read_unlock(&tasklist_lock);
goto out_unlock;
}
retval = security_task_setscheduler(p, 0, NULL);
if (retval)
goto out_unlock;
/* Record new user-specified CPU set for future reference */
p->thread.user_cpus_allowed = new_mask;
/* Unlock the task list */
read_unlock(&tasklist_lock);
/* Compute new global allowed CPU set if necessary */
if( (p->thread.mflags & MF_FPUBOUND)
&& cpus_intersects(new_mask, mt_fpu_cpumask)) {
cpus_and(effective_mask, new_mask, mt_fpu_cpumask);
retval = set_cpus_allowed(p, effective_mask);
} else {
p->thread.mflags &= ~MF_FPUBOUND;
retval = set_cpus_allowed(p, new_mask);
}
out_unlock:
put_task_struct(p);
unlock_cpu_hotplug();
return retval;
}
/*
* mipsmt_sys_sched_getaffinity - get the cpu affinity of a process
*/
asmlinkage long mipsmt_sys_sched_getaffinity(pid_t pid, unsigned int len,
unsigned long __user *user_mask_ptr)
{
unsigned int real_len;
cpumask_t mask;
int retval;
struct task_struct *p;
real_len = sizeof(mask);
if (len < real_len)
return -EINVAL;
lock_cpu_hotplug();
read_lock(&tasklist_lock);
retval = -ESRCH;
p = find_process_by_pid(pid);
if (!p)
goto out_unlock;
retval = security_task_getscheduler(p);
if (retval)
goto out_unlock;
cpus_and(mask, p->thread.user_cpus_allowed, cpu_possible_map);
out_unlock:
read_unlock(&tasklist_lock);
unlock_cpu_hotplug();
if (retval)
return retval;
if (copy_to_user(user_mask_ptr, &mask, real_len))
return -EFAULT;
return real_len;
}
#endif /* CONFIG_MIPS_MT_FPAFF */
/*
* Dump new MIPS MT state for the core. Does not leave TCs halted.
* Takes an argument which taken to be a pre-call MVPControl value.
@ -195,27 +51,31 @@ void mips_mt_regdump(unsigned long mvpctl)
nvpe = ((mvpconf0 & MVPCONF0_PVPE) >> MVPCONF0_PVPE_SHIFT) + 1;
ntc = ((mvpconf0 & MVPCONF0_PTC) >> MVPCONF0_PTC_SHIFT) + 1;
printk("-- per-VPE State --\n");
for(i = 0; i < nvpe; i++) {
for(tc = 0; tc < ntc; tc++) {
for (i = 0; i < nvpe; i++) {
for (tc = 0; tc < ntc; tc++) {
settc(tc);
if((read_tc_c0_tcbind() & TCBIND_CURVPE) == i) {
printk(" VPE %d\n", i);
printk(" VPEControl : %08lx\n", read_vpe_c0_vpecontrol());
printk(" VPEConf0 : %08lx\n", read_vpe_c0_vpeconf0());
printk(" VPE%d.Status : %08lx\n",
i, read_vpe_c0_status());
printk(" VPE%d.EPC : %08lx\n", i, read_vpe_c0_epc());
printk(" VPE%d.Cause : %08lx\n", i, read_vpe_c0_cause());
printk(" VPE%d.Config7 : %08lx\n",
i, read_vpe_c0_config7());
break; /* Next VPE */
if ((read_tc_c0_tcbind() & TCBIND_CURVPE) == i) {
printk(" VPE %d\n", i);
printk(" VPEControl : %08lx\n",
read_vpe_c0_vpecontrol());
printk(" VPEConf0 : %08lx\n",
read_vpe_c0_vpeconf0());
printk(" VPE%d.Status : %08lx\n",
i, read_vpe_c0_status());
printk(" VPE%d.EPC : %08lx\n",
i, read_vpe_c0_epc());
printk(" VPE%d.Cause : %08lx\n",
i, read_vpe_c0_cause());
printk(" VPE%d.Config7 : %08lx\n",
i, read_vpe_c0_config7());
break; /* Next VPE */
}
}
}
}
printk("-- per-TC State --\n");
for(tc = 0; tc < ntc; tc++) {
for (tc = 0; tc < ntc; tc++) {
settc(tc);
if(read_tc_c0_tcbind() == read_c0_tcbind()) {
if (read_tc_c0_tcbind() == read_c0_tcbind()) {
/* Are we dumping ourself? */
haltval = 0; /* Then we're not halted, and mustn't be */
tcstatval = flags; /* And pre-dump TCStatus is flags */
@ -310,17 +170,6 @@ static int __init ndflush(char *s)
return 1;
}
__setup("ndflush=", ndflush);
#ifdef CONFIG_MIPS_MT_FPAFF
static int fpaff_threshold = -1;
static int __init fpaff_thresh(char *str)
{
get_option(&str, &fpaff_threshold);
return 1;
}
__setup("fpaff=", fpaff_thresh);
#endif /* CONFIG_MIPS_MT_FPAFF */
static unsigned int itc_base = 0;
@ -376,20 +225,6 @@ void mips_mt_set_cpuoptions(void)
if (mt_n_dflushes != 1)
printk("D-Cache Flushes Repeated %d times\n", mt_n_dflushes);
#ifdef CONFIG_MIPS_MT_FPAFF
/* FPU Use Factor empirically derived from experiments on 34K */
#define FPUSEFACTOR 333
if (fpaff_threshold >= 0) {
mt_fpemul_threshold = fpaff_threshold;
} else {
mt_fpemul_threshold =
(FPUSEFACTOR * (loops_per_jiffy/(500000/HZ))) / HZ;
}
printk("FPU Affinity set after %ld emulations\n",
mt_fpemul_threshold);
#endif /* CONFIG_MIPS_MT_FPAFF */
if (itc_base != 0) {
/*
* Configure ITC mapping. This code is very

2
arch/mips/kernel/proc.c
View File

@ -14,7 +14,6 @@
#include <asm/cpu-features.h>
#include <asm/mipsregs.h>
#include <asm/processor.h>
#include <asm/watch.h>
unsigned int vced_count, vcei_count;
@ -84,6 +83,7 @@ static const char *cpu_name[] = {
[CPU_VR4181A] = "NEC VR4181A",
[CPU_SR71000] = "Sandcraft SR71000",
[CPU_PR4450] = "Philips PR4450",
[CPU_LOONGSON2] = "ICT Loongson-2",
};

4
arch/mips/kernel/process.c
View File

@ -46,7 +46,7 @@
* power and have a low exit latency (ie sit in a loop waiting for somebody to
* say that they'd like to reschedule)
*/
ATTRIB_NORET void cpu_idle(void)
void __noreturn cpu_idle(void)
{
/* endless idle loop with no priority at all */
while (1) {
@ -213,7 +213,7 @@ int dump_task_fpu (struct task_struct *t, elf_fpregset_t *fpr)
/*
* Create a kernel thread
*/
static ATTRIB_NORET void kernel_thread_helper(void *arg, int (*fn)(void *))
static void __noreturn kernel_thread_helper(void *arg, int (*fn)(void *))
{
do_exit(fn(arg));
}

16
arch/mips/kernel/setup.c
View File

@ -20,6 +20,7 @@
#include <linux/highmem.h>
#include <linux/console.h>
#include <linux/pfn.h>
#include <linux/debugfs.h>
#include <asm/addrspace.h>
#include <asm/bootinfo.h>
@ -574,3 +575,18 @@ __setup("nodsp", dsp_disable);
unsigned long kernelsp[NR_CPUS];
unsigned long fw_arg0, fw_arg1, fw_arg2, fw_arg3;
#ifdef CONFIG_DEBUG_FS
struct dentry *mips_debugfs_dir;
static int __init debugfs_mips(void)
{
struct dentry *d;
d = debugfs_create_dir("mips", NULL);
if (IS_ERR(d))
return PTR_ERR(d);
mips_debugfs_dir = d;
return 0;
}
arch_initcall(debugfs_mips);
#endif

2
arch/mips/kernel/smp.c
View File

@ -52,7 +52,7 @@ EXPORT_SYMBOL(phys_cpu_present_map);
EXPORT_SYMBOL(cpu_online_map);
extern void __init calibrate_delay(void);
extern ATTRIB_NORET void cpu_idle(void);
extern void cpu_idle(void);
/*
* First C code run on the secondary CPUs after being started up by

2
arch/mips/kernel/smtc.c
View File

@ -1104,7 +1104,7 @@ void smtc_idle_loop_hook(void)
mtflags = dmt();
pdb_msg = &id_ho_db_msg[0];
im = read_c0_status();
vpe = cpu_data[smp_processor_id()].vpe_id;
vpe = current_cpu_data.vpe_id;
for (bit = 0; bit < 8; bit++) {
/*
* In current prototype, I/O interrupts

5
arch/mips/kernel/syscall.c
View File

@ -272,9 +272,8 @@ asmlinkage int sys_set_thread_area(unsigned long addr)
struct thread_info *ti = task_thread_info(current);
ti->tp_value = addr;
/* If some future MIPS implementation has this register in hardware,
* we will need to update it here (and in context switches). */
if (cpu_has_userlocal)
write_c0_userlocal(addr);
return 0;
}

77
arch/mips/kernel/traps.c
View File

@ -39,7 +39,6 @@
#include <asm/traps.h>
#include <asm/uaccess.h>
#include <asm/mmu_context.h>
#include <asm/watch.h>
#include <asm/types.h>
#include <asm/stacktrace.h>
@ -70,6 +69,7 @@ extern asmlinkage void handle_reserved(void);
extern int fpu_emulator_cop1Handler(struct pt_regs *xcp,
struct mips_fpu_struct *ctx, int has_fpu);
void (*board_watchpoint_handler)(struct pt_regs *regs);
void (*board_be_init)(void);
int (*board_be_handler)(struct pt_regs *regs, int is_fixup);
void (*board_nmi_handler_setup)(void);
@ -311,7 +311,7 @@ void show_registers(struct pt_regs *regs)
static DEFINE_SPINLOCK(die_lock);
NORET_TYPE void ATTRIB_NORET die(const char * str, struct pt_regs * regs)
void __noreturn die(const char * str, struct pt_regs * regs)
{
static int die_counter;
#ifdef CONFIG_MIPS_MT_SMTC
@ -753,6 +753,33 @@ asmlinkage void do_ri(struct pt_regs *regs)
force_sig(SIGILL, current);
}
/*
* MIPS MT processors may have fewer FPU contexts than CPU threads. If we've
* emulated more than some threshold number of instructions, force migration to
* a "CPU" that has FP support.
*/
static void mt_ase_fp_affinity(void)
{
#ifdef CONFIG_MIPS_MT_FPAFF
if (mt_fpemul_threshold > 0 &&
((current->thread.emulated_fp++ > mt_fpemul_threshold))) {
/*
* If there's no FPU present, or if the application has already
* restricted the allowed set to exclude any CPUs with FPUs,
* we'll skip the procedure.
*/
if (cpus_intersects(current->cpus_allowed, mt_fpu_cpumask)) {
cpumask_t tmask;
cpus_and(tmask, current->thread.user_cpus_allowed,
mt_fpu_cpumask);
set_cpus_allowed(current, tmask);
current->thread.mflags |= MF_FPUBOUND;
}
}
#endif /* CONFIG_MIPS_MT_FPAFF */
}
asmlinkage void do_cpu(struct pt_regs *regs)
{
unsigned int cpid;
@ -786,36 +813,8 @@ asmlinkage void do_cpu(struct pt_regs *regs)
&current->thread.fpu, 0);
if (sig)
force_sig(sig, current);
#ifdef CONFIG_MIPS_MT_FPAFF
else {
/*
* MIPS MT processors may have fewer FPU contexts
* than CPU threads. If we've emulated more than
* some threshold number of instructions, force
* migration to a "CPU" that has FP support.
*/
if(mt_fpemul_threshold > 0
&& ((current->thread.emulated_fp++
> mt_fpemul_threshold))) {
/*
* If there's no FPU present, or if the
* application has already restricted
* the allowed set to exclude any CPUs
* with FPUs, we'll skip the procedure.
*/
if (cpus_intersects(current->cpus_allowed,
mt_fpu_cpumask)) {
cpumask_t tmask;
cpus_and(tmask,
current->thread.user_cpus_allowed,
mt_fpu_cpumask);
set_cpus_allowed(current, tmask);
current->thread.mflags |= MF_FPUBOUND;
}
}
}
#endif /* CONFIG_MIPS_MT_FPAFF */
else
mt_ase_fp_affinity();
}
return;
@ -835,6 +834,11 @@ asmlinkage void do_mdmx(struct pt_regs *regs)
asmlinkage void do_watch(struct pt_regs *regs)
{
if (board_watchpoint_handler) {
(*board_watchpoint_handler)(regs);
return;
}
/*
* We use the watch exception where available to detect stack
* overflows.
@ -1343,7 +1347,14 @@ void __init per_cpu_trap_init(void)
set_c0_status(ST0_MX);
#ifdef CONFIG_CPU_MIPSR2
write_c0_hwrena (0x0000000f); /* Allow rdhwr to all registers */
if (cpu_has_mips_r2) {
unsigned int enable = 0x0000000f;
if (cpu_has_userlocal)
enable |= (1 << 29);
write_c0_hwrena(enable);
}
#endif
#ifdef CONFIG_MIPS_MT_SMTC

41
arch/mips/kernel/unaligned.c
View File

@ -77,6 +77,7 @@
#include <linux/signal.h>
#include <linux/smp.h>
#include <linux/sched.h>
#include <linux/debugfs.h>
#include <asm/asm.h>
#include <asm/branch.h>
#include <asm/byteorder.h>
@ -87,9 +88,18 @@
#define STR(x) __STR(x)
#define __STR(x) #x
#ifdef CONFIG_PROC_FS
unsigned long unaligned_instructions;
enum {
UNALIGNED_ACTION_QUIET,
UNALIGNED_ACTION_SIGNAL,
UNALIGNED_ACTION_SHOW,
};
#ifdef CONFIG_DEBUG_FS
static u32 unaligned_instructions;
static u32 unaligned_action;
#else
#define unaligned_action UNALIGNED_ACTION_QUIET
#endif
extern void show_registers(struct pt_regs *regs);
static inline int emulate_load_store_insn(struct pt_regs *regs,
void __user *addr, unsigned int __user *pc,
@ -459,7 +469,7 @@ static inline int emulate_load_store_insn(struct pt_regs *regs,
goto sigill;
}
#ifdef CONFIG_PROC_FS
#ifdef CONFIG_DEBUG_FS
unaligned_instructions++;
#endif
@ -516,6 +526,10 @@ asmlinkage void do_ade(struct pt_regs *regs)
pc = (unsigned int __user *) exception_epc(regs);
if (user_mode(regs) && (current->thread.mflags & MF_FIXADE) == 0)
goto sigbus;
if (unaligned_action == UNALIGNED_ACTION_SIGNAL)
goto sigbus;
else if (unaligned_action == UNALIGNED_ACTION_SHOW)
show_registers(regs);
/*
* Do branch emulation only if we didn't forward the exception.
@ -546,3 +560,24 @@ sigbus:
* XXX On return from the signal handler we should advance the epc
*/
}
#ifdef CONFIG_DEBUG_FS
extern struct dentry *mips_debugfs_dir;
static int __init debugfs_unaligned(void)
{
struct dentry *d;
if (!mips_debugfs_dir)
return -ENODEV;
d = debugfs_create_u32("unaligned_instructions", S_IRUGO,
mips_debugfs_dir, &unaligned_instructions);
if (IS_ERR(d))
return PTR_ERR(d);
d = debugfs_create_u32("unaligned_action", S_IRUGO | S_IWUSR,
mips_debugfs_dir, &unaligned_action);
if (IS_ERR(d))
return PTR_ERR(d);
return 0;
}
__initcall(debugfs_unaligned);
#endif

15
arch/mips/lasat/Kconfig
View File

@ -1,15 +0,0 @@
config PICVUE
tristate "PICVUE LCD display driver"
depends on LASAT
config PICVUE_PROC
tristate "PICVUE LCD display driver /proc interface"
depends on PICVUE
config DS1603
bool "DS1603 RTC driver"
depends on LASAT
config LASAT_SYSCTL
bool "LASAT sysctl interface"
depends on LASAT

14
arch/mips/lasat/Makefile
View File

@ -1,14 +0,0 @@
#
# Makefile for the LASAT specific kernel interface routines under Linux.
#
obj-y += reset.o setup.o prom.o lasat_board.o \
at93c.o interrupt.o
obj-$(CONFIG_LASAT_SYSCTL) += sysctl.o
obj-$(CONFIG_DS1603) += ds1603.o
obj-$(CONFIG_PICVUE) += picvue.o
obj-$(CONFIG_PICVUE_PROC) += picvue_proc.o
clean:
make -C image clean

148
arch/mips/lasat/at93c.c
View File

@ -1,148 +0,0 @@
/*
* Atmel AT93C46 serial eeprom driver
*
* Brian Murphy <brian.murphy@eicon.com>
*
*/
#include <linux/kernel.h>
#include <linux/delay.h>
#include <asm/lasat/lasat.h>
#include <linux/module.h>
#include <linux/init.h>
#include "at93c.h"
#define AT93C_ADDR_SHIFT 7
#define AT93C_ADDR_MAX ((1 << AT93C_ADDR_SHIFT) - 1)
#define AT93C_RCMD (0x6 << AT93C_ADDR_SHIFT)
#define AT93C_WCMD (0x5 << AT93C_ADDR_SHIFT)
#define AT93C_WENCMD 0x260
#define AT93C_WDSCMD 0x200
struct at93c_defs *at93c;
static void at93c_reg_write(u32 val)
{
*at93c->reg = val;
}
static u32 at93c_reg_read(void)
{
u32 tmp = *at93c->reg;
return tmp;
}
static u32 at93c_datareg_read(void)
{
u32 tmp = *at93c->rdata_reg;
return tmp;
}
static void at93c_cycle_clk(u32 data)
{
at93c_reg_write(data | at93c->clk);
lasat_ndelay(250);
at93c_reg_write(data & ~at93c->clk);
lasat_ndelay(250);
}
static void at93c_write_databit(u8 bit)
{
u32 data = at93c_reg_read();
if (bit)
data |= 1 << at93c->wdata_shift;
else
data &= ~(1 << at93c->wdata_shift);
at93c_reg_write(data);
lasat_ndelay(100);
at93c_cycle_clk(data);
}
static unsigned int at93c_read_databit(void)
{
u32 data;
at93c_cycle_clk(at93c_reg_read());
data = (at93c_datareg_read() >> at93c->rdata_shift) & 1;
return data;
}
static u8 at93c_read_byte(void)
{
int i;
u8 data = 0;
for (i = 0; i<=7; i++) {
data <<= 1;
data |= at93c_read_databit();
}
return data;
}
static void at93c_write_bits(u32 data, int size)
{
int i;
int shift = size - 1;
u32 mask = (1 << shift);
for (i = 0; i < size; i++) {
at93c_write_databit((data & mask) >> shift);
data <<= 1;
}
}
static void at93c_init_op(void)
{
at93c_reg_write((at93c_reg_read() | at93c->cs) & ~at93c->clk & ~(1 << at93c->rdata_shift));
lasat_ndelay(50);
}
static void at93c_end_op(void)
{
at93c_reg_write(at93c_reg_read() & ~at93c->cs);
lasat_ndelay(250);
}
static void at93c_wait(void)
{
at93c_init_op();
while (!at93c_read_databit())
;
at93c_end_op();
};
static void at93c_disable_wp(void)
{
at93c_init_op();
at93c_write_bits(AT93C_WENCMD, 10);
at93c_end_op();
}
static void at93c_enable_wp(void)
{
at93c_init_op();
at93c_write_bits(AT93C_WDSCMD, 10);
at93c_end_op();
}
u8 at93c_read(u8 addr)
{
u8 byte;
at93c_init_op();
at93c_write_bits((addr & AT93C_ADDR_MAX)|AT93C_RCMD, 10);
byte = at93c_read_byte();
at93c_end_op();
return byte;
}
void at93c_write(u8 addr, u8 data)
{
at93c_disable_wp();
at93c_init_op();
at93c_write_bits((addr & AT93C_ADDR_MAX)|AT93C_WCMD, 10);
at93c_write_bits(data, 8);
at93c_end_op();
at93c_wait();
at93c_enable_wp();
}

18
arch/mips/lasat/at93c.h
View File

@ -1,18 +0,0 @@
/*
* Atmel AT93C46 serial eeprom driver
*
* Brian Murphy <brian.murphy@eicon.com>
*
*/
extern struct at93c_defs {
volatile u32 *reg;
volatile u32 *rdata_reg;
int rdata_shift;
int wdata_shift;
u32 cs;
u32 clk;
} *at93c;
u8 at93c_read(u8 addr);
void at93c_write(u8 addr, u8 data);

183
arch/mips/lasat/ds1603.c
View File

@ -1,183 +0,0 @@
/*
* Dallas Semiconductors 1603 RTC driver
*
* Brian Murphy <brian@murphy.dk>
*
*/
#include <linux/kernel.h>
#include <asm/lasat/lasat.h>
#include <linux/delay.h>
#include <asm/lasat/ds1603.h>
#include <asm/time.h>
#include "ds1603.h"
#define READ_TIME_CMD 0x81
#define SET_TIME_CMD 0x80
#define TRIMMER_SET_CMD 0xC0
#define TRIMMER_VALUE_MASK 0x38
#define TRIMMER_SHIFT 3
struct ds_defs *ds1603 = NULL;
/* HW specific register functions */
static void rtc_reg_write(unsigned long val)
{
*ds1603->reg = val;
}
static unsigned long rtc_reg_read(void)
{
unsigned long tmp = *ds1603->reg;
return tmp;
}
static unsigned long rtc_datareg_read(void)
{
unsigned long tmp = *ds1603->data_reg;
return tmp;
}
static void rtc_nrst_high(void)
{
rtc_reg_write(rtc_reg_read() | ds1603->rst);
}
static void rtc_nrst_low(void)
{
rtc_reg_write(rtc_reg_read() & ~ds1603->rst);
}
static void rtc_cycle_clock(unsigned long data)
{
data |= ds1603->clk;
rtc_reg_write(data);
lasat_ndelay(250);
if (ds1603->data_reversed)
data &= ~ds1603->data;
else
data |= ds1603->data;
data &= ~ds1603->clk;
rtc_reg_write(data);
lasat_ndelay(250 + ds1603->huge_delay);
}
static void rtc_write_databit(unsigned int bit)
{
unsigned long data = rtc_reg_read();
if (ds1603->data_reversed)
bit = !bit;
if (bit)
data |= ds1603->data;
else
data &= ~ds1603->data;
rtc_reg_write(data);
lasat_ndelay(50 + ds1603->huge_delay);
rtc_cycle_clock(data);
}
static unsigned int rtc_read_databit(void)
{
unsigned int data;
data = (rtc_datareg_read() & (1 << ds1603->data_read_shift))
>> ds1603->data_read_shift;
rtc_cycle_clock(rtc_reg_read());
return data;
}
static void rtc_write_byte(unsigned int byte)
{
int i;
for (i = 0; i<=7; i++) {
rtc_write_databit(byte & 1L);
byte >>= 1;
}
}
static void rtc_write_word(unsigned long word)
{
int i;
for (i = 0; i<=31; i++) {
rtc_write_databit(word & 1L);
word >>= 1;
}
}
static unsigned long rtc_read_word(void)
{
int i;
unsigned long word = 0;
unsigned long shift = 0;
for (i = 0; i<=31; i++) {
word |= rtc_read_databit() << shift;
shift++;
}
return word;
}
static void rtc_init_op(void)
{
rtc_nrst_high();
rtc_reg_write(rtc_reg_read() & ~ds1603->clk);
lasat_ndelay(50);
}
static void rtc_end_op(void)
{
rtc_nrst_low();
lasat_ndelay(1000);
}
/* interface */
unsigned long ds1603_read(void)
{
unsigned long word;
unsigned long flags;
spin_lock_irqsave(&rtc_lock, flags);
rtc_init_op();
rtc_write_byte(READ_TIME_CMD);
word = rtc_read_word();
rtc_end_op();
spin_unlock_irqrestore(&rtc_lock, flags);
return word;
}
int ds1603_set(unsigned long time)
{
unsigned long flags;
spin_lock_irqsave(&rtc_lock, flags);
rtc_init_op();
rtc_write_byte(SET_TIME_CMD);
rtc_write_word(time);
rtc_end_op();
spin_unlock_irqrestore(&rtc_lock, flags);
return 0;
}
void ds1603_set_trimmer(unsigned int trimval)
{
rtc_init_op();
rtc_write_byte(((trimval << TRIMMER_SHIFT) & TRIMMER_VALUE_MASK)
| (TRIMMER_SET_CMD));
rtc_end_op();
}
void ds1603_disable(void)
{
ds1603_set_trimmer(TRIMMER_DISABLE_RTC);
}
void ds1603_enable(void)
{
ds1603_set_trimmer(TRIMMER_DEFAULT);
}

33
arch/mips/lasat/ds1603.h
View File

@ -1,33 +0,0 @@
/*
* Dallas Semiconductors 1603 RTC driver
*
* Brian Murphy <brian@murphy.dk>
*
*/
#ifndef __DS1603_H
#define __DS1603_H
struct ds_defs {
volatile u32 *reg;
volatile u32 *data_reg;
u32 rst;
u32 clk;
u32 data;
u32 data_read_shift;
char data_reversed;
u32 huge_delay;
};
extern struct ds_defs *ds1603;
unsigned long ds1603_read(void);
int ds1603_set(unsigned long);
void ds1603_set_trimmer(unsigned int);
void ds1603_enable(void);
void ds1603_disable(void);
void ds1603_init(struct ds_defs *);
#define TRIMMER_DEFAULT 3
#define TRIMMER_DISABLE_RTC 0
#endif

53
arch/mips/lasat/image/Makefile
View File

@ -1,53 +0,0 @@
#
# MAKEFILE FOR THE MIPS LINUX BOOTLOADER AND ROM DEBUGGER
#
# i-data Networks
#
# Author: Thomas Horsten <thh@i-data.com>
#
ifndef Version
Version = "$(USER)-test"
endif
MKLASATIMG = mklasatimg
MKLASATIMG_ARCH = mq2,mqpro,sp100,sp200
KERNEL_IMAGE = $(TOPDIR)/vmlinux
KERNEL_START = $(shell $(NM) $(KERNEL_IMAGE) | grep " _text" | cut -f1 -d\ )
KERNEL_ENTRY = $(shell $(NM) $(KERNEL_IMAGE) | grep kernel_entry | cut -f1 -d\ )
LDSCRIPT= -L$(obj) -Tromscript.normal
HEAD_DEFINES := -D_kernel_start=0x$(KERNEL_START) \
-D_kernel_entry=0x$(KERNEL_ENTRY) \
-D VERSION="\"$(Version)\"" \
-D TIMESTAMP=$(shell date +%s)
$(obj)/head.o: $(obj)/head.S $(KERNEL_IMAGE)
$(CC) -fno-pic $(HEAD_DEFINES) -I$(TOPDIR)/include -c -o $@ $<
OBJECTS = head.o kImage.o
rom.sw: $(obj)/rom.sw
$(obj)/rom.sw: $(obj)/rom.bin
$(MKLASATIMG) -o $@ -k $^ -m $(MKLASATIMG_ARCH)
$(obj)/rom.bin: $(obj)/rom
$(OBJCOPY) -O binary -S $^ $@
# Rule to make the bootloader
$(obj)/rom: $(addprefix $(obj)/,$(OBJECTS))
$(LD) $(LDFLAGS) $(LDSCRIPT) -o $@ $^
$(obj)/%.o: $(obj)/%.gz
$(LD) -r -o $@ -b binary $<
$(obj)/%.gz: $(obj)/%.bin
gzip -cf -9 $< > $@
$(obj)/kImage.bin: $(KERNEL_IMAGE)
$(OBJCOPY) -O binary -S $^ $@
clean:
rm -f rom rom.bin rom.sw kImage.bin kImage.o

31
arch/mips/lasat/image/head.S
View File

@ -1,31 +0,0 @@
#include <asm/lasat/head.h>
.text
.section .text.start, "ax"
.set noreorder
.set mips3
/* Magic words identifying a software image */
.word LASAT_K_MAGIC0_VAL
.word LASAT_K_MAGIC1_VAL
/* Image header version */
.word 0x00000002
/* image start and size */
.word _image_start
.word _image_size
/* start of kernel and entrypoint in uncompressed image */
.word _kernel_start
.word _kernel_entry
/* Here we have room for future flags */
.org 0x40
reldate:
.word TIMESTAMP
.org 0x50
release:
.string VERSION

23
arch/mips/lasat/image/romscript.normal
View File

@ -1,23 +0,0 @@
OUTPUT_ARCH(mips)
SECTIONS
{
.text :
{
*(.text.start)
}
/* Data in ROM */
.data ALIGN(0x10) :
{
*(.data)
}
_image_start = ADDR(.data);
_image_size = SIZEOF(.data);
.other :
{
*(.*)
}
}

130
arch/mips/lasat/interrupt.c
View File

@ -1,130 +0,0 @@
/*
* Carsten Langgaard, carstenl@mips.com
* Copyright (C) 1999,2000 MIPS Technologies, Inc. All rights reserved.
*
* This program is free software; you can distribute it and/or modify it
* under the terms of the GNU General Public License (Version 2) as
* published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
* for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
*
* Routines for generic manipulation of the interrupts found on the
* Lasat boards.
*/
#include <linux/init.h>
#include <linux/sched.h>
#include <linux/slab.h>
#include <linux/interrupt.h>
#include <linux/kernel_stat.h>
#include <asm/bootinfo.h>
#include <asm/irq.h>
#include <asm/lasat/lasatint.h>
#include <asm/time.h>
#include <asm/gdb-stub.h>
static volatile int *lasat_int_status = NULL;
static volatile int *lasat_int_mask = NULL;
static volatile int lasat_int_mask_shift;
void disable_lasat_irq(unsigned int irq_nr)
{
*lasat_int_mask &= ~(1 << irq_nr) << lasat_int_mask_shift;
}
void enable_lasat_irq(unsigned int irq_nr)
{
*lasat_int_mask |= (1 << irq_nr) << lasat_int_mask_shift;
}
static struct irq_chip lasat_irq_type = {
.name = "Lasat",
.ack = disable_lasat_irq,
.mask = disable_lasat_irq,
.mask_ack = disable_lasat_irq,
.unmask = enable_lasat_irq,
};
static inline int ls1bit32(unsigned int x)
{
int b = 31, s;
s = 16; if (x << 16 == 0) s = 0; b -= s; x <<= s;
s = 8; if (x << 8 == 0) s = 0; b -= s; x <<= s;
s = 4; if (x << 4 == 0) s = 0; b -= s; x <<= s;
s = 2; if (x << 2 == 0) s = 0; b -= s; x <<= s;
s = 1; if (x << 1 == 0) s = 0; b -= s;
return b;
}
static unsigned long (* get_int_status)(void);
static unsigned long get_int_status_100(void)
{
return *lasat_int_status & *lasat_int_mask;
}
static unsigned long get_int_status_200(void)
{
unsigned long int_status;
int_status = *lasat_int_status;
int_status &= (int_status >> LASATINT_MASK_SHIFT_200) & 0xffff;
return int_status;
}
asmlinkage void plat_irq_dispatch(void)
{
unsigned long int_status;
unsigned int cause = read_c0_cause();
int irq;
if (cause & CAUSEF_IP7) { /* R4000 count / compare IRQ */
ll_timer_interrupt(7);
return;
}
int_status = get_int_status();
/* if int_status == 0, then the interrupt has already been cleared */
if (int_status) {
irq = ls1bit32(int_status);
do_IRQ(irq);
}
}
void __init arch_init_irq(void)
{
int i;
switch (mips_machtype) {
case MACH_LASAT_100:
lasat_int_status = (void *)LASAT_INT_STATUS_REG_100;
lasat_int_mask = (void *)LASAT_INT_MASK_REG_100;
lasat_int_mask_shift = LASATINT_MASK_SHIFT_100;
get_int_status = get_int_status_100;
*lasat_int_mask = 0;
break;
case MACH_LASAT_200:
lasat_int_status = (void *)LASAT_INT_STATUS_REG_200;
lasat_int_mask = (void *)LASAT_INT_MASK_REG_200;
lasat_int_mask_shift = LASATINT_MASK_SHIFT_200;
get_int_status = get_int_status_200;
*lasat_int_mask &= 0xffff;
break;
default:
panic("arch_init_irq: mips_machtype incorrect");
}
for (i = 0; i <= LASATINT_END; i++)
set_irq_chip_and_handler(i, &lasat_irq_type, handle_level_irq);
}

279
arch/mips/lasat/lasat_board.c
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@ -1,279 +0,0 @@
/*
* Thomas Horsten <thh@lasat.com>
* Copyright (C) 2000 LASAT Networks A/S.
*
* This program is free software; you can distribute it and/or modify it
* under the terms of the GNU General Public License (Version 2) as
* published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
* for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
*
* Routines specific to the LASAT boards
*/
#include <linux/types.h>
#include <linux/crc32.h>
#include <asm/lasat/lasat.h>
#include <linux/kernel.h>
#include <linux/string.h>
#include <linux/ctype.h>
#include <asm/bootinfo.h>
#include <asm/addrspace.h>
#include "at93c.h"
/* New model description table */
#include "lasat_models.h"
#define EEPROM_CRC(data, len) (~0 ^ crc32(~0, data, len))
struct lasat_info lasat_board_info;
void update_bcastaddr(void);
int EEPROMRead(unsigned int pos, unsigned char *data, int len)
{
int i;
for (i=0; i<len; i++)
*data++ = at93c_read(pos++);
return 0;
}
int EEPROMWrite(unsigned int pos, unsigned char *data, int len)
{
int i;
for (i=0; i<len; i++)
at93c_write(pos++, *data++);
return 0;
}
static void init_flash_sizes(void)
{
int i;
unsigned long *lb = lasat_board_info.li_flashpart_base;
unsigned long *ls = lasat_board_info.li_flashpart_size;
ls[LASAT_MTD_BOOTLOADER] = 0x40000;
ls[LASAT_MTD_SERVICE] = 0xC0000;
ls[LASAT_MTD_NORMAL] = 0x100000;
if (mips_machtype == MACH_LASAT_100) {
lasat_board_info.li_flash_base = 0x1e000000;
lb[LASAT_MTD_BOOTLOADER] = 0x1e400000;
if (lasat_board_info.li_flash_size > 0x200000) {
ls[LASAT_MTD_CONFIG] = 0x100000;
ls[LASAT_MTD_FS] = 0x500000;
}
} else {
lasat_board_info.li_flash_base = 0x10000000;
if (lasat_board_info.li_flash_size < 0x1000000) {
lb[LASAT_MTD_BOOTLOADER] = 0x10000000;
ls[LASAT_MTD_CONFIG] = 0x100000;
if (lasat_board_info.li_flash_size >= 0x400000) {
ls[LASAT_MTD_FS] = lasat_board_info.li_flash_size - 0x300000;
}
}
}
for (i = 1; i < LASAT_MTD_LAST; i++)
lb[i] = lb[i-1] + ls[i-1];
}
int lasat_init_board_info(void)
{
int c;
unsigned long crc;
unsigned long cfg0, cfg1;
const product_info_t *ppi;
int i_n_base_models = N_BASE_MODELS;
const char * const * i_txt_base_models = txt_base_models;
int i_n_prids = N_PRIDS;
memset(&lasat_board_info, 0, sizeof(lasat_board_info));
/* First read the EEPROM info */
EEPROMRead(0, (unsigned char *)&lasat_board_info.li_eeprom_info,
sizeof(struct lasat_eeprom_struct));
/* Check the CRC */
crc = EEPROM_CRC((unsigned char *)(&lasat_board_info.li_eeprom_info),
sizeof(struct lasat_eeprom_struct) - 4);
if (crc != lasat_board_info.li_eeprom_info.crc32) {
printk(KERN_WARNING "WARNING...\nWARNING...\nEEPROM CRC does "
"not match calculated, attempting to soldier on...\n");
}
if (lasat_board_info.li_eeprom_info.version != LASAT_EEPROM_VERSION) {
printk(KERN_WARNING "WARNING...\nWARNING...\nEEPROM version "
"%d, wanted version %d, attempting to soldier on...\n",
(unsigned int)lasat_board_info.li_eeprom_info.version,
LASAT_EEPROM_VERSION);
}
cfg0 = lasat_board_info.li_eeprom_info.cfg[0];
cfg1 = lasat_board_info.li_eeprom_info.cfg[1];
if ( LASAT_W0_DSCTYPE(cfg0) != 1) {
printk(KERN_WARNING "WARNING...\nWARNING...\n"
"Invalid configuration read from EEPROM, attempting to "
"soldier on...");
}
/* We have a valid configuration */
switch (LASAT_W0_SDRAMBANKSZ(cfg0)) {
case 0:
lasat_board_info.li_memsize = 0x0800000;
break;
case 1:
lasat_board_info.li_memsize = 0x1000000;
break;
case 2:
lasat_board_info.li_memsize = 0x2000000;
break;
case 3:
lasat_board_info.li_memsize = 0x4000000;
break;
case 4:
lasat_board_info.li_memsize = 0x8000000;
break;
default:
lasat_board_info.li_memsize = 0;
}
switch (LASAT_W0_SDRAMBANKS(cfg0)) {
case 0:
break;
case 1:
lasat_board_info.li_memsize *= 2;
break;
default:
break;
}
switch (LASAT_W0_BUSSPEED(cfg0)) {
case 0x0:
lasat_board_info.li_bus_hz = 60000000;
break;
case 0x1:
lasat_board_info.li_bus_hz = 66000000;
break;
case 0x2:
lasat_board_info.li_bus_hz = 66666667;
break;
case 0x3:
lasat_board_info.li_bus_hz = 80000000;
break;
case 0x4:
lasat_board_info.li_bus_hz = 83333333;
break;
case 0x5:
lasat_board_info.li_bus_hz = 100000000;
break;
}
switch (LASAT_W0_CPUCLK(cfg0)) {
case 0x0:
lasat_board_info.li_cpu_hz =
lasat_board_info.li_bus_hz;
break;
case 0x1:
lasat_board_info.li_cpu_hz =
lasat_board_info.li_bus_hz +
(lasat_board_info.li_bus_hz >> 1);
break;
case 0x2:
lasat_board_info.li_cpu_hz =
lasat_board_info.li_bus_hz +
lasat_board_info.li_bus_hz;
break;
case 0x3:
lasat_board_info.li_cpu_hz =
lasat_board_info.li_bus_hz +
lasat_board_info.li_bus_hz +
(lasat_board_info.li_bus_hz >> 1);
break;
case 0x4:
lasat_board_info.li_cpu_hz =
lasat_board_info.li_bus_hz +
lasat_board_info.li_bus_hz +
lasat_board_info.li_bus_hz;
break;
}
/* Flash size */
switch (LASAT_W1_FLASHSIZE(cfg1)) {
case 0:
lasat_board_info.li_flash_size = 0x200000;
break;
case 1:
lasat_board_info.li_flash_size = 0x400000;
break;
case 2:
lasat_board_info.li_flash_size = 0x800000;
break;
case 3:
lasat_board_info.li_flash_size = 0x1000000;
break;
case 4:
lasat_board_info.li_flash_size = 0x2000000;
break;
}
init_flash_sizes();
lasat_board_info.li_bmid = LASAT_W0_BMID(cfg0);
lasat_board_info.li_prid = lasat_board_info.li_eeprom_info.prid;
if (lasat_board_info.li_prid == 0xffff || lasat_board_info.li_prid == 0)
lasat_board_info.li_prid = lasat_board_info.li_bmid;
/* Base model stuff */
if (lasat_board_info.li_bmid > i_n_base_models)
lasat_board_info.li_bmid = i_n_base_models;
strcpy(lasat_board_info.li_bmstr, i_txt_base_models[lasat_board_info.li_bmid]);
/* Product ID dependent values */
c = lasat_board_info.li_prid;
if (c >= i_n_prids) {
strcpy(lasat_board_info.li_namestr, "Unknown Model");
strcpy(lasat_board_info.li_typestr, "Unknown Type");
} else {
ppi = &vendor_info_table[0].vi_product_info[c];
strcpy(lasat_board_info.li_namestr, ppi->pi_name);
if (ppi->pi_type)
strcpy(lasat_board_info.li_typestr, ppi->pi_type);
else
sprintf(lasat_board_info.li_typestr, "%d",10*c);
}
#if defined(CONFIG_INET) && defined(CONFIG_SYSCTL)
update_bcastaddr();
#endif
return 0;
}
void lasat_write_eeprom_info(void)
{
unsigned long crc;
/* Generate the CRC */
crc = EEPROM_CRC((unsigned char *)(&lasat_board_info.li_eeprom_info),
sizeof(struct lasat_eeprom_struct) - 4);
lasat_board_info.li_eeprom_info.crc32 = crc;
/* Write the EEPROM info */
EEPROMWrite(0, (unsigned char *)&lasat_board_info.li_eeprom_info,
sizeof(struct lasat_eeprom_struct));
}

63
arch/mips/lasat/lasat_models.h
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@ -1,63 +0,0 @@
/*
* Model description tables
*/
typedef struct product_info_t {
const char *pi_name;
const char *pi_type;
} product_info_t;
typedef struct vendor_info_t {
const char *vi_name;
const product_info_t *vi_product_info;
} vendor_info_t;
/*
* Base models
*/
static const char * const txt_base_models[] = {
"MQ 2", "MQ Pro", "SP 25", "SP 50", "SP 100", "SP 5000", "SP 7000", "SP 1000", "Unknown"
};
#define N_BASE_MODELS (sizeof(txt_base_models)/sizeof(char*)-1)
/*
* Eicon Networks
*/
static const char txt_en_mq[] = "Masquerade";
static const char txt_en_sp[] = "Safepipe";
static const product_info_t product_info_eicon[] = {
{ txt_en_mq, "II" }, /* 0 */
{ txt_en_mq, "Pro" }, /* 1 */
{ txt_en_sp, "25" }, /* 2 */
{ txt_en_sp, "50" }, /* 3 */
{ txt_en_sp, "100" }, /* 4 */
{ txt_en_sp, "5000" }, /* 5 */
{ txt_en_sp, "7000" }, /* 6 */
{ txt_en_sp, "30" }, /* 7 */
{ txt_en_sp, "5100" }, /* 8 */
{ txt_en_sp, "7100" }, /* 9 */
{ txt_en_sp, "1110" }, /* 10 */
{ txt_en_sp, "3020" }, /* 11 */
{ txt_en_sp, "3030" }, /* 12 */
{ txt_en_sp, "5020" }, /* 13 */
{ txt_en_sp, "5030" }, /* 14 */
{ txt_en_sp, "1120" }, /* 15 */
{ txt_en_sp, "1130" }, /* 16 */
{ txt_en_sp, "6010" }, /* 17 */
{ txt_en_sp, "6110" }, /* 18 */
{ txt_en_sp, "6210" }, /* 19 */
{ txt_en_sp, "1020" }, /* 20 */
{ txt_en_sp, "1040" }, /* 21 */
{ txt_en_sp, "1050" }, /* 22 */
{ txt_en_sp, "1060" }, /* 23 */
};
#define N_PRIDS (sizeof(product_info_eicon)/sizeof(product_info_t))
/*
* The vendor table
*/
static vendor_info_t const vendor_info_table[] = {
{ "Eicon Networks", product_info_eicon },
};
#define N_VENDORS (sizeof(vendor_info_table)/sizeof(vendor_info_t))

240
arch/mips/lasat/picvue.c
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/*
* Picvue PVC160206 display driver
*
* Brian Murphy <brian@murphy.dk>
*
*/
#include <linux/kernel.h>
#include <linux/delay.h>
#include <asm/bootinfo.h>
#include <asm/lasat/lasat.h>
#include <linux/module.h>
#include <linux/init.h>
#include <linux/errno.h>
#include <linux/string.h>
#include "picvue.h"
#define PVC_BUSY 0x80
#define PVC_NLINES 2
#define PVC_DISPMEM 80
#define PVC_LINELEN PVC_DISPMEM / PVC_NLINES
struct pvc_defs *picvue = NULL;
DECLARE_MUTEX(pvc_sem);
static void pvc_reg_write(u32 val)
{
*picvue->reg = val;
}
static u32 pvc_reg_read(void)
{
u32 tmp = *picvue->reg;
return tmp;
}
static void pvc_write_byte(u32 data, u8 byte)
{
data |= picvue->e;
pvc_reg_write(data);
data &= ~picvue->data_mask;
data |= byte << picvue->data_shift;
pvc_reg_write(data);
ndelay(220);
pvc_reg_write(data & ~picvue->e);
ndelay(220);
}
static u8 pvc_read_byte(u32 data)
{
u8 byte;
data |= picvue->e;
pvc_reg_write(data);
ndelay(220);
byte = (pvc_reg_read() & picvue->data_mask) >> picvue->data_shift;
data &= ~picvue->e;
pvc_reg_write(data);
ndelay(220);
return byte;
}
static u8 pvc_read_data(void)
{
u32 data = pvc_reg_read();
u8 byte;
data |= picvue->rw;
data &= ~picvue->rs;
pvc_reg_write(data);
ndelay(40);
byte = pvc_read_byte(data);
data |= picvue->rs;
pvc_reg_write(data);
return byte;
}
#define TIMEOUT 1000
static int pvc_wait(void)
{
int i = TIMEOUT;
int err = 0;
while ((pvc_read_data() & PVC_BUSY) && i)
i--;
if (i == 0)
err = -ETIME;
return err;
}
#define MODE_INST 0
#define MODE_DATA 1
static void pvc_write(u8 byte, int mode)
{
u32 data = pvc_reg_read();
data &= ~picvue->rw;
if (mode == MODE_DATA)
data |= picvue->rs;
else
data &= ~picvue->rs;
pvc_reg_write(data);
ndelay(40);
pvc_write_byte(data, byte);
if (mode == MODE_DATA)
data &= ~picvue->rs;
else
data |= picvue->rs;
pvc_reg_write(data);
pvc_wait();
}
void pvc_write_string(const unsigned char *str, u8 addr, int line)
{
int i = 0;
if (line > 0 && (PVC_NLINES > 1))
addr += 0x40 * line;
pvc_write(0x80 | addr, MODE_INST);
while (*str != 0 && i < PVC_LINELEN) {
pvc_write(*str++, MODE_DATA);
i++;
}
}
void pvc_write_string_centered(const unsigned char *str, int line)
{
int len = strlen(str);
u8 addr;
if (len > PVC_VISIBLE_CHARS)
addr = 0;
else
addr = (PVC_VISIBLE_CHARS - strlen(str))/2;
pvc_write_string(str, addr, line);
}
void pvc_dump_string(const unsigned char *str)
{
int len = strlen(str);
pvc_write_string(str, 0, 0);
if (len > PVC_VISIBLE_CHARS)
pvc_write_string(&str[PVC_VISIBLE_CHARS], 0, 1);
}
#define BM_SIZE 8
#define MAX_PROGRAMMABLE_CHARS 8
int pvc_program_cg(int charnum, u8 bitmap[BM_SIZE])
{
int i;
int addr;
if (charnum > MAX_PROGRAMMABLE_CHARS)
return -ENOENT;
addr = charnum * 8;
pvc_write(0x40 | addr, MODE_INST);
for (i=0; i<BM_SIZE; i++)
pvc_write(bitmap[i], MODE_DATA);
return 0;
}
#define FUNC_SET_CMD 0x20
#define EIGHT_BYTE (1 << 4)
#define FOUR_BYTE 0
#define TWO_LINES (1 << 3)
#define ONE_LINE 0
#define LARGE_FONT (1 << 2)
#define SMALL_FONT 0
static void pvc_funcset(u8 cmd)
{
pvc_write(FUNC_SET_CMD | (cmd & (EIGHT_BYTE|TWO_LINES|LARGE_FONT)), MODE_INST);
}
#define ENTRYMODE_CMD 0x4
#define AUTO_INC (1 << 1)
#define AUTO_DEC 0
#define CURSOR_FOLLOWS_DISP (1 << 0)
static void pvc_entrymode(u8 cmd)
{
pvc_write(ENTRYMODE_CMD | (cmd & (AUTO_INC|CURSOR_FOLLOWS_DISP)), MODE_INST);
}
#define DISP_CNT_CMD 0x08
#define DISP_OFF 0
#define DISP_ON (1 << 2)
#define CUR_ON (1 << 1)
#define CUR_BLINK (1 << 0)
void pvc_dispcnt(u8 cmd)
{
pvc_write(DISP_CNT_CMD | (cmd & (DISP_ON|CUR_ON|CUR_BLINK)), MODE_INST);
}
#define MOVE_CMD 0x10
#define DISPLAY (1 << 3)
#define CURSOR 0
#define RIGHT (1 << 2)
#define LEFT 0
void pvc_move(u8 cmd)
{
pvc_write(MOVE_CMD | (cmd & (DISPLAY|RIGHT)), MODE_INST);
}
#define CLEAR_CMD 0x1
void pvc_clear(void)
{
pvc_write(CLEAR_CMD, MODE_INST);
}
#define HOME_CMD 0x2
void pvc_home(void)
{
pvc_write(HOME_CMD, MODE_INST);
}
int pvc_init(void)
{
u8 cmd = EIGHT_BYTE;
if (PVC_NLINES == 2)
cmd |= (SMALL_FONT|TWO_LINES);
else
cmd |= (LARGE_FONT|ONE_LINE);
pvc_funcset(cmd);
pvc_dispcnt(DISP_ON);
pvc_entrymode(AUTO_INC);
pvc_clear();
pvc_write_string_centered("Display", 0);
pvc_write_string_centered("Initialized", 1);
return 0;
}
module_init(pvc_init);
MODULE_LICENSE("GPL");

48
arch/mips/lasat/picvue.h
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@ -1,48 +0,0 @@
/*
* Picvue PVC160206 display driver
*
* Brian Murphy <brian.murphy@eicon.com>
*
*/
#include <asm/semaphore.h>
struct pvc_defs {
volatile u32 *reg;
u32 data_shift;
u32 data_mask;
u32 e;
u32 rw;
u32 rs;
};
extern struct pvc_defs *picvue;
#define PVC_NLINES 2
#define PVC_DISPMEM 80
#define PVC_LINELEN PVC_DISPMEM / PVC_NLINES
#define PVC_VISIBLE_CHARS 16
void pvc_write_string(const unsigned char *str, u8 addr, int line);
void pvc_write_string_centered(const unsigned char *str, int line);
void pvc_dump_string(const unsigned char *str);
#define BM_SIZE 8
#define MAX_PROGRAMMABLE_CHARS 8
int pvc_program_cg(int charnum, u8 bitmap[BM_SIZE]);
void pvc_dispcnt(u8 cmd);
#define DISP_OFF 0
#define DISP_ON (1 << 2)
#define CUR_ON (1 << 1)
#define CUR_BLINK (1 << 0)
void pvc_move(u8 cmd);
#define DISPLAY (1 << 3)
#define CURSOR 0
#define RIGHT (1 << 2)
#define LEFT 0
void pvc_clear(void);
void pvc_home(void);
extern struct semaphore pvc_sem;

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arch/mips/lasat/picvue_proc.c
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/*
* Picvue PVC160206 display driver
*
* Brian Murphy <brian.murphy@eicon.com>
*
*/
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/init.h>
#include <linux/errno.h>
#include <linux/proc_fs.h>
#include <linux/interrupt.h>
#include <linux/timer.h>
#include "picvue.h"
static char pvc_lines[PVC_NLINES][PVC_LINELEN+1];
static int pvc_linedata[PVC_NLINES];
static struct proc_dir_entry *pvc_display_dir;
static char *pvc_linename[PVC_NLINES] = {"line1", "line2"};
#define DISPLAY_DIR_NAME "display"
static int scroll_dir = 0, scroll_interval = 0;
static struct timer_list timer;
static void pvc_display(unsigned long data) {
int i;
pvc_clear();
for (i=0; i<PVC_NLINES; i++)
pvc_write_string(pvc_lines[i], 0, i);
}
static DECLARE_TASKLET(pvc_display_tasklet, &pvc_display, 0);
static int pvc_proc_read_line(char *page, char **start,
off_t off, int count,
int *eof, void *data)
{
char *origpage = page;
int lineno = *(int *)data;
if (lineno < 0 || lineno > PVC_NLINES) {
printk("proc_read_line: invalid lineno %d\n", lineno);
return 0;
}
down(&pvc_sem);
page += sprintf(page, "%s\n", pvc_lines[lineno]);
up(&pvc_sem);
return page - origpage;
}
static int pvc_proc_write_line(struct file *file, const char *buffer,
unsigned long count, void *data)
{
int origcount = count;
int lineno = *(int *)data;
if (lineno < 0 || lineno > PVC_NLINES) {
printk("proc_write_line: invalid lineno %d\n", lineno);
return origcount;
}
if (count > PVC_LINELEN)
count = PVC_LINELEN;
if (buffer[count-1] == '\n')
count--;
down(&pvc_sem);
strncpy(pvc_lines[lineno], buffer, count);
pvc_lines[lineno][count] = '\0';
up(&pvc_sem);
tasklet_schedule(&pvc_display_tasklet);
return origcount;
}
static int pvc_proc_write_scroll(struct file *file, const char *buffer,
unsigned long count, void *data)
{
int origcount = count;
int cmd = simple_strtol(buffer, NULL, 10);
down(&pvc_sem);
if (scroll_interval != 0)
del_timer(&timer);
if (cmd == 0) {
scroll_dir = 0;
scroll_interval = 0;
} else {
if (cmd < 0) {
scroll_dir = -1;
scroll_interval = -cmd;
} else {
scroll_dir = 1;
scroll_interval = cmd;
}
add_timer(&timer);
}
up(&pvc_sem);
return origcount;
}
static int pvc_proc_read_scroll(char *page, char **start,
off_t off, int count,
int *eof, void *data)
{
char *origpage = page;
down(&pvc_sem);
page += sprintf(page, "%d\n", scroll_dir * scroll_interval);
up(&pvc_sem);
return page - origpage;
}
void pvc_proc_timerfunc(unsigned long data)
{
if (scroll_dir < 0)
pvc_move(DISPLAY|RIGHT);
else if (scroll_dir > 0)
pvc_move(DISPLAY|LEFT);
timer.expires = jiffies + scroll_interval;
add_timer(&timer);
}
static void pvc_proc_cleanup(void)
{
int i;
for (i=0; i<PVC_NLINES; i++)
remove_proc_entry(pvc_linename[i], pvc_display_dir);
remove_proc_entry("scroll", pvc_display_dir);
remove_proc_entry(DISPLAY_DIR_NAME, NULL);
del_timer(&timer);
}
static int __init pvc_proc_init(void)
{
struct proc_dir_entry *proc_entry;
int i;
pvc_display_dir = proc_mkdir(DISPLAY_DIR_NAME, NULL);
if (pvc_display_dir == NULL)
goto error;
for (i=0; i<PVC_NLINES; i++) {
strcpy(pvc_lines[i], "");
pvc_linedata[i] = i;
}
for (i=0; i<PVC_NLINES; i++) {
proc_entry = create_proc_entry(pvc_linename[i], 0644, pvc_display_dir);
if (proc_entry == NULL)
goto error;
proc_entry->read_proc = pvc_proc_read_line;
proc_entry->write_proc = pvc_proc_write_line;
proc_entry->data = &pvc_linedata[i];
}
proc_entry = create_proc_entry("scroll", 0644, pvc_display_dir);
if (proc_entry == NULL)
goto error;
proc_entry->write_proc = pvc_proc_write_scroll;
proc_entry->read_proc = pvc_proc_read_scroll;
init_timer(&timer);
timer.function = pvc_proc_timerfunc;
return 0;
error:
pvc_proc_cleanup();
return -ENOMEM;
}
module_init(pvc_proc_init);
module_exit(pvc_proc_cleanup);
MODULE_LICENSE("GPL");

117
arch/mips/lasat/prom.c
View File

@ -1,117 +0,0 @@
/*
* PROM interface routines.
*/
#include <linux/types.h>
#include <linux/init.h>
#include <linux/string.h>
#include <linux/ctype.h>
#include <linux/kernel.h>
#include <linux/mm.h>
#include <linux/bootmem.h>
#include <linux/ioport.h>
#include <asm/bootinfo.h>
#include <asm/lasat/lasat.h>
#include <asm/cpu.h>
#include "at93c.h"
#include <asm/lasat/eeprom.h>
#include "prom.h"
#define RESET_VECTOR 0xbfc00000
#define PROM_JUMP_TABLE_ENTRY(n) (*((u32 *)(RESET_VECTOR + 0x20) + n))
#define PROM_DISPLAY_ADDR PROM_JUMP_TABLE_ENTRY(0)
#define PROM_PUTC_ADDR PROM_JUMP_TABLE_ENTRY(1)
#define PROM_MONITOR_ADDR PROM_JUMP_TABLE_ENTRY(2)
static void null_prom_display(const char *string, int pos, int clear)
{
}
static void null_prom_monitor(void)
{
}
static void null_prom_putc(char c)
{
}
/* these are functions provided by the bootloader */
static void (* __prom_putc)(char c) = null_prom_putc;
void prom_putchar(char c)
{
__prom_putc(c);
}
void (* prom_display)(const char *string, int pos, int clear) =
null_prom_display;
void (* prom_monitor)(void) = null_prom_monitor;
unsigned int lasat_ndelay_divider;
static void setup_prom_vectors(void)
{
u32 version = *(u32 *)(RESET_VECTOR + 0x90);
if (version >= 307) {
prom_display = (void *)PROM_DISPLAY_ADDR;
__prom_putc = (void *)PROM_PUTC_ADDR;
prom_monitor = (void *)PROM_MONITOR_ADDR;
}
printk("prom vectors set up\n");
}
static struct at93c_defs at93c_defs[N_MACHTYPES] = {
{(void *)AT93C_REG_100, (void *)AT93C_RDATA_REG_100, AT93C_RDATA_SHIFT_100,
AT93C_WDATA_SHIFT_100, AT93C_CS_M_100, AT93C_CLK_M_100},
{(void *)AT93C_REG_200, (void *)AT93C_RDATA_REG_200, AT93C_RDATA_SHIFT_200,
AT93C_WDATA_SHIFT_200, AT93C_CS_M_200, AT93C_CLK_M_200},
};
void __init prom_init(void)
{
int argc = fw_arg0;
char **argv = (char **) fw_arg1;
setup_prom_vectors();
if (current_cpu_data.cputype == CPU_R5000) {
printk("LASAT 200 board\n");
mips_machtype = MACH_LASAT_200;
lasat_ndelay_divider = LASAT_200_DIVIDER;
} else {
printk("LASAT 100 board\n");
mips_machtype = MACH_LASAT_100;
lasat_ndelay_divider = LASAT_100_DIVIDER;
}
at93c = &at93c_defs[mips_machtype];
lasat_init_board_info(); /* Read info from EEPROM */
mips_machgroup = MACH_GROUP_LASAT;
/* Get the command line */
if (argc > 0) {
strncpy(arcs_cmdline, argv[0], CL_SIZE-1);
arcs_cmdline[CL_SIZE-1] = '\0';
}
/* Set the I/O base address */
set_io_port_base(KSEG1);
/* Set memory regions */
ioport_resource.start = 0;
ioport_resource.end = 0xffffffff; /* Wrong, fixme. */
add_memory_region(0, lasat_board_info.li_memsize, BOOT_MEM_RAM);
}
void __init prom_free_prom_memory(void)
{
}
const char *get_system_type(void)
{
return lasat_board_info.li_bmstr;
}

5
arch/mips/lasat/prom.h
View File

@ -1,5 +0,0 @@
#ifndef PROM_H
#define PROM_H
extern void (* prom_display)(const char *string, int pos, int clear);
extern void (* prom_monitor)(void);
#endif

69
arch/mips/lasat/reset.c
View File

@ -1,69 +0,0 @@
/*
* Thomas Horsten <thh@lasat.com>
* Copyright (C) 2000 LASAT Networks A/S.
*
* This program is free software; you can distribute it and/or modify it
* under the terms of the GNU General Public License (Version 2) as
* published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
* for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
*
* Reset the LASAT board.
*/
#include <linux/kernel.h>
#include <linux/pm.h>
#include <asm/reboot.h>
#include <asm/system.h>
#include <asm/lasat/lasat.h>
#include "picvue.h"
#include "prom.h"
static void lasat_machine_restart(char *command);
static void lasat_machine_halt(void);
/* Used to set machine to boot in service mode via /proc interface */
int lasat_boot_to_service = 0;
static void lasat_machine_restart(char *command)
{
local_irq_disable();
if (lasat_boot_to_service) {
printk("machine_restart: Rebooting to service mode\n");
*(volatile unsigned int *)0xa0000024 = 0xdeadbeef;
*(volatile unsigned int *)0xa00000fc = 0xfedeabba;
}
*lasat_misc->reset_reg = 0xbedead;
for (;;) ;
}
#define MESSAGE "System halted"
static void lasat_machine_halt(void)
{
local_irq_disable();
/* Disable interrupts and loop forever */
printk(KERN_NOTICE MESSAGE "\n");
#ifdef CONFIG_PICVUE
pvc_clear();
pvc_write_string(MESSAGE, 0, 0);
#endif
prom_monitor();
for (;;) ;
}
void lasat_reboot_setup(void)
{
_machine_restart = lasat_machine_restart;
_machine_halt = lasat_machine_halt;
pm_power_off = lasat_machine_halt;
}

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