arm64: dts: rockchip: Enable SPI1 on Ficus

Enable SPI1 exposed on both Low and High speed expansion connectors
of Ficus. SPI1 has 3 different chip selects wired as below:

CS0 - Serial Flash (unpopulated)
CS1 - Low Speed expansion
CS2 - High Speed expansion

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
This commit is contained in:
Manivannan Sadhasivam 2019-05-17 09:36:25 +05:30 committed by Heiko Stuebner
parent 7b305b0fb0
commit 0ee198ab08
1 changed files with 6 additions and 0 deletions

View File

@ -146,6 +146,12 @@
};
};
&spi1 {
/* On both Low speed and High speed expansion */
cs-gpios = <0>, <&gpio4 RK_PA6 0>, <&gpio4 RK_PA7 0>;
status = "okay";
};
&usbdrd_dwc3_0 {
dr_mode = "host";
};