tg3: Workaround tagged status update bug
On rare occasions, writing the tag to the interrupt mailbox does not reenable interrupts. This patch fixes the problem by reissuing the mailbox update. Signed-off-by: Matt Carlson <mcarlson@broadcom.com> Signed-off-by: Michael Chan <mchan@broadcom.com> Reviewed-by: Benjamin Li <benli@broadcom.com> Signed-off-by: David S. Miller <davem@conan.davemloft.net>
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@ -7754,6 +7754,9 @@ static void tg3_rings_reset(struct tg3 *tp)
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/* Disable interrupts */
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tw32_mailbox_f(tp->napi[0].int_mbox, 1);
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tp->napi[0].chk_msi_cnt = 0;
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tp->napi[0].last_rx_cons = 0;
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tp->napi[0].last_tx_cons = 0;
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/* Zero mailbox registers. */
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if (tg3_flag(tp, SUPPORT_MSIX)) {
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@ -7764,6 +7767,9 @@ static void tg3_rings_reset(struct tg3 *tp)
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tw32_mailbox(tp->napi[i].prodmbox, 0);
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tw32_rx_mbox(tp->napi[i].consmbox, 0);
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tw32_mailbox_f(tp->napi[i].int_mbox, 1);
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tp->napi[0].chk_msi_cnt = 0;
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tp->napi[i].last_rx_cons = 0;
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tp->napi[i].last_tx_cons = 0;
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}
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if (!tg3_flag(tp, ENABLE_TSS))
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tw32_mailbox(tp->napi[0].prodmbox, 0);
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@ -8819,6 +8825,30 @@ static void tg3_periodic_fetch_stats(struct tg3 *tp)
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TG3_STAT_ADD32(&sp->rx_errors, RCVLPC_IN_ERRORS_CNT);
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}
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static void tg3_chk_missed_msi(struct tg3 *tp)
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{
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u32 i;
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for (i = 0; i < tp->irq_cnt; i++) {
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struct tg3_napi *tnapi = &tp->napi[i];
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if (tg3_has_work(tnapi)) {
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if (tnapi->last_rx_cons == tnapi->rx_rcb_ptr &&
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tnapi->last_tx_cons == tnapi->tx_cons) {
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if (tnapi->chk_msi_cnt < 1) {
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tnapi->chk_msi_cnt++;
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return;
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}
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tw32_mailbox(tnapi->int_mbox,
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tnapi->last_tag << 24);
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}
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}
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tnapi->chk_msi_cnt = 0;
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tnapi->last_rx_cons = tnapi->rx_rcb_ptr;
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tnapi->last_tx_cons = tnapi->tx_cons;
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}
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}
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static void tg3_timer(unsigned long __opaque)
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{
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struct tg3 *tp = (struct tg3 *) __opaque;
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@ -8828,6 +8858,10 @@ static void tg3_timer(unsigned long __opaque)
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spin_lock(&tp->lock);
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if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 ||
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GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57765)
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tg3_chk_missed_msi(tp);
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if (!tg3_flag(tp, TAGGED_STATUS)) {
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/* All of this garbage is because when using non-tagged
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* IRQ status the mailbox/status_block protocol the chip
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@ -9303,7 +9337,9 @@ static int tg3_open(struct net_device *dev)
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tg3_halt(tp, RESET_KIND_SHUTDOWN, 1);
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tg3_free_rings(tp);
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} else {
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if (tg3_flag(tp, TAGGED_STATUS))
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if (tg3_flag(tp, TAGGED_STATUS) &&
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GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5717 &&
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GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_57765)
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tp->timer_offset = HZ;
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else
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tp->timer_offset = HZ / 10;
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@ -2800,6 +2800,7 @@ struct tg3_napi {
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struct tg3 *tp;
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struct tg3_hw_status *hw_status;
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u32 chk_msi_cnt;
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u32 last_tag;
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u32 last_irq_tag;
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u32 int_mbox;
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@ -2807,6 +2808,7 @@ struct tg3_napi {
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u32 consmbox ____cacheline_aligned;
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u32 rx_rcb_ptr;
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u32 last_rx_cons;
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u16 *rx_rcb_prod_idx;
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struct tg3_rx_prodring_set prodring;
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struct tg3_rx_buffer_desc *rx_rcb;
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@ -2814,6 +2816,7 @@ struct tg3_napi {
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u32 tx_prod ____cacheline_aligned;
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u32 tx_cons;
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u32 tx_pending;
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u32 last_tx_cons;
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u32 prodmbox;
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struct tg3_tx_buffer_desc *tx_ring;
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struct ring_info *tx_buffers;
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