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KVM: x86: MMU: always set accessed bit in shadow PTEs 

Commit 7a1638ce42 ("nEPT: Redefine EPT-specific link_shadow_page()",
2013-08-05) says:

    Since nEPT doesn't support A/D bit, we should not set those bit
    when building the shadow page table.

but this is not necessary.  Even though nEPT doesn't support A/D
bits, and hence the vmcs12 EPT pointer will never enable them,
we always use them for shadow page tables if available (see
construct_eptp in vmx.c).  So we can set the A/D bits freely
in the shadow page table.

This patch hence basically reverts commit 7a1638ce42.

Cc: Yang Zhang <yang.z.zhang@Intel.com>
Cc: Takuya Yoshikawa <yoshikawa_takuya_b1@lab.ntt.co.jp>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
This commit is contained in:
Paolo Bonzini 2015-11-13 11:52:45 +01:00
parent aba2f06c07
commit 0e3d0648bd
2 changed files with 5 additions and 8 deletions
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9
arch/x86/kvm/mmu.c
View File

@ -2198,7 +2198,7 @@ static void shadow_walk_next(struct kvm_shadow_walk_iterator *iterator)
return __shadow_walk_next(iterator, *iterator->sptep); return __shadow_walk_next(iterator, *iterator->sptep);
} }
static void link_shadow_page(u64 *sptep, struct kvm_mmu_page *sp, bool accessed) static void link_shadow_page(u64 *sptep, struct kvm_mmu_page *sp)
{ {
u64 spte; u64 spte;
@ -2206,10 +2206,7 @@ static void link_shadow_page(u64 *sptep, struct kvm_mmu_page *sp, bool accessed)
VMX_EPT_WRITABLE_MASK != PT_WRITABLE_MASK); VMX_EPT_WRITABLE_MASK != PT_WRITABLE_MASK);
spte = __pa(sp->spt) | PT_PRESENT_MASK | PT_WRITABLE_MASK | spte = __pa(sp->spt) | PT_PRESENT_MASK | PT_WRITABLE_MASK |
shadow_user_mask | shadow_x_mask; shadow_user_mask | shadow_x_mask | shadow_accessed_mask;
if (accessed)
spte |= shadow_accessed_mask;
mmu_spte_set(sptep, spte); mmu_spte_set(sptep, spte);
} }
@ -2740,7 +2737,7 @@ static int __direct_map(struct kvm_vcpu *vcpu, gpa_t v, int write,
iterator.level - 1, iterator.level - 1,
1, ACC_ALL, iterator.sptep); 1, ACC_ALL, iterator.sptep);
link_shadow_page(iterator.sptep, sp, true); link_shadow_page(iterator.sptep, sp);
} }
} }
return emulate; return emulate;

4
arch/x86/kvm/paging_tmpl.h
View File

@ -598,7 +598,7 @@ static int FNAME(fetch)(struct kvm_vcpu *vcpu, gva_t addr,
goto out_gpte_changed; goto out_gpte_changed;
if (sp) if (sp)
link_shadow_page(it.sptep, sp, PT_GUEST_ACCESSED_MASK); link_shadow_page(it.sptep, sp);
} }
for (; for (;
@ -618,7 +618,7 @@ static int FNAME(fetch)(struct kvm_vcpu *vcpu, gva_t addr,
sp = kvm_mmu_get_page(vcpu, direct_gfn, addr, it.level-1, sp = kvm_mmu_get_page(vcpu, direct_gfn, addr, it.level-1,
true, direct_access, it.sptep); true, direct_access, it.sptep);
link_shadow_page(it.sptep, sp, PT_GUEST_ACCESSED_MASK); link_shadow_page(it.sptep, sp);
} }
clear_sp_write_flooding_count(it.sptep); clear_sp_write_flooding_count(it.sptep);