ASoC: tlv320adcx140: Fix bias config values
The device tree binding declares the ti,mic-bias-source and the ti,vref-source properties as u32. The code reads them as u8 which is incorrect. Since the device tree binding indicates them as u32 the conde needs to be updated to read u32. In addition the bias source needs to be shifted 4 bits to correctly write the register. driver family") Fixes: 37bde5acf040 ("ASoC: tlv320adcx140: Add the tlv320adcx140 codec Signed-off-by: Dan Murphy <dmurphy@ti.com> Link: https://lore.kernel.org/r/20200513142807.11802-1-dmurphy@ti.com Signed-off-by: Mark Brown <broonie@kernel.org>
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@ -739,11 +739,12 @@ static int adcx140_codec_probe(struct snd_soc_component *component)
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{
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struct adcx140_priv *adcx140 = snd_soc_component_get_drvdata(component);
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int sleep_cfg_val = ADCX140_WAKE_DEV;
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u8 bias_source;
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u8 vref_source;
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u32 bias_source;
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u32 vref_source;
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u8 bias_cfg;
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int ret;
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ret = device_property_read_u8(adcx140->dev, "ti,mic-bias-source",
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ret = device_property_read_u32(adcx140->dev, "ti,mic-bias-source",
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&bias_source);
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if (ret)
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bias_source = ADCX140_MIC_BIAS_VAL_VREF;
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@ -754,7 +755,7 @@ static int adcx140_codec_probe(struct snd_soc_component *component)
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return -EINVAL;
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}
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ret = device_property_read_u8(adcx140->dev, "ti,vref-source",
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ret = device_property_read_u32(adcx140->dev, "ti,vref-source",
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&vref_source);
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if (ret)
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vref_source = ADCX140_MIC_BIAS_VREF_275V;
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@ -765,7 +766,7 @@ static int adcx140_codec_probe(struct snd_soc_component *component)
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return -EINVAL;
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}
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bias_source |= vref_source;
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bias_cfg = bias_source << ADCX140_MIC_BIAS_SHIFT | vref_source;
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ret = adcx140_reset(adcx140);
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if (ret)
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@ -785,7 +786,7 @@ static int adcx140_codec_probe(struct snd_soc_component *component)
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ret = regmap_update_bits(adcx140->regmap, ADCX140_BIAS_CFG,
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ADCX140_MIC_BIAS_VAL_MSK |
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ADCX140_MIC_BIAS_VREF_MSK, bias_source);
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ADCX140_MIC_BIAS_VREF_MSK, bias_cfg);
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if (ret)
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dev_err(adcx140->dev, "setting MIC bias failed %d\n", ret);
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out:
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@ -116,6 +116,7 @@
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#define ADCX140_MIC_BIAS_VAL_VREF_1096 1
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#define ADCX140_MIC_BIAS_VAL_AVDD 6
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#define ADCX140_MIC_BIAS_VAL_MSK GENMASK(6, 4)
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#define ADCX140_MIC_BIAS_SHIFT 4
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#define ADCX140_MIC_BIAS_VREF_275V 0
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#define ADCX140_MIC_BIAS_VREF_25V 1
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